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ralink: fix the 10mbit bug on mt7621

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a missing "val =" caused the AN bit in the phy0 reg to be flushed.

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 43246
This commit is contained in:
John Crispin 2014-11-14 16:52:47 +00:00
parent 194ca6127e
commit bf8bb5b611
1 changed files with 1 additions and 1 deletions
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target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
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@ -596,7 +596,7 @@ static void gsw_hw_init_mt7621(struct mt7620_gsw *gsw, struct device_node *np)
/* turn off all PHYs */
for (i = 0; i <= 4; i++) {
_mt7620_mii_read(gsw, i, 0x0);
val = _mt7620_mii_read(gsw, i, 0x0);
val |= (0x1 << 11);
_mt7620_mii_write(gsw, i, 0x0, val);
}