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rockchip: backport upstream updates for nanopc t6

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Backport ir-receiver/minipcie/poweroff/spi/usb-c support and other
minor fixes for the NanoPC T6 board.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16443
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Tianling Shen 2024-09-06 15:27:25 +08:00 committed by Hauke Mehrtens
parent 3fa5ee0b28
commit bbf1c300c8
16 changed files with 2547 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
target/linux/rockchip/patches-6.6/054-01-v6.8-arm64-dts-rockchip-Support-poweroff-on-NanoPC-T6.patch Normal file
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@ -0,0 +1,26 @@
From c699fbfdfd54630fc51b96da577f02e7b772eb37 Mon Sep 17 00:00:00 2001
From: Hugh Cole-Baker <sigmaris@gmail.com>
Date: Sat, 16 Dec 2023 21:21:34 +0000
Subject: [PATCH] arm64: dts: rockchip: Support poweroff on NanoPC-T6
The RK806 on the NanoPC-T6 can be used to power on/off the whole board.
Mark it as the system power controller.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -569,6 +569,8 @@
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;
vcc3-supply = <&vcc4v0_sys>;

33
target/linux/rockchip/patches-6.6/054-02-v6.9-arm64-dts-rockchip-nanopc-t6-sdmmc-beautification.patch Normal file
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@ -0,0 +1,33 @@
From 9e1faff1cbc877903d019a7943d37ddc5042704d Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Thu, 28 Dec 2023 17:29:35 +0000
Subject: [PATCH] arm64: dts: rockchip: nanopc-t6 sdmmc beautification
drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi
order no-sdio & no-mmc properties while we are here
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -536,13 +536,12 @@
};
&sdmmc {
- max-frequency = <200000000>;
- no-sdio;
- no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
+ no-mmc;
+ no-sdio;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;

26
target/linux/rockchip/patches-6.6/054-03-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch Normal file
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@ -0,0 +1,26 @@
From 24559788384916041a0bbf54c32e2a16b612d247 Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Mon, 25 Dec 2023 22:32:16 +0000
Subject: [PATCH] arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and
gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231225223226.17690-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -590,7 +590,7 @@
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
+ pins = "gpio_pwrctrl1";
function = "pin_fun0";
};

57
target/linux/rockchip/patches-6.6/054-04-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch Normal file
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@ -0,0 +1,57 @@
From d235e65adf00f6db09331874c5a987b7fe18023b Mon Sep 17 00:00:00 2001
From: Hugh Cole-Baker <sigmaris@gmail.com>
Date: Tue, 9 Jan 2024 20:27:28 +0000
Subject: [PATCH] arm64: dts: rockchip: enable NanoPC-T6 MiniPCIe power
The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE
modem. This slot has no PCIe functionality, only USB 2.0 pins are wired
to the SoC, and USIM pins are wired to a SIM card slot on the board.
Define the 3.3v supply for the slot so it can be used.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -159,6 +159,18 @@
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vdd_4g_3v3: vdd-4g-3v3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pin_4g_lte_pwren>;
+ regulator-name = "vdd_4g_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&combphy0_ps {
@@ -504,6 +516,10 @@
};
usb {
+ pin_4g_lte_pwren: 4g-lte-pwren {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -884,6 +900,7 @@
};
&u2phy2_host {
+ phy-supply = <&vdd_4g_3v3>;
status = "okay";
};

25
target/linux/rockchip/patches-6.6/054-05-v6.9-arm64-dts-rockchip-add-sdmmc-card-detect-to-the-nanopc-t6.patch Normal file
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@ -0,0 +1,25 @@
From d8bb6c2311b6b2aad11b937f96db1d6c3393246a Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Sat, 30 Dec 2023 11:50:53 -0500
Subject: [PATCH] arm64: dts: rockchip: add sdmmc card detect to the nanopc-t6
The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is
active low.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -555,6 +555,7 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
no-mmc;
no-sdio;

44
target/linux/rockchip/patches-6.6/054-06-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch Normal file
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@ -0,0 +1,44 @@
From 6cb02674a061e4ef4f437ab60c91038d4c0d85ef Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Tue, 2 Jan 2024 02:40:53 +0000
Subject: [PATCH] arm64: dts: rockchip: fix nanopc-t6 sdmmc regulator
sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3
add the vcc3v3_sd_s0 regulator, and control it with gpio4_a5
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20240102024054.1030313-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -160,6 +160,17 @@
vin-supply = <&vcc5v0_sys>;
};
+ vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
+ compatible = "regulator-fixed";
+ enable-active-low;
+ gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc3v3_sd_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
vdd_4g_3v3: vdd-4g-3v3-regulator {
compatible = "regulator-fixed";
enable-active-high;
@@ -560,7 +571,7 @@
no-mmc;
no-sdio;
sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
+ vmmc-supply = <&vcc3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};

1916
target/linux/rockchip/patches-6.6/054-08-v6.12-arm64-dts-rockchip-prepare-NanoPC-T6-for-LTS-board.patch Normal file
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File diff suppressed because it is too large Load Diff

85
target/linux/rockchip/patches-6.6/054-09-v6.12-arm64-dts-rockchip-move-NanoPC-T6-parts-to-DTS.patch Normal file
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@ -0,0 +1,85 @@
From aea8d84070fe0846961deb23228d9dd3f8caefb3 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:54 +0200
Subject: [PATCH] arm64: dts: rockchip: move NanoPC-T6 parts to DTS
MiniPCIe slot is present only in first version of NanoPC-T6 (2301).
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-nanopc-t6.dts | 23 +++++++++++++++++++
.../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 17 --------------
2 files changed, 23 insertions(+), 17 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -14,4 +14,27 @@
model = "FriendlyElec NanoPC-T6";
compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
+ vdd_4g_3v3: vdd-4g-3v3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pin_4g_lte_pwren>;
+ regulator-name = "vdd_4g_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&pinctrl {
+ usb {
+ pin_4g_lte_pwren: 4g-lte-pwren {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&u2phy2_host {
+ phy-supply = <&vdd_4g_3v3>;
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -170,18 +170,6 @@
regulator-name = "vcc3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
-
- vdd_4g_3v3: vdd-4g-3v3-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pin_4g_lte_pwren>;
- regulator-name = "vdd_4g_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
};
&combphy0_ps {
@@ -527,10 +515,6 @@
};
usb {
- pin_4g_lte_pwren: 4g-lte-pwren {
- rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -912,7 +896,6 @@
};
&u2phy2_host {
- phy-supply = <&vdd_4g_3v3>;
status = "okay";
};

40
target/linux/rockchip/patches-6.6/054-10-v6.12-arm64-dts-rockchip-add-SPI-flash-on-NanoPC-T6.patch Normal file
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@ -0,0 +1,40 @@
From a22a629c63b1addcf2d81eaf30383c1deca5b7a9 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:56 +0200
Subject: [PATCH] arm64: dts: rockchip: add SPI flash on NanoPC-T6
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -560,6 +560,21 @@
status = "okay";
};
+/* optional on non-LTS, populated on LTS version */
+&sfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim1_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <104000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;

53
target/linux/rockchip/patches-6.6/054-11-v6.12-arm64-dts-rockchip-add-IR-receiver-to-NanoPC-T6.patch Normal file
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@ -0,0 +1,53 @@
From b70caff0f9592719b6c977e291c33192e959c9d4 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:57 +0200
Subject: [PATCH] arm64: dts: rockchip: add IR-receiver to NanoPC-T6
FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
which ends as GPIO0_D4.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -25,6 +25,13 @@
stdout-path = "serial2:1500000n8";
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
leds {
compatible = "gpio-leds";
@@ -228,7 +235,7 @@
"HEADER_10", "HEADER_08", "HEADER_32", "",
/* GPIO0 D0-D7 */
"", "", "", "",
- "", "", "", "";
+ "IR receiver [PWM3_IR_M0]", "", "", "";
};
&gpio1 {
@@ -492,6 +499,12 @@
};
};
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pcie {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

28
target/linux/rockchip/patches-6.6/054-12-v6.12-arm64-dts-rockchip-enable-GPU-on-NanoPC-T6.patch Normal file
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@ -0,0 +1,28 @@
From e86cbf999cda2d44f32ec622537024e3b923080d Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:58 +0200
Subject: [PATCH] arm64: dts: rockchip: enable GPU on NanoPC-T6
Enable the Mali GPU on FriendlyELEC NanoPC-T6
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -298,6 +298,11 @@
"", "", "", "";
};
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;

130
target/linux/rockchip/patches-6.6/054-13-v6.12-arm64-dts-rockchip-enable-USB-C-on-NanoPC-T6.patch Normal file
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@ -0,0 +1,130 @@
From c9ba75320e5a12dc9d574603acf29b38a920b40c Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:59 +0200
Subject: [PATCH] arm64: dts: rockchip: enable USB-C on NanoPC-T6
Enable the USB-C port on FriendlyELEC NanoPC-T6.
Works one way so far but still better than before.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 76 ++++++++++++++++++-
1 file changed, 72 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -137,6 +137,8 @@
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
+ regulator-always-on;
+ regulator-boot-on;
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@@ -381,11 +383,34 @@
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C";
- power-role = "dual";
- try-power-role = "sink";
+ power-role = "source";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
- sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- op-sink-microwatt = <1000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_hs: endpoint {
+ remote-endpoint = <&usb_host0_xhci_drd_sw>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_ss: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ usbc0_sbu: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_sbu>;
+ };
+ };
+ };
};
};
@@ -928,6 +953,14 @@
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy2_host {
status = "okay";
};
@@ -944,6 +977,29 @@
status = "okay";
};
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_typec_ss: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_ss>;
+ };
+
+ usbdp_phy0_typec_sbu: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&usbc0_sbu>;
+ };
+ };
+};
+
&usb_host0_ehci {
status = "okay";
};
@@ -952,6 +1008,18 @@
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+ usb-role-switch;
+
+ port {
+ usb_host0_xhci_drd_sw: endpoint {
+ remote-endpoint = <&usbc0_hs>;
+ };
+ };
+};
+
&usb_host1_ehci {
status = "okay";
};

45
target/linux/rockchip/patches-6.6/054-14-v6.12-arm64-dts-rockchip-add-Mask-Rom-key-on-NanoPC-T6.patch Normal file
View File

@ -0,0 +1,45 @@
From da439eed06ff6806f22341ab0468226afc555305 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:27:00 +0200
Subject: [PATCH] arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
Mask Rom key is connected to SARADC and can be read from OS.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
@@ -21,6 +22,20 @@
mmc1 = &sdmmc;
};
+ adc-keys-0 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "Mask Rom";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <2000>;
+ };
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};

28
target/linux/rockchip/patches-6.6/054-15-v6.12-arm64-dts-rockchip-use-correct-fcs-suspend-voltage-selecto.patch Normal file
View File

@ -0,0 +1,28 @@
From 170c77276d470a63d22a2634a38846dd88538637 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Thu, 29 Aug 2024 15:20:58 +0200
Subject: [PATCH] arm64: dts: rockchip: use correct
fcs,suspend-voltage-selector on NanoPC-T6
A remant from moving from the vendor kernel, the regulator is using
a fairchild fcs prefix instead of rockchip,* in the mainline kernel
according to its binding.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -366,7 +366,7 @@
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
- rockchip,suspend-voltage-selector = <1>;
+ fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;

10
target/linux/rockchip/patches-6.6/120-arm64-dts-rockchip-add-led-aliases-and-stop-heartbeat-for-nanopc-t6.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -19,6 +19,10 @@ @@ -20,6 +20,10 @@
aliases { aliases {
mmc0 = &sdhci; mmc0 = &sdhci;
mmc1 = &sdmmc; mmc1 = &sdmmc;
@ -10,8 +10,8 @@
+ led-upgrade = &sys_led; + led-upgrade = &sys_led;
}; };
chosen { adc-keys-0 {
@@ -31,7 +35,7 @@ @@ -53,7 +57,7 @@
sys_led: led-0 { sys_led: led-0 {
gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
label = "system-led"; label = "system-led";

12
target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
View File

@ -1,11 +1,11 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -547,7 +547,7 @@ @@ -616,7 +616,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp; disable-wp;
no-mmc;
no-sdio;
- sd-uhs-sdr104; - sd-uhs-sdr104;
+ sd-uhs-sdr50; + sd-uhs-sdr50;
vmmc-supply = <&vcc_3v3_s3>; vmmc-supply = <&vcc3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>; vqmmc-supply = <&vccio_sd_s0>;
status = "okay"; status = "okay";