ramips/mt7621: drop the weak reordering patch

In order to fix random hangs on MT7621, we've been selecting
WEAK_REORDERING_BEYOND_LLSC for years [1]. However, these random hangs have been
most likely caused by an oversight in the MIPS implementation of the kernel
memory consistency model, which has already been fixed for some time (and
backported to stable) [2].

Manually refreshed:
321-mt7621-timer.patch

[1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=5c971cd6fdd7298a2017bdb6bea870088eddb8b9
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/mips?h=linux-5.4.y&id=42344113ba7a1ed7b5654cd5270af0d5698d8521

Suggested-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Tested-by: Donald Hoskins <grommish@gmail.com>
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: maurerr <mariusd84@gmail.com>

target/linux/ramips/patches-5.10/202-weak_reordering.patch

@@ -1,10 +0,0 @@
---- a/arch/mips/ralink/Kconfig
-+++ b/arch/mips/ralink/Kconfig
-@@ -57,6 +57,7 @@ choice
- 		select CLKSRC_MIPS_GIC
- 		select HAVE_PCI if PCI_MT7621
- 		select SOC_BUS
-+		select WEAK_REORDERING_BEYOND_LLSC
- endchoice
- 
- choice

target/linux/ramips/patches-5.10/321-mt7621-timer.patch

@@ -77,10 +77,10 @@
  	void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
 --- a/arch/mips/ralink/Kconfig
 +++ b/arch/mips/ralink/Kconfig
-@@ -63,6 +63,7 @@ choice
+@@ -62,6 +62,7 @@ choice
+ 		select CLKSRC_MIPS_GIC
  		select HAVE_PCI if PCI_MT7621
  		select SOC_BUS
- 		select WEAK_REORDERING_BEYOND_LLSC
 +		select GENERIC_CLOCKEVENTS_BROADCAST
  endchoice