sync ath9k with the git tree

SVN-Revision: 11902
This commit is contained in:
Imre Kaloz 2008-07-22 07:24:47 +00:00
parent e0a748c051
commit b8eb34e5c3
15 changed files with 33 additions and 219 deletions

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@ -1,15 +0,0 @@
Replace udelay(3000) with mdelay(3), because udelay(3000) fails on ARM
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/recv.c
+++ b/drivers/net/wireless/ath9k/recv.c
@@ -737,7 +737,7 @@
ath9k_hw_stoppcurecv(ah); /* disable PCU */
ath9k_hw_setrxfilter(ah, 0); /* clear recv filter */
stopped = ath9k_hw_stopdmarecv(ah); /* disable DMA engine */
- udelay(3000); /* 3ms is long enough for 1 frame */
+ mdelay(3); /* 3ms is long enough for 1 frame */
tsf = ath9k_hw_gettsf64(ah);
sc->sc_rxlink = NULL; /* just in case */
return stopped;

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@ -1,15 +0,0 @@
Add missing include statements
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/regd.c
+++ b/drivers/net/wireless/ath9k/regd.c
@@ -14,6 +14,8 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <linux/kernel.h>
+#include <linux/slab.h>
#include "ath9k.h"
#include "regd.h"
#include "regd_common.h"

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@ -1,23 +0,0 @@
Add missing device ID for AR9160
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -8329,6 +8329,8 @@
case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE:
return "Atheros 5416";
+ case AR9160_DEVID_PCI:
+ return "Atheros 9160";
case AR9280_DEVID_PCI:
case AR9280_DEVID_PCIE:
return "Atheros 9280";
@@ -8350,6 +8352,7 @@
switch (devid) {
case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE:
+ case AR9160_DEVID_PCI:
case AR9280_DEVID_PCI:
case AR9280_DEVID_PCIE:
ah = ath9k_hw_do_attach(devid, sc, mem, error);

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@ -1,16 +0,0 @@
Fix a return code check for ath9k_hw_nvram_read, this function returns
AH_TRUE when the call succeeded
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -803,7 +803,7 @@
u_int16_t magic, magic2;
int addr;
- if (ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
+ if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
&magic)) {
HDPRINTF(ah, HAL_DBG_EEPROM,
"%s: Reading Magic # failed\n", __func__);

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@ -1,64 +0,0 @@
Remove the descriptor swap, as the driver already configures the hardware for
descriptor swapping on big endian systems
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/core.c
+++ b/drivers/net/wireless/ath9k/core.c
@@ -2141,22 +2141,6 @@
memzero(dd, sizeof(*dd));
}
-/*
- * Endian Swap for transmit descriptor
- *
- * XXX: Move cpu_to_le32() into hw.c and anywhere we set them, then
- * remove this.
-*/
-void ath_desc_swap(struct ath_desc *ds)
-{
- ds->ds_link = cpu_to_le32(ds->ds_link);
- ds->ds_data = cpu_to_le32(ds->ds_data);
- ds->ds_ctl0 = cpu_to_le32(ds->ds_ctl0);
- ds->ds_ctl1 = cpu_to_le32(ds->ds_ctl1);
- ds->ds_hw[0] = cpu_to_le32(ds->ds_hw[0]);
- ds->ds_hw[1] = cpu_to_le32(ds->ds_hw[1]);
-}
-
/*************/
/* Utilities */
/*************/
--- a/drivers/net/wireless/ath9k/beacon.c
+++ b/drivers/net/wireless/ath9k/beacon.c
@@ -140,11 +140,6 @@
series[0].RateFlags = (ctsrate) ? HAL_RATESERIES_RTS_CTS : 0;
ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
ctsrate, ctsduration, series, 4, 0);
-
- /* NB: The desc swap function becomes void,
- * if descriptor swapping is not enabled
- */
- ath_desc_swap(ds);
}
/* Move everything from the vap's mcast queue to the hardware cab queue.
--- a/drivers/net/wireless/ath9k/core.h
+++ b/drivers/net/wireless/ath9k/core.h
@@ -384,7 +384,6 @@
void ath_descdma_cleanup(struct ath_softc *sc,
struct ath_descdma *dd,
struct list_head *head);
-void ath_desc_swap(struct ath_desc *ds);
/******/
/* RX */
--- a/drivers/net/wireless/ath9k/xmit.c
+++ b/drivers/net/wireless/ath9k/xmit.c
@@ -2062,7 +2062,6 @@
AH_TRUE, /* first segment */
(n_sg == 1) ? AH_TRUE : AH_FALSE, /* last segment */
ds); /* first descriptor */
- ath_desc_swap(ds);
bf->bf_lastfrm = bf;
bf->bf_ht = txctl->ht;

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@ -1,16 +0,0 @@
This patch fixes another endianness issue.
DMA descriptors must always be accessed in native endianness.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/drivers/net/wireless/ath9k/xmit.c
+++ b/drivers/net/wireless/ath9k/xmit.c
@@ -168,7 +168,7 @@
__func__, txq->axq_qnum,
ito64(bf->bf_daddr), bf->bf_desc);
} else {
- *txq->axq_link = cpu_to_le32(bf->bf_daddr);
+ *txq->axq_link = bf->bf_daddr;
DPRINTF(sc, ATH_DEBUG_XMIT, "%s: link[%u] (%p)=%llx (%p)\n",
__func__,
txq->axq_qnum, txq->axq_link,

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@ -1169,8 +1169,7 @@ void ath9k_hw_gettxintrtxqs(struct ath_hal *ah, u_int32_t *txqs);
void ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds); void ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds);
void ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, void ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah,
struct ath_desc *ds, u_int vmf); struct ath_desc *ds, u_int vmf);
enum hal_bool ath9k_hw_SetTxPowerLimit(struct ath_hal *ah, u_int32_t limit, enum hal_bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u_int32_t limit);
u_int16_t tpcInDb);
enum hal_bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); enum hal_bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah);
int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum hal_tx_queue type, int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum hal_tx_queue type,
const struct hal_txq_info *qInfo); const struct hal_txq_info *qInfo);

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@ -140,11 +140,6 @@ static void ath_beacon_setup(struct ath_softc *sc,
series[0].RateFlags = (ctsrate) ? HAL_RATESERIES_RTS_CTS : 0; series[0].RateFlags = (ctsrate) ? HAL_RATESERIES_RTS_CTS : 0;
ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
ctsrate, ctsduration, series, 4, 0); ctsrate, ctsduration, series, 4, 0);
/* NB: The desc swap function becomes void,
* if descriptor swapping is not enabled
*/
ath_desc_swap(ds);
} }
/* Move everything from the vap's mcast queue to the hardware cab queue. /* Move everything from the vap's mcast queue to the hardware cab queue.
@ -164,7 +159,7 @@ static void empty_mcastq_into_cabq(struct ath_hal *ah,
if (!cabq->axq_link) if (!cabq->axq_link)
ath9k_hw_puttxbuf(ah, cabq->axq_qnum, bfmcast->bf_daddr); ath9k_hw_puttxbuf(ah, cabq->axq_qnum, bfmcast->bf_daddr);
else else
*cabq->axq_link = cpu_to_le32(bfmcast->bf_daddr); *cabq->axq_link = bfmcast->bf_daddr;
/* append the private vap mcast list to the cabq */ /* append the private vap mcast list to the cabq */
@ -693,11 +688,7 @@ void ath9k_beacon_tasklet(unsigned long data)
if (if_id != ATH_IF_ID_ANY) { if (if_id != ATH_IF_ID_ANY) {
bf = ath_beacon_generate(sc, if_id); bf = ath_beacon_generate(sc, if_id);
if (bf != NULL) { if (bf != NULL) {
if (bflink != &bfaddr) *bflink = bf->bf_daddr;
*bflink = cpu_to_le32(
bf->bf_daddr);
else
*bflink = bf->bf_daddr;
bflink = &bf->bf_desc->ds_link; bflink = &bf->bf_desc->ds_link;
bc++; bc++;
} }

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@ -452,7 +452,7 @@ int ath_set_channel(struct ath_softc *sc, struct hal_channel *hchan)
* if we're switching; e.g. 11a to 11b/g. * if we're switching; e.g. 11a to 11b/g.
*/ */
ath_chan_change(sc, hchan); ath_chan_change(sc, hchan);
ath_update_txpow(sc, 0); /* update tx power state */ ath_update_txpow(sc); /* update tx power state */
/* /*
* Re-enable interrupts. * Re-enable interrupts.
*/ */
@ -1020,7 +1020,7 @@ int ath_open(struct ath_softc *sc, struct hal_channel *initial_chan)
* This is needed only to setup initial state * This is needed only to setup initial state
* but it's best done after a reset. * but it's best done after a reset.
*/ */
ath_update_txpow(sc, 0); ath_update_txpow(sc);
/* /*
* Setup the hardware after reset: * Setup the hardware after reset:
@ -1111,7 +1111,7 @@ static int ath_reset_end(struct ath_softc *sc, u_int32_t flag)
*/ */
ath_chan_change(sc, &sc->sc_curchan); ath_chan_change(sc, &sc->sc_curchan);
ath_update_txpow(sc, 0); /* update tx power state */ ath_update_txpow(sc); /* update tx power state */
if (sc->sc_beacons) if (sc->sc_beacons)
ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */ ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
@ -1827,29 +1827,20 @@ int ath_keyset(struct ath_softc *sc,
* Set Transmit power in HAL * Set Transmit power in HAL
* *
* This routine makes the actual HAL calls to set the new transmit power * This routine makes the actual HAL calls to set the new transmit power
* limit. This also calls back into the protocol layer setting the max * limit.
* transmit power limit.
*/ */
void ath_update_txpow(struct ath_softc *sc, u_int16_t tpcInDb) void ath_update_txpow(struct ath_softc *sc)
{ {
struct ath_hal *ah = sc->sc_ah; struct ath_hal *ah = sc->sc_ah;
u_int32_t txpow, txpowlimit; u_int32_t txpow;
txpowlimit = (sc->sc_config.txpowlimit_override) ? if (sc->sc_curtxpow != sc->sc_config.txpowlimit) {
sc->sc_config.txpowlimit_override : sc->sc_config.txpowlimit; ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit);
if (sc->sc_curtxpow != txpowlimit) {
ath9k_hw_SetTxPowerLimit(ah, txpowlimit, tpcInDb);
/* read back in case value is clamped */ /* read back in case value is clamped */
ath9k_hw_getcapability(ah, HAL_CAP_TXPOW, 1, &txpow); ath9k_hw_getcapability(ah, HAL_CAP_TXPOW, 1, &txpow);
sc->sc_curtxpow = txpow; sc->sc_curtxpow = txpow;
} }
/* Fetch max tx power level and update protocal stack */
ath9k_hw_getcapability(ah, HAL_CAP_TXPOW, 2, &txpow);
ath__update_txpow(sc, sc->sc_curtxpow, txpow);
} }
/* Return the current country and domain information */ /* Return the current country and domain information */
@ -2141,22 +2132,6 @@ void ath_descdma_cleanup(struct ath_softc *sc,
memzero(dd, sizeof(*dd)); memzero(dd, sizeof(*dd));
} }
/*
* Endian Swap for transmit descriptor
*
* XXX: Move cpu_to_le32() into hw.c and anywhere we set them, then
* remove this.
*/
void ath_desc_swap(struct ath_desc *ds)
{
ds->ds_link = cpu_to_le32(ds->ds_link);
ds->ds_data = cpu_to_le32(ds->ds_data);
ds->ds_ctl0 = cpu_to_le32(ds->ds_ctl0);
ds->ds_ctl1 = cpu_to_le32(ds->ds_ctl1);
ds->ds_hw[0] = cpu_to_le32(ds->ds_hw[0]);
ds->ds_hw[1] = cpu_to_le32(ds->ds_hw[1]);
}
/*************/ /*************/
/* Utilities */ /* Utilities */
/*************/ /*************/

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@ -384,7 +384,6 @@ void ath_desc_free(struct ath_softc *sc);
void ath_descdma_cleanup(struct ath_softc *sc, void ath_descdma_cleanup(struct ath_softc *sc,
struct ath_descdma *dd, struct ath_descdma *dd,
struct list_head *head); struct list_head *head);
void ath_desc_swap(struct ath_desc *ds);
/******/ /******/
/* RX */ /* RX */
@ -1212,7 +1211,7 @@ int ath_keyset(struct ath_softc *sc,
int ath_get_hal_qnum(u16 queue, struct ath_softc *sc); int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
int ath_get_mac80211_qnum(u_int queue, struct ath_softc *sc); int ath_get_mac80211_qnum(u_int queue, struct ath_softc *sc);
void ath_setslottime(struct ath_softc *sc); void ath_setslottime(struct ath_softc *sc);
void ath_update_txpow(struct ath_softc *sc, u_int16_t tpcInDb); void ath_update_txpow(struct ath_softc *sc);
int ath_cabq_update(struct ath_softc *); int ath_cabq_update(struct ath_softc *);
void ath_get_currentCountry(struct ath_softc *sc, void ath_get_currentCountry(struct ath_softc *sc,
struct hal_country_entry *ctry); struct hal_country_entry *ctry);
@ -1228,9 +1227,6 @@ void ath_skb_unmap_single(struct ath_softc *sc,
int direction, int direction,
dma_addr_t *pa); dma_addr_t *pa);
void ath_mcast_merge(struct ath_softc *sc, u_int32_t mfilt[2]); void ath_mcast_merge(struct ath_softc *sc, u_int32_t mfilt[2]);
void ath__update_txpow(struct ath_softc *sc,
u_int16_t txpowlimit,
u_int16_t txpowlevel);
enum hal_ht_macmode ath_cwm_macmode(struct ath_softc *sc); enum hal_ht_macmode ath_cwm_macmode(struct ath_softc *sc);
#endif /* CORE_H */ #endif /* CORE_H */

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@ -803,7 +803,7 @@ static inline enum hal_status ath9k_hw_check_eeprom(struct ath_hal *ah)
u_int16_t magic, magic2; u_int16_t magic, magic2;
int addr; int addr;
if (ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
&magic)) { &magic)) {
HDPRINTF(ah, HAL_DBG_EEPROM, HDPRINTF(ah, HAL_DBG_EEPROM,
"%s: Reading Magic # failed\n", __func__); "%s: Reading Magic # failed\n", __func__);
@ -852,9 +852,14 @@ static inline enum hal_status ath9k_hw_check_eeprom(struct ath_hal *ah)
else else
el = ahp->ah_eeprom.baseEepHeader.length; el = ahp->ah_eeprom.baseEepHeader.length;
if (el < sizeof(struct ar5416_eeprom))
el = sizeof(struct ar5416_eeprom) / sizeof(u_int16_t);
else
el = el / sizeof(u_int16_t);
eepdata = (u_int16_t *) (&ahp->ah_eeprom); eepdata = (u_int16_t *) (&ahp->ah_eeprom);
for (i = 0; i <
min(el, sizeof(struct ar5416_eeprom)) / sizeof(u_int16_t); i++) for (i = 0; i < el; i++)
sum ^= *eepdata++; sum ^= *eepdata++;
if (need_swap) { if (need_swap) {
@ -6389,9 +6394,7 @@ ath9k_hw_adc_dccal_calibrate(struct ath_hal *ah, u_int8_t numChains)
AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE); AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE);
} }
enum hal_bool enum hal_bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u_int32_t limit)
ath9k_hw_SetTxPowerLimit(struct ath_hal *ah, u_int32_t limit,
u_int16_t tpcInDb)
{ {
struct ath_hal_5416 *ahp = AH5416(ah); struct ath_hal_5416 *ahp = AH5416(ah);
struct hal_channel_internal *ichan = ah->ah_curchan; struct hal_channel_internal *ichan = ah->ah_curchan;
@ -8329,6 +8332,8 @@ static const char *ath9k_hw_devname(u_int16_t devid)
case AR5416_DEVID_PCI: case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE: case AR5416_DEVID_PCIE:
return "Atheros 5416"; return "Atheros 5416";
case AR9160_DEVID_PCI:
return "Atheros 9160";
case AR9280_DEVID_PCI: case AR9280_DEVID_PCI:
case AR9280_DEVID_PCIE: case AR9280_DEVID_PCIE:
return "Atheros 9280"; return "Atheros 9280";
@ -8350,6 +8355,7 @@ struct ath_hal *ath9k_hw_attach(u_int16_t devid, void *sc, void __iomem *mem,
switch (devid) { switch (devid) {
case AR5416_DEVID_PCI: case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE: case AR5416_DEVID_PCIE:
case AR9160_DEVID_PCI:
case AR9280_DEVID_PCI: case AR9280_DEVID_PCI:
case AR9280_DEVID_PCIE: case AR9280_DEVID_PCIE:
ah = ath9k_hw_do_attach(devid, sc, mem, error); ah = ath9k_hw_do_attach(devid, sc, mem, error);

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@ -525,6 +525,7 @@ static int ath9k_config(struct ieee80211_hw *hw,
hchan.channel = curchan->center_freq; hchan.channel = curchan->center_freq;
hchan.channelFlags = ath_chan2flags(curchan, sc); hchan.channelFlags = ath_chan2flags(curchan, sc);
sc->sc_config.txpowlimit = 2 * conf->power_level;
/* set h/w channel */ /* set h/w channel */
if (ath_set_channel(sc, &hchan) < 0) if (ath_set_channel(sc, &hchan) < 0)
@ -1061,13 +1062,6 @@ void ath_setup_channel_list(struct ath_softc *sc,
} }
} }
void ath__update_txpow(struct ath_softc *sc,
u_int16_t txpowlimit,
u_int16_t txpowlevel)
{
}
void ath_get_beaconconfig(struct ath_softc *sc, void ath_get_beaconconfig(struct ath_softc *sc,
int if_id, int if_id,
struct ath_beacon_config *conf) struct ath_beacon_config *conf)

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@ -737,7 +737,7 @@ enum hal_bool ath_stoprecv(struct ath_softc *sc)
ath9k_hw_stoppcurecv(ah); /* disable PCU */ ath9k_hw_stoppcurecv(ah); /* disable PCU */
ath9k_hw_setrxfilter(ah, 0); /* clear recv filter */ ath9k_hw_setrxfilter(ah, 0); /* clear recv filter */
stopped = ath9k_hw_stopdmarecv(ah); /* disable DMA engine */ stopped = ath9k_hw_stopdmarecv(ah); /* disable DMA engine */
udelay(3000); /* 3ms is long enough for 1 frame */ mdelay(3); /* 3ms is long enough for 1 frame */
tsf = ath9k_hw_gettsf64(ah); tsf = ath9k_hw_gettsf64(ah);
sc->sc_rxlink = NULL; /* just in case */ sc->sc_rxlink = NULL; /* just in case */
return stopped; return stopped;
@ -1380,7 +1380,7 @@ dma_addr_t ath_skb_map_single(struct ath_softc *sc,
* Use skb's entire data area instead. * Use skb's entire data area instead.
*/ */
*pa = pci_map_single(sc->pdev, skb->data, *pa = pci_map_single(sc->pdev, skb->data,
skb->end - skb->head, direction); skb_end_pointer(skb) - skb->head, direction);
return *pa; return *pa;
} }
@ -1390,5 +1390,6 @@ void ath_skb_unmap_single(struct ath_softc *sc,
dma_addr_t *pa) dma_addr_t *pa)
{ {
/* Unmap skb's entire data area */ /* Unmap skb's entire data area */
pci_unmap_single(sc->pdev, *pa, skb->end - skb->head, direction); pci_unmap_single(sc->pdev, *pa,
skb_end_pointer(skb) - skb->head, direction);
} }

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@ -14,6 +14,8 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/ */
#include <linux/kernel.h>
#include <linux/slab.h>
#include "ath9k.h" #include "ath9k.h"
#include "regd.h" #include "regd.h"
#include "regd_common.h" #include "regd_common.h"

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@ -121,7 +121,7 @@ static void ath_tx_mcastqaddbuf(struct ath_softc *sc,
DPRINTF(sc, ATH_DEBUG_TX_PROC, DPRINTF(sc, ATH_DEBUG_TX_PROC,
"%s: txq depth = %d\n", __func__, txq->axq_depth); "%s: txq depth = %d\n", __func__, txq->axq_depth);
if (txq->axq_link != NULL) { if (txq->axq_link != NULL) {
*txq->axq_link = cpu_to_le32(bf->bf_daddr); *txq->axq_link = bf->bf_daddr;
DPRINTF(sc, ATH_DEBUG_XMIT, DPRINTF(sc, ATH_DEBUG_XMIT,
"%s: link[%u](%p)=%llx (%p)\n", "%s: link[%u](%p)=%llx (%p)\n",
__func__, __func__,
@ -168,7 +168,7 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc,
__func__, txq->axq_qnum, __func__, txq->axq_qnum,
ito64(bf->bf_daddr), bf->bf_desc); ito64(bf->bf_daddr), bf->bf_desc);
} else { } else {
*txq->axq_link = cpu_to_le32(bf->bf_daddr); *txq->axq_link = bf->bf_daddr;
DPRINTF(sc, ATH_DEBUG_XMIT, "%s: link[%u] (%p)=%llx (%p)\n", DPRINTF(sc, ATH_DEBUG_XMIT, "%s: link[%u] (%p)=%llx (%p)\n",
__func__, __func__,
txq->axq_qnum, txq->axq_link, txq->axq_qnum, txq->axq_link,
@ -2062,7 +2062,6 @@ static int ath_tx_start_dma(struct ath_softc *sc,
AH_TRUE, /* first segment */ AH_TRUE, /* first segment */
(n_sg == 1) ? AH_TRUE : AH_FALSE, /* last segment */ (n_sg == 1) ? AH_TRUE : AH_FALSE, /* last segment */
ds); /* first descriptor */ ds); /* first descriptor */
ath_desc_swap(ds);
bf->bf_lastfrm = bf; bf->bf_lastfrm = bf;
bf->bf_ht = txctl->ht; bf->bf_ht = txctl->ht;