ramips: 5.10: refresh configs

Run-tested on Ubiquiti EdgeRouter X.

Compile tested on all other subtargets.

Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
This commit is contained in:
Ilya Lipnitskiy 2021-02-27 23:17:47 -08:00 committed by Adrian Schmutzler
parent 10267e1729
commit b021642cac
6 changed files with 28 additions and 28 deletions

View File

@ -1,11 +1,9 @@
CONFIG_AR8216_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AT803X_PHY=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_SYSTICK_QUIRK=y
@ -18,11 +16,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -38,14 +35,12 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_MT7620A_EVAL is not set
# CONFIG_DTB_OMEGA2P is not set
CONFIG_DTB_RT_NONE=y
# CONFIG_DTB_VOCORE2 is not set
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ATOMIC64=y
@ -87,7 +82,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
@ -106,6 +103,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y

View File

@ -1,5 +1,4 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@ -11,6 +10,7 @@ CONFIG_BOUNCE=y
CONFIG_CEVT_R4K=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MIPS_GIC=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
@ -19,11 +19,10 @@ CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_BOSTON is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -53,7 +52,6 @@ CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DIMLIB=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_GNUBEE1 is not set
# CONFIG_DTB_GNUBEE2 is not set
CONFIG_DTB_RT_NONE=y
@ -70,7 +68,6 @@ CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_IPI=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
@ -83,6 +80,7 @@ CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_GENERIC=y
@ -110,8 +108,10 @@ CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LED_TRIGGER_PHY=y
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
@ -139,6 +139,7 @@ CONFIG_MIPS_CPU_SCACHE=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
@ -152,6 +153,7 @@ CONFIG_MT7621_WDT=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_MT7621=y
CONFIG_MTD_PHYSMAP=y
@ -237,6 +239,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOC_BUS=y
# CONFIG_SOC_MT7620 is not set
CONFIG_SOC_MT7621=y
# CONFIG_SOC_RT288X is not set

View File

@ -1,5 +1,4 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@ -17,11 +16,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -37,7 +35,6 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_MT7620A_EVAL is not set
# CONFIG_DTB_OMEGA2P is not set
CONFIG_DTB_RT_NONE=y
@ -87,7 +84,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@ -105,6 +104,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y

View File

@ -1,5 +1,4 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@ -13,11 +12,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -31,7 +29,6 @@ CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_RT2880_EVAL is not set
CONFIG_DTB_RT_NONE=y
CONFIG_DTC=y
@ -76,7 +73,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@ -94,6 +93,7 @@ CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=4
CONFIG_MIPS_L1_CACHE_SHIFT_4=y
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y

View File

@ -1,5 +1,4 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@ -15,11 +14,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -34,7 +32,6 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_RT305X_EVAL is not set
CONFIG_DTB_RT_NONE=y
CONFIG_DTC=y
@ -78,7 +75,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@ -96,6 +95,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y

View File

@ -1,6 +1,5 @@
CONFIG_AR8216_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@ -14,11 +13,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_LOAD_STORE_LR=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@ -33,12 +31,10 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_RT3883_EVAL is not set
CONFIG_DTB_RT_NONE=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ATOMIC64=y
@ -78,7 +74,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@ -96,6 +94,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y