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mvebu: add support for Check Point V-81
Check Point V-80 (Quantum Spark 1590 Appliance) is an Appliance, based
on Armada 8040 (88F8040).
Specification:
- SoC : Marvell Armada 8040 (88F8040)
- RAM : DDR4 2 GiB (4x 512 MiB chip)
- Flash : eMMC 4 GiB
- Ethernet : 10x 10/100/1000 Mbps
- LAN 1-8 : Marvell 88E6393X
- WAN : Marvell 88E1512
- DMZ : Marvell 88E1512 (RJ-45/SFP combo)
- LEDs/Keys (GPIO): 11x/1x
- UART : "CONSOLE" port (USB 1.1 Type-C)
- chip : Silicon Labs CP2102N
- port : ttyS0
- settings : 115200bps 8n1
- HW Monitoring : 2x nuvoTon NCT7802Y
- USB : USB 3.0 Type-A
- Power : 12 VDC, 3.3 A
- plug : DC Plug 2.5/5.5 mm (inner/outer)
Flash instruction (common):
1. Boot V-81 normally
2. Login to the vendor CLI (default: admin/admin) and login to the Linux
CLI by `expert` command
3. Update U-Boot environment variables by the following commands
fw_setenv bootcmd_ow_usb 'usb start; load usb 0:1 ${loadaddr} boot.scr && source ${loadaddr}'
fw_setenv bootcmd_ow_sd 'load mmc 0:1 ${loadaddr} boot.scr && source ${loadaddr}'
fw_setenv bootcmd_ow_emmc 'run set_mmc_internal; mmc read ${loadaddr} ${prim_header_mmc_blk} 4 && source ${loadaddr}'
fw_setenv bootcmd 'run bootcmd_ow_usb; run bootcmd_ow_sd; run bootcmd_ow_emmc; run bootcmd_part${activePartition};'
Attention: don't forget single quatations of values to prevent
expansion of variables
4. Turn off the device
Flash instruction (USB-boot/SD-boot):
1. Extract and burn (squashfs|ext4)-sdcard.img.gz to USB storage or
MicroSD card
2. Connect that storage to V-81
3. Turn on V-81 and it will be booted with OpenWrt in that USB storage
Flash instruction (eMMC-boot):
1. Copy initramfs image, dtb and bootsctipt to the USB storage with
renaming
initramfs.bin -------> Image
dtb -----------------> armada-8040-v-81.dtb
bootscript (.scr) ---> boot.scr
2. Connect that storage to the USB 3.0 port on V-81
3. Turn on V-81 and it will be booted with OpenWrt initramfs image in
that USB storage
4. Upload (squashfs|ext4)-sysupgrade.gz to V-81
5. Perform sysupgrade with the uploaded image
6. Wait ~100 seconds to complete flashing
Reverting to stock firmware:
1. Turn on V-81 and interrupt booting by Ctrl + C
2. Select "4. Restore to Factory Defaults (local)"
3. Wait ~180 seconds to complete restoring and rebooting
Notes:
- The partition table in the internal eMMC has single partition, but
"blkdevparts=" parameter will be passed from the bootloader and that
definition will be used instead.
- The port-side LED pairs of RJ-45/SFP ports on V-81 are switched by a
GPIO pin of pin7 on &cp0_gpio2. (High(1): RJ-45, Low(0): SFP)
This needs to be switched manually.
- The MicroSD card slot is too unstable and the following messages are
printed without "marvell,xenon-phy-slow-mode;" property.
[ 97.060851] mmc0: error -84 whilst initialising SD card
[ 97.137049] mmc0: error -84 whilst initialising SD card
[ 97.214315] mmc0: error -84 whilst initialising SD card
...
- There are no detailed information about maximum power consumption
limit of the SFP port or optional DSL-SFP modules sold officially.
But the power requirement of almost DSL-SFP modules are 3.3V/700mA, so
set the maximum value of the SFP port to 2000 mW (Power Level III).
- Do not insert a MicroSD card before turning of the device when OpenWrt
installation. The stock firmware deletes all files in the first
partition automatically, to use it as a storage for logs.
MAC addresses:
LAN: 00:1C:7F:xx:xx:FA (mmcblk1boot0, ethaddr (text))
WAN: 00:1C:7F:xx:xx:F9 (mmcblk1boot0, eth2addr (text))
DMZ: 00:1C:7F:xx:xx:FB (mmcblk1boot0, eth1addr (text))
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This commit is contained in:
INAGAKI Hiroshi
parent
e782e0efe4
commit
a95739f8d9
@ -13,6 +13,9 @@ case "$board" in
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checkpoint,v-80)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "eth1"
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;;
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checkpoint,v-81)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8" "eth1 eth2"
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;;
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globalscale,mochabin)
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ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "eth0 eth2"
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;;
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@ -9,7 +9,8 @@ REQUIRE_IMAGE_METADATA=1
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platform_check_image() {
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case "$(board_name)" in
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checkpoint,v-80)
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checkpoint,v-80|\
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checkpoint,v-81)
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local root="$(cmdline_get_var root)"
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case "$root" in
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PARTUUID=????????-02) # USB or SD
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@ -55,7 +56,8 @@ platform_check_image() {
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platform_do_upgrade() {
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case "$(board_name)" in
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checkpoint,v-80)
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checkpoint,v-80|\
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checkpoint,v-81)
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local root="$(cmdline_get_var root)"
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case "$root" in
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PARTUUID=????????-02) # USB or SD
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@ -91,7 +93,8 @@ platform_do_upgrade() {
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}
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platform_copy_config() {
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case "$(board_name)" in
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checkpoint,v-80)
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checkpoint,v-80|\
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checkpoint,v-81)
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local root="$(cmdline_get_var root)"
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case "$root" in
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PARTUUID=????????-02) # USB or SD
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@ -0,0 +1,514 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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#include "armada-8040.dtsi"
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/ {
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model = "Check Point V-81";
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compatible = "checkpoint,v-81", "marvell,armada8040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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aliases {
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp1_eth1;
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ethernet2 = &cp1_eth2;
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mmc0 = &ap_sdhci0;
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mmc1 = &cp0_sdhci0;
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led-boot = &led_power_blue;
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led-failsafe = &led_power_red;
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led-running = &led_power_blue;
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led-upgrade = &led_power_blue;
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label-mac-device = &cp1_eth2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&pmx_gpio_keys_pins>;
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pinctrl-names = "default";
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button-reset {
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label = "reset";
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gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&pmx_gpio_leds_pins>;
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pinctrl-names = "default";
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led-0 {
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gpios = <&cp1_gpio1 2 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = "management";
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};
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led-1 {
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gpios = <&cp1_gpio1 3 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = "management";
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};
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led-2 {
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gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_WAN_ONLINE;
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};
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led-3 {
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gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WAN_ONLINE;
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};
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led_power_red: led-4 {
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gpios = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_POWER;
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};
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/* populated but no hole on the case ("LTE" or "DSL") */
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led-5 {
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gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_MOBILE;
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};
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/* populated but no hole on the case ("LTE" or "DSL") */
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led-6 {
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gpios = <&cp1_gpio1 15 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_MOBILE;
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};
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/* populated but no hole on the case */
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led-7 {
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gpios = <&cp1_gpio1 16 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_WLAN;
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};
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/* populated but no hole on the case */
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led-8 {
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gpios = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WLAN;
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};
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led_power_blue: led-9 {
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gpios = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_POWER;
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};
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/* populated but no hole on the case (unused) */
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led-10 {
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gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = "unused";
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};
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};
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regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb-vbus";
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gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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};
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sfp: sfp {
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/*
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* Note: port LEDs on RJ45/SFP are switched
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* by pin7 on &cp0_gpio2
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*
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* - HIGH: RJ45
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* - LOW : SFP
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*/
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compatible = "sff,sfp";
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i2c-bus = <&cp0_i2c1>;
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los-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
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tx-disable-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <2000>;
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};
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};
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/* USB Type-C UART console */
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&uart0 {
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status = "okay";
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&ap_pinctrl {
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pmx_ap_sdhci0_pins: ap-sdhci0-pins {
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marvell,pins = "mpp12";
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marvell,function = "gpio";
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};
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};
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/* MicroSD slot */
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&ap_sdhci0 {
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status = "okay";
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pinctrl-0 = <&pmx_ap_sdhci0_pins>;
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pinctrl-names = "default";
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bus-width = <4>;
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cd-gpios = <&ap_gpio 12 GPIO_ACTIVE_LOW>;
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/*
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* Not stable in HS modes - phy needs "more calibration", so add
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* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
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*/
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marvell,xenon-phy-slow-mode;
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no-1-8-v;
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};
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&cp0_ethernet {
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status = "okay";
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};
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/* LAN1-8 (Switch) */
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&cp0_eth0 {
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status = "okay";
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phy-connection-type = "10gbase-r";
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phys = <&cp0_comphy2 0>;
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fixed-link {
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speed = <10000>;
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full-duplex;
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};
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};
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/* 2x PCA9555, 2x NCT7802Y, TCA9534A */
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&cp0_i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pmx_cp0_i2c0_pins>;
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clock-frequency = <100000>;
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gpio3: gpio@21 {
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pinctrl-0 = <&pmx_pca9555_pins>;
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pinctrl-names = "default";
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compatible = "nxp,pca9555";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&cp0_gpio2>;
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interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@22 {
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compatible = "nxp,pca9555";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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hwmon@2b {
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compatible = "nuvoton,nct7802";
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reg = <0x2b>;
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};
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hwmon@2d {
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compatible = "nuvoton,nct7802";
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reg = <0x2d>;
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};
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/* TI TCA9534A */
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gpio5: gpio@3b {
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compatible = "nxp,pca9534";
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reg = <0x3b>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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/* EEPROM */
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&cp0_i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pmx_cp0_i2c1_pins>;
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clock-frequency = <100000>;
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/* Giantec GT24C04A */
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eeprom@54 {
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compatible = "atmel,24c04";
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reg = <0x54>;
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wp-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
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read-only;
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};
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};
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&cp0_mdio {
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status = "okay";
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pinctrl-0 = <&pmx_cp0_mdio_pins>;
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pinctrl-names = "default";
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/* Marvell 88E6393X */
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switch@0 {
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compatible = "marvell,mv88e6190";
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reg = <0x0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ethernet = <&cp0_eth0>;
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phy-connection-type = "10gbase-r";
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fixed-link {
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speed = <10000>;
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full-duplex;
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};
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};
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swport1: port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&swphy1>;
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};
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swport2: port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&swphy2>;
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};
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swport3: port@3 {
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reg = <3>;
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label = "lan3";
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phy-handle = <&swphy3>;
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};
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swport4: port@4 {
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reg = <4>;
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label = "lan4";
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phy-handle = <&swphy4>;
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};
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swport5: port@5 {
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reg = <5>;
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label = "lan5";
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phy-handle = <&swphy5>;
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};
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swport6: port@6 {
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reg = <6>;
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label = "lan6";
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phy-handle = <&swphy6>;
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};
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swport7: port@7 {
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reg = <7>;
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label = "lan7";
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phy-handle = <&swphy7>;
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};
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swport8: port@8 {
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reg = <8>;
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label = "lan8";
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phy-handle = <&swphy8>;
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy1: switch-phy@1 {
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reg = <0x1>;
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};
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swphy2: switch-phy@2 {
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reg = <0x2>;
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};
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swphy3: switch-phy@3 {
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reg = <0x3>;
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};
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swphy4: switch-phy@4 {
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reg = <0x4>;
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};
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swphy5: switch-phy@5 {
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reg = <0x5>;
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};
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swphy6: switch-phy@6 {
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reg = <0x6>;
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};
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swphy7: switch-phy@7 {
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reg = <0x7>;
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};
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swphy8: switch-phy@8 {
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reg = <0x8>;
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};
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};
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};
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};
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&cp0_pinctrl {
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pmx_cp0_mdio_pins: cp0-mdio-pins {
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marvell,pins = "mpp32", "mpp34";
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marvell,function = "ge";
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};
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pmx_cp0_spi1_pins: cp0-spi0-pins {
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marvell,pins = "mpp40", "mpp41", "mpp42", "mpp43";
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marvell,function = "spi0";
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};
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|
||||
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
|
||||
marvell,pins = "mpp56", "mpp57","mpp58", "mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
pmx_cp1_rgmii1_pins: cp1-rgmii1-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
pmx_pca9555_pins: pca9555-pins {
|
||||
marvell,pins = "mpp33";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 Type-A */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
|
||||
dr_mode = "host";
|
||||
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
|
||||
phy-names = "cp0-usb3h0-comphy", "utmi";
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp1_rgmii1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* "DMZ" (RJ45/SFP) */
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
};
|
||||
|
||||
/* "WAN" */
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "sgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
phys = <&cp1_comphy1 2>;
|
||||
};
|
||||
|
||||
&cp1_mdio {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp1_mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
/*
|
||||
* LED[0] (Green): LINK/ACT
|
||||
* LED[1] (Amber): SPEED 100/1000M
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x61>;
|
||||
sfp = <&sfp>;
|
||||
};
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
/*
|
||||
* LED[0] (Green): LINK/ACT
|
||||
* LED[1] (Amber): SPEED 100/1000M
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x61>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_pinctrl {
|
||||
pmx_gpio_keys_pins: gpio-keys-pins {
|
||||
marvell,pins = "mpp31";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_leds_pins: gpio-leds-pins {
|
||||
marvell,pins = "mpp2", "mpp3", "mpp6", "mpp7", "mpp11", "mpp14",
|
||||
"mpp15", "mpp16", "mpp24", "mpp26";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_cp1_mdio_pins: mdio-pins {
|
||||
marvell,pins = "mpp4", "mpp5";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
};
|
||||
@ -33,6 +33,24 @@ define Device/checkpoint_v-80
|
||||
endef
|
||||
TARGET_DEVICES += checkpoint_v-80
|
||||
|
||||
define Device/checkpoint_v-81
|
||||
$(call Device/Default-arm64)
|
||||
DEVICE_VENDOR := Check Point
|
||||
DEVICE_MODEL := V-81
|
||||
SOC := armada-8040
|
||||
BOOT_SCRIPT := v-80
|
||||
IMAGES += sysupgrade.gz
|
||||
IMAGE/sysupgrade.gz := boot-scr eMMC | append-bootscript | pad-to 2048 | \
|
||||
append-kernel | \
|
||||
sysupgrade-tar kernel=$$$$@ dtb=$$(KDIR)/image-$$(DEVICE_DTS).dtb | \
|
||||
gzip | append-metadata
|
||||
ARTIFACTS := initramfs.dtb initramfs.scr
|
||||
ARTIFACT/initramfs.dtb := append-dtb
|
||||
ARTIFACT/initramfs.scr := boot-scr INIT | append-bootscript
|
||||
DEVICE_PACKAGES := kmod-hwmon-nct7802 kmod-rtc-ds1307
|
||||
endef
|
||||
TARGET_DEVICES += checkpoint_v-81
|
||||
|
||||
define Device/globalscale_mochabin
|
||||
$(call Device/Default-arm64)
|
||||
DEVICE_VENDOR := Globalscale
|
||||
|
||||
Loading…
Reference in New Issue
Block a user