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kernel: update bcma to code from v3.17-rc1
This is needed for some new patches. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 42221
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@ -109,7 +109,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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switch (core->id.id) {
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case BCMA_CORE_4706_CHIPCOMMON:
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case BCMA_CORE_CHIPCOMMON:
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+ case BCMA_CORE_CHIPCOMMON_B:
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+ case BCMA_CORE_NS_CHIPCOMMON_B:
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case BCMA_CORE_PCI:
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case BCMA_CORE_PCIE:
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case BCMA_CORE_PCIE2:
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@ -118,7 +118,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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}
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+ /* Init CC core */
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+ core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON_B);
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+ core = bcma_find_core(bus, BCMA_CORE_NS_CHIPCOMMON_B);
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+ if (core) {
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+ bus->drv_cc_b.core = core;
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+ bcma_core_chipcommon_b_init(&bus->drv_cc_b);
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@ -142,7 +142,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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/* Some specific cores don't need wrappers */
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switch (core->id.id) {
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case BCMA_CORE_4706_MAC_GBIT_COMMON:
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+ case BCMA_CORE_CHIPCOMMON_B:
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+ case BCMA_CORE_NS_CHIPCOMMON_B:
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/* Not used yet: case BCMA_CORE_OOB_ROUTER: */
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break;
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default:
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@ -617,7 +617,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+}
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+
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+static const struct bcma_device_id bcma_pcie2_table[] = {
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+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_PCIEG2, BCMA_ANY_REV, BCMA_ANY_CLASS),
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+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_PCIEG2, BCMA_ANY_REV, BCMA_ANY_CLASS),
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+ BCMA_CORETABLE_END
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+};
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+MODULE_DEVICE_TABLE(bcma, bcma_pcie2_table);
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@ -996,17 +996,17 @@
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{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
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{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
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{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
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+ { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
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+ { BCMA_CORE_DMA, "DMA" },
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+ { BCMA_CORE_SDIO3, "SDIO3" },
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+ { BCMA_CORE_USB20, "USB 2.0" },
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+ { BCMA_CORE_USB30, "USB 3.0" },
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+ { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
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+ { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
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+ { BCMA_CORE_ROM, "ROM" },
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+ { BCMA_CORE_NAND, "NAND flash controller" },
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+ { BCMA_CORE_QSPI, "SPI flash controller" },
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+ { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
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+ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
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+ { BCMA_CORE_NS_DMA, "DMA" },
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+ { BCMA_CORE_NS_SDIO3, "SDIO3" },
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+ { BCMA_CORE_NS_USB20, "USB 2.0" },
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+ { BCMA_CORE_NS_USB30, "USB 3.0" },
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+ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
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+ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
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+ { BCMA_CORE_NS_ROM, "ROM" },
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+ { BCMA_CORE_NS_NAND, "NAND flash controller" },
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+ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
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+ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
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+ { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
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{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
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{ BCMA_CORE_ALTA, "ALTA (I2S)" },
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@ -1327,17 +1327,17 @@
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_4706_CHIPCOMMON 0x500
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+#define BCMA_CORE_PCIEG2 0x501
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+#define BCMA_CORE_DMA 0x502
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+#define BCMA_CORE_SDIO3 0x503
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+#define BCMA_CORE_USB20 0x504
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+#define BCMA_CORE_USB30 0x505
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+#define BCMA_CORE_A9JTAG 0x506
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+#define BCMA_CORE_DDR23 0x507
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+#define BCMA_CORE_ROM 0x508
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+#define BCMA_CORE_NAND 0x509
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+#define BCMA_CORE_QSPI 0x50A
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+#define BCMA_CORE_CHIPCOMMON_B 0x50B
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+#define BCMA_CORE_NS_PCIEG2 0x501
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+#define BCMA_CORE_NS_DMA 0x502
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+#define BCMA_CORE_NS_SDIO3 0x503
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+#define BCMA_CORE_NS_USB20 0x504
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+#define BCMA_CORE_NS_USB30 0x505
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+#define BCMA_CORE_NS_A9JTAG 0x506
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+#define BCMA_CORE_NS_DDR23 0x507
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+#define BCMA_CORE_NS_ROM 0x508
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+#define BCMA_CORE_NS_NAND 0x509
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+#define BCMA_CORE_NS_QSPI 0x50A
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+#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
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#define BCMA_CORE_4706_SOC_RAM 0x50E
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+#define BCMA_CORE_ARMCA9 0x510
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#define BCMA_CORE_4706_MAC_GBIT 0x52D
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@ -603,6 +603,35 @@
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#include <linux/bcma/bcma_driver_mips.h>
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#include <linux/bcma/bcma_driver_gmac_cmn.h>
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#include <linux/ssb/ssb.h> /* SPROM sharing */
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@@ -72,17 +73,17 @@ struct bcma_host_ops {
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_4706_CHIPCOMMON 0x500
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-#define BCMA_CORE_PCIEG2 0x501
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-#define BCMA_CORE_DMA 0x502
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-#define BCMA_CORE_SDIO3 0x503
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-#define BCMA_CORE_USB20 0x504
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-#define BCMA_CORE_USB30 0x505
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-#define BCMA_CORE_A9JTAG 0x506
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-#define BCMA_CORE_DDR23 0x507
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-#define BCMA_CORE_ROM 0x508
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-#define BCMA_CORE_NAND 0x509
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-#define BCMA_CORE_QSPI 0x50A
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-#define BCMA_CORE_CHIPCOMMON_B 0x50B
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+#define BCMA_CORE_NS_PCIEG2 0x501
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+#define BCMA_CORE_NS_DMA 0x502
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+#define BCMA_CORE_NS_SDIO3 0x503
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+#define BCMA_CORE_NS_USB20 0x504
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+#define BCMA_CORE_NS_USB30 0x505
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+#define BCMA_CORE_NS_A9JTAG 0x506
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+#define BCMA_CORE_NS_DDR23 0x507
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+#define BCMA_CORE_NS_ROM 0x508
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+#define BCMA_CORE_NS_NAND 0x509
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+#define BCMA_CORE_NS_QSPI 0x50A
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+#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
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#define BCMA_CORE_4706_SOC_RAM 0x50E
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#define BCMA_CORE_ARMCA9 0x510
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#define BCMA_CORE_4706_MAC_GBIT 0x52D
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@@ -157,6 +158,9 @@ struct bcma_host_ops {
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/* Chip IDs of PCIe devices */
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#define BCMA_CHIP_ID_BCM4313 0x4313
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@ -808,3 +837,34 @@
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+void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
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+
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+#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -32,17 +32,17 @@ static const struct bcma_device_id_name
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{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
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{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
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{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
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- { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
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- { BCMA_CORE_DMA, "DMA" },
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- { BCMA_CORE_SDIO3, "SDIO3" },
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- { BCMA_CORE_USB20, "USB 2.0" },
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- { BCMA_CORE_USB30, "USB 3.0" },
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- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
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- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
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- { BCMA_CORE_ROM, "ROM" },
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- { BCMA_CORE_NAND, "NAND flash controller" },
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- { BCMA_CORE_QSPI, "SPI flash controller" },
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- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
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+ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
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+ { BCMA_CORE_NS_DMA, "DMA" },
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+ { BCMA_CORE_NS_SDIO3, "SDIO3" },
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+ { BCMA_CORE_NS_USB20, "USB 2.0" },
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+ { BCMA_CORE_NS_USB30, "USB 3.0" },
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+ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
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+ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
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+ { BCMA_CORE_NS_ROM, "ROM" },
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+ { BCMA_CORE_NS_NAND, "NAND flash controller" },
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+ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
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+ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
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{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
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{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
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{ BCMA_CORE_ALTA, "ALTA (I2S)" },
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@ -327,6 +327,35 @@
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#include <linux/bcma/bcma_driver_mips.h>
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#include <linux/bcma/bcma_driver_gmac_cmn.h>
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#include <linux/ssb/ssb.h> /* SPROM sharing */
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@@ -72,17 +73,17 @@ struct bcma_host_ops {
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_4706_CHIPCOMMON 0x500
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-#define BCMA_CORE_PCIEG2 0x501
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-#define BCMA_CORE_DMA 0x502
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-#define BCMA_CORE_SDIO3 0x503
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-#define BCMA_CORE_USB20 0x504
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-#define BCMA_CORE_USB30 0x505
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-#define BCMA_CORE_A9JTAG 0x506
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-#define BCMA_CORE_DDR23 0x507
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-#define BCMA_CORE_ROM 0x508
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-#define BCMA_CORE_NAND 0x509
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-#define BCMA_CORE_QSPI 0x50A
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-#define BCMA_CORE_CHIPCOMMON_B 0x50B
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+#define BCMA_CORE_NS_PCIEG2 0x501
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+#define BCMA_CORE_NS_DMA 0x502
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+#define BCMA_CORE_NS_SDIO3 0x503
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+#define BCMA_CORE_NS_USB20 0x504
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+#define BCMA_CORE_NS_USB30 0x505
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+#define BCMA_CORE_NS_A9JTAG 0x506
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+#define BCMA_CORE_NS_DDR23 0x507
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+#define BCMA_CORE_NS_ROM 0x508
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+#define BCMA_CORE_NS_NAND 0x509
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+#define BCMA_CORE_NS_QSPI 0x50A
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+#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
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#define BCMA_CORE_4706_SOC_RAM 0x50E
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#define BCMA_CORE_ARMCA9 0x510
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#define BCMA_CORE_4706_MAC_GBIT 0x52D
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@@ -157,6 +158,9 @@ struct bcma_host_ops {
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/* Chip IDs of PCIe devices */
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#define BCMA_CHIP_ID_BCM4313 0x4313
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@ -506,3 +535,34 @@
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+void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
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+
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+#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -32,17 +32,17 @@ static const struct bcma_device_id_name
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{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
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{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
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{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
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- { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
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- { BCMA_CORE_DMA, "DMA" },
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- { BCMA_CORE_SDIO3, "SDIO3" },
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- { BCMA_CORE_USB20, "USB 2.0" },
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- { BCMA_CORE_USB30, "USB 3.0" },
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- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
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- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
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- { BCMA_CORE_ROM, "ROM" },
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- { BCMA_CORE_NAND, "NAND flash controller" },
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- { BCMA_CORE_QSPI, "SPI flash controller" },
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- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
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+ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
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+ { BCMA_CORE_NS_DMA, "DMA" },
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+ { BCMA_CORE_NS_SDIO3, "SDIO3" },
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+ { BCMA_CORE_NS_USB20, "USB 2.0" },
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+ { BCMA_CORE_NS_USB30, "USB 3.0" },
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+ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
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+ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
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+ { BCMA_CORE_NS_ROM, "ROM" },
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+ { BCMA_CORE_NS_NAND, "NAND flash controller" },
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+ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
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+ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
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{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
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{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
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{ BCMA_CORE_ALTA, "ALTA (I2S)" },
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