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uboot-lantiq: VGV7510KW22 - use ddr ram params from brnboot

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Signed-off-by: Mathias Kresin <dev@kresin.me>
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Mathias Kresin 2016-05-21 12:13:39 +02:00 committed by John Crispin
parent 382282eca9
commit a22feb4c78
1 changed files with 5 additions and 5 deletions
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10
package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch
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@ -166,9 +166,9 @@
@@ -0,0 +1,71 @@ @@ -0,0 +1,71 @@
+/* +/*
+ * Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com> + * Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+ * Based on code by: + * Copyright (C) 2016 Mathias Kresin <dev@kresin.me>
+ * Daniel Schwierzeck, daniel.schwierzeck@googlemail.com + *
+ * and Lantiq Deutschland GmbH + * The values have been extracted from original brnboot.
+ * + *
+ * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+
+ */ + */
@ -204,7 +204,7 @@
+#define MC_CCR28_VALUE 0x0 +#define MC_CCR28_VALUE 0x0
+#define MC_CCR29_VALUE 0x0 +#define MC_CCR29_VALUE 0x0
+#define MC_CCR30_VALUE 0x798 +#define MC_CCR30_VALUE 0x798
+#define MC_CCR31_VALUE 0x0 +#define MC_CCR31_VALUE 0x2040F
+#define MC_CCR32_VALUE 0x0 +#define MC_CCR32_VALUE 0x0
+#define MC_CCR33_VALUE 0x650000 +#define MC_CCR33_VALUE 0x650000
+#define MC_CCR34_VALUE 0x200C8 +#define MC_CCR34_VALUE 0x200C8
@ -220,7 +220,7 @@
+#define MC_CCR44_VALUE 0x566504 +#define MC_CCR44_VALUE 0x566504
+#define MC_CCR45_VALUE 0x565F17 +#define MC_CCR45_VALUE 0x565F17
+#define MC_CCR46_VALUE 0x565F17 +#define MC_CCR46_VALUE 0x565F17
+#define MC_CCR47_VALUE 0x0 +#define MC_CCR47_VALUE 0x2040F
+#define MC_CCR48_VALUE 0x0 +#define MC_CCR48_VALUE 0x0
+#define MC_CCR49_VALUE 0x0 +#define MC_CCR49_VALUE 0x0
+#define MC_CCR50_VALUE 0x0 +#define MC_CCR50_VALUE 0x0