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mediatek: add missing DTS entries for WED on MT7986
Needed to support WLAN offloading Signed-off-by: Felix Fietkau <nbd@nbd.name>
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commit
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@ -86,6 +86,46 @@
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no-map;
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no-map;
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reg = <0 0x4fc00000 0 0x00100000>;
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reg = <0 0x4fc00000 0 0x00100000>;
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};
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};
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wo_emi0: wo-emi@4fd00000 {
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reg = <0 0x4fd00000 0 0x40000>;
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no-map;
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};
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wo_emi1: wo-emi@4fd40000 {
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reg = <0 0x4fd40000 0 0x40000>;
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no-map;
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};
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wo_ilm0: wo-ilm@151e0000 {
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reg = <0 0x151e0000 0 0x8000>;
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no-map;
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};
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wo_ilm1: wo-ilm@151f0000 {
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reg = <0 0x151f0000 0 0x8000>;
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no-map;
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};
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wo_data: wo-data@4fd80000 {
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reg = <0 0x4fd80000 0 0x240000>;
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no-map;
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};
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wo_dlm0: wo-dlm@151e8000 {
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reg = <0 0x151e8000 0 0x2000>;
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no-map;
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};
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wo_dlm1: wo-dlm@151f8000 {
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reg = <0 0x151f8000 0 0x2000>;
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no-map;
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};
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wo_boot: wo-boot@15194000 {
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reg = <0 0x15194000 0 0x1000>;
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no-map;
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};
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};
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};
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timer {
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timer {
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@ -577,12 +617,18 @@
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reg = <0 0x10003000 0 0x10>;
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reg = <0 0x10003000 0 0x10>;
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};
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};
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wed0: wed@15010000 {
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wed0: wed@15010000 {
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compatible = "mediatek,mt7986-wed",
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compatible = "mediatek,mt7986-wed",
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"syscon";
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"syscon";
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reg = <0 0x15010000 0 0x1000>;
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reg = <0 0x15010000 0 0x1000>;
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interrupt-parent = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
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<&wo_data>, <&wo_boot>;
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memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
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"wo-data", "wo-boot";
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mediatek,wo-ccif = <&wo_ccif0>;
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};
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};
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wed1: wed@15011000 {
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wed1: wed@15011000 {
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@ -591,6 +637,25 @@
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reg = <0 0x15011000 0 0x1000>;
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reg = <0 0x15011000 0 0x1000>;
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interrupt-parent = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
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<&wo_data>, <&wo_boot>;
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memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
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"wo-data", "wo-boot";
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mediatek,wo-ccif = <&wo_ccif1>;
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};
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wo_ccif0: syscon@151a5000 {
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compatible = "mediatek,mt7986-wo-ccif", "syscon";
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reg = <0 0x151a5000 0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
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};
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wo_ccif1: syscon@151ad000 {
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compatible = "mediatek,mt7986-wo-ccif", "syscon";
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reg = <0 0x151ad000 0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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eth: ethernet@15100000 {
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eth: ethernet@15100000 {
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