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refresh 2.6.30 patches
SVN-Revision: 16241
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c739ce1888
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9a022a7330
@ -21,11 +21,9 @@ Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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arch/mips/include/asm/delay.h | 58 +++++++++++++++++++++++++------------
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3 files changed, 57 insertions(+), 20 deletions(-)
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diff --git a/arch/mips/Makefile b/arch/mips/Makefile
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index a25c2e5..1ee5504 100644
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -120,7 +120,14 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
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@@ -120,7 +120,14 @@ cflags-$(CONFIG_CPU_R4300) += -march=r43
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cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
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cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
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cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
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@ -41,8 +39,6 @@ index a25c2e5..1ee5504 100644
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cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
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-Wa,-mips32 -Wa,--trap
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cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
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diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
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index 71f5c5c..95256a8 100644
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--- a/arch/mips/include/asm/compiler.h
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+++ b/arch/mips/include/asm/compiler.h
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@@ -1,5 +1,6 @@
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@ -66,8 +62,6 @@ index 71f5c5c..95256a8 100644
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+#endif
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+
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#endif /* _ASM_COMPILER_H */
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diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
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index b0bccd2..00d7969 100644
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--- a/arch/mips/include/asm/delay.h
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+++ b/arch/mips/include/asm/delay.h
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@@ -7,6 +7,7 @@
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@ -78,7 +72,7 @@ index b0bccd2..00d7969 100644
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*/
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#ifndef _ASM_DELAY_H
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#define _ASM_DELAY_H
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@@ -48,6 +49,43 @@ static inline void __delay(unsigned long loops)
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@@ -48,6 +49,43 @@ static inline void __delay(unsigned long
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: "0" (loops), "r" (1));
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}
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@ -122,7 +116,7 @@ index b0bccd2..00d7969 100644
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/*
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* Division by multiplication: you don't have to worry about
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@@ -62,8 +100,6 @@ static inline void __delay(unsigned long loops)
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@@ -62,8 +100,6 @@ static inline void __delay(unsigned long
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static inline void __udelay(unsigned long usecs, unsigned long lpj)
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{
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@ -131,7 +125,7 @@ index b0bccd2..00d7969 100644
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/*
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* The rates of 128 is rounded wrongly by the catchall case
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* for 64-bit. Excessive precission? Probably ...
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@@ -77,23 +113,7 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
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@@ -77,23 +113,7 @@ static inline void __udelay(unsigned lon
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0x80000000ULL) >> 32);
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#endif
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@ -156,8 +150,3 @@ index b0bccd2..00d7969 100644
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}
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#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
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--
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1.6.0.4
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@ -1,6 +1,6 @@
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -603,6 +603,9 @@ else
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@@ -610,6 +610,9 @@ else
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load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
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endif
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