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ar71xx: fix NAND controller base for QCA955x SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34942
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@ -50,7 +50,7 @@
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#define QCA955X_EHCI_SIZE 0x200
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+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
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+#define QCA955X_GMAC_SIZE 0x40
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+#define QCA955X_NFC_BASE 0x1b000200
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+#define QCA955X_NFC_BASE 0x1b800200
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+#define QCA955X_NFC_SIZE 0xb8
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#define AR9300_OTP_BASE 0x14000
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@ -48,7 +48,7 @@
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#define QCA955X_EHCI_SIZE 0x200
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+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
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+#define QCA955X_GMAC_SIZE 0x40
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+#define QCA955X_NFC_BASE 0x1b000200
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+#define QCA955X_NFC_BASE 0x1b800200
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+#define QCA955X_NFC_SIZE 0xb8
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#define AR9300_OTP_BASE 0x14000
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