diff --git a/package/boot/uboot-sifiveu/Makefile b/package/boot/uboot-sifiveu/Makefile new file mode 100644 index 00000000000..5def1c1fcb8 --- /dev/null +++ b/package/boot/uboot-sifiveu/Makefile @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2022 OpenWrt.org +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_RELEASE:=1 +PKG_VERSION:=2022.10 +PKG_HASH:=50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8 + +include $(INCLUDE_DIR)/u-boot.mk +include $(INCLUDE_DIR)/package.mk + +define U-Boot/Default + BUILD_TARGET:=sifiveu + BUILD_DEVICES=$(1) + UBOOT_IMAGE:=u-boot.itb + DTS_DIR:=arch/riscv/dts + UENV:=default + DEFAULT:=y +endef + +define U-Boot/sifive_unleashed + NAME:=SiFive Unleashed + OPENSBI:=generic + DEPENDS:=+opensbi_generic + UBOOT_DTS:=hifive-unleashed-a00.dtb + BUILD_DEVICES:=sifive_unleashed +endef + +define U-Boot/sifive_unmatched + NAME:=SiFive Unmatched + OPENSBI:=generic + DEPENDS:=+opensbi_generic + UBOOT_DTS:=hifive-unmatched-a00.dtb + BUILD_DEVICES:=sifive_unmatched +endef + +UBOOT_TARGETS := \ + sifive_unleashed \ + sifive_unmatched + +UBOOT_MAKE_FLAGS += \ + OPENSBI=$(STAGING_DIR_IMAGE)/fw_dynamic-${OPENSBI}.bin + +define Build/Configure + $(call Build/Configure/U-Boot) + sed -i 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config +endef + +define Build/InstallDev + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(INSTALL_BIN) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE) + $(INSTALL_BIN) $(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)-spl + $(INSTALL_BIN) $(PKG_BUILD_DIR)/$(DTS_DIR)/$(UBOOT_DTS) $(STAGING_DIR_IMAGE)/$(UBOOT_DTS) + + mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \ + $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr +endef + +$(eval $(call BuildPackage/U-Boot)) diff --git a/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch b/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch new file mode 100644 index 00000000000..27cda75326f --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0002-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch @@ -0,0 +1,104 @@ +From 725595e667cc4423347c255da8ca4c5b3aa0980a Mon Sep 17 00:00:00 2001 +From: Vincent Chen +Date: Mon, 15 Nov 2021 03:31:04 -0800 +Subject: [PATCH 2/8] board: sifive: spl: Initialized the PWM setting in the + SPL stage + +LEDs and multiple fans can be controlled by SPL. This patch ensures +that all fans have been enabled in the SPL stage. In addition, the +LED's color will be set to yellow. +--- + board/sifive/unmatched/Makefile | 1 + + board/sifive/unmatched/pwm.c | 57 +++++++++++++++++++++++++++++++++ + board/sifive/unmatched/spl.c | 2 ++ + 3 files changed, 60 insertions(+) + create mode 100644 board/sifive/unmatched/pwm.c + +diff --git a/board/sifive/unmatched/Makefile b/board/sifive/unmatched/Makefile +index 1345330089..5df01982e9 100644 +--- a/board/sifive/unmatched/Makefile ++++ b/board/sifive/unmatched/Makefile +@@ -9,3 +9,4 @@ obj-y += spl.o + else + obj-y += unmatched.o + endif ++obj-y += pwm.o +diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c +new file mode 100644 +index 0000000000..e1cc02310a +--- /dev/null ++++ b/board/sifive/unmatched/pwm.c +@@ -0,0 +1,57 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2021, SiFive Inc ++ * ++ * Authors: ++ * Vincent Chen ++ * David Abdurachmanov ++ */ ++ ++#include ++#include ++ ++struct pwm_sifive_regs { ++ unsigned int cfg; /* PWM configuration register */ ++ unsigned int pad0; /* Reserved */ ++ unsigned int cnt; /* PWM count register */ ++ unsigned int pad1; /* Reserved */ ++ unsigned int pwms; /* Scaled PWM count register */ ++ unsigned int pad2; /* Reserved */ ++ unsigned int pad3; /* Reserved */ ++ unsigned int pad4; /* Reserved */ ++ unsigned int cmp0; /* PWM 0 compare register */ ++ unsigned int cmp1; /* PWM 1 compare register */ ++ unsigned int cmp2; /* PWM 2 compare register */ ++ unsigned int cmp3; /* PWM 3 compare register */ ++}; ++ ++#define PWM0_BASE 0x10020000 ++#define PWM1_BASE 0x10021000 ++#define PWM_CFG_INIT 0x1000 ++#define PWM_CMP_ENABLE_VAL 0x0 ++#define PWM_CMP_DISABLE_VAL 0xffff ++ ++void pwm_device_init(void) ++{ ++ struct pwm_sifive_regs *pwm0, *pwm1; ++ pwm0 = (struct pwm_sifive_regs *)PWM0_BASE; ++ pwm1 = (struct pwm_sifive_regs *)PWM1_BASE; ++ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0); ++ /* Set the 3-color PWM LEDs to yellow in SPL */ ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1); ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2); ++ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3); ++ writel(PWM_CFG_INIT, (void *)&pwm0->cfg); ++ ++ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3); ++ /* Turn on all the fans, (J21), (J23) and (J24), on the unmatched board */ ++ /* The SoC fan(J21) on the rev3 board cannot be controled by PWM_COMP0, ++ so here sets the initial value of PWM_COMP0 as DISABLE */ ++ if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3) ++ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm1->cmp1); ++ else ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp1); ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2); ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3); ++ writel(PWM_CFG_INIT, (void *)&pwm1->cfg); ++} +diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c +index 7c0beedc08..f3a661a81e 100644 +--- a/board/sifive/unmatched/spl.c ++++ b/board/sifive/unmatched/spl.c +@@ -90,6 +90,8 @@ int spl_board_init_f(void) + goto end; + } + ++ pwm_device_init(); ++ + ret = spl_gemgxl_init(); + if (ret) { + debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret); +-- +2.27.0 + diff --git a/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch b/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch new file mode 100644 index 00000000000..9820d2e2f9d --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch @@ -0,0 +1,68 @@ +From 7ead6d662a2f9d8498af6650ea38418c64b52048 Mon Sep 17 00:00:00 2001 +From: Vincent Chen +Date: Mon, 24 Jan 2022 02:42:02 -0800 +Subject: [PATCH 3/8] board: sifive: Set LED's color to purple in the U-boot + stage + +Set LED's color to purple in the U-boot stage. Because there are still +some functions to be executed before board_early_init_f(), it means +the LED's is not changed to purple instantly when entering the U-boot +stage. +--- + board/sifive/unmatched/pwm.c | 7 +++++++ + board/sifive/unmatched/unmatched.c | 6 ++++++ + configs/sifive_unmatched_defconfig | 1 + + 3 files changed, 14 insertions(+) + +diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c +index e1cc02310a..bd67672c22 100644 +--- a/board/sifive/unmatched/pwm.c ++++ b/board/sifive/unmatched/pwm.c +@@ -36,6 +36,7 @@ void pwm_device_init(void) + struct pwm_sifive_regs *pwm0, *pwm1; + pwm0 = (struct pwm_sifive_regs *)PWM0_BASE; + pwm1 = (struct pwm_sifive_regs *)PWM1_BASE; ++#ifdef CONFIG_SPL_BUILD + writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0); + /* Set the 3-color PWM LEDs to yellow in SPL */ + writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1); +@@ -54,4 +55,10 @@ void pwm_device_init(void) + writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2); + writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3); + writel(PWM_CFG_INIT, (void *)&pwm1->cfg); ++#else ++ /* Set the 3-color PWM LEDs to purple in U-boot */ ++ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp1); ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2); ++ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp3); ++#endif + } +diff --git a/board/sifive/unmatched/unmatched.c b/board/sifive/unmatched/unmatched.c +index 6295deeae2..30c082d001 100644 +--- a/board/sifive/unmatched/unmatched.c ++++ b/board/sifive/unmatched/unmatched.c +@@ -22,6 +22,12 @@ void *board_fdt_blob_setup(int *err) + return (ulong *)&_end; + } + ++int board_early_init_f(void) ++{ ++ pwm_device_init(); ++ return 0; ++} ++ + int board_init(void) + { + /* enable all cache ways */ +diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig +index d400ed0b23..0758f8e90f 100644 +--- a/configs/sifive_unmatched_defconfig ++++ b/configs/sifive_unmatched_defconfig +@@ -51,3 +51,4 @@ CONFIG_DM_SCSI=y + CONFIG_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_PCI=y ++CONFIG_BOARD_EARLY_INIT_F=y +-- +2.27.0 + diff --git a/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch b/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch new file mode 100644 index 00000000000..b5bffd22bd6 --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0004-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch @@ -0,0 +1,30 @@ +From 6ef7023c0dcfde320015ab19e0e0d423921be77d Mon Sep 17 00:00:00 2001 +From: Vincent Chen +Date: Mon, 15 Nov 2021 03:39:07 -0800 +Subject: [PATCH 1/2] board: sifive: Set LED's color to blue before jumping to + Linux + +The LED's color wil be changed from purple to blue before executing +the sysboot command. Because the sysboot command includes the image loading +from the boot partition, It means the LED's color is blue when executing +"Retrieving file: /Image.gz". +--- + include/configs/sifive-unmatched.h | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/include/configs/sifive-unmatched.h ++++ b/include/configs/sifive-unmatched.h +@@ -49,7 +49,12 @@ + "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \ + "partitions=" PARTS_DEFAULT "\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ +- BOOTENV ++ "setled_blue=mw.l 0x10020024 0x0000ffff; mw.l 0x10020028 0x0000ffff; mw.l 0x1002002c 0x0\0" \ ++ BOOTENV \ ++ "boot_extlinux=" \ ++ "run setled_blue; " \ ++ "sysboot ${devtype} ${devnum}:${distro_bootpart} any " \ ++ "${scriptaddr} ${prefix}${boot_syslinux_conf};\0" + + #define CONFIG_SYS_EEPROM_BUS_NUM 0 + diff --git a/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch b/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch new file mode 100644 index 00000000000..dc0d04151fa --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch @@ -0,0 +1,111 @@ +From 07f84ed283b913cbdf87181ae2ed65467d923df5 Mon Sep 17 00:00:00 2001 +From: Vincent Chen +Date: Mon, 24 Jan 2022 02:57:40 -0800 +Subject: [PATCH 2/2] board: sifive: spl: Set remote thermal of TMP451 to 85 + deg C for the unmatched board + +For TMP451 on the unmatched board, the default value of the remote +thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL. +--- + board/sifive/unmatched/spl.c | 29 +++++++++++++++++++++++++++++ + drivers/misc/Kconfig | 10 ++++++++++ + include/configs/sifive-unmatched.h | 4 ++++ + scripts/config_whitelist.txt | 1 + + 4 files changed, 44 insertions(+) + +--- a/board/sifive/unmatched/spl.c ++++ b/board/sifive/unmatched/spl.c +@@ -10,6 +10,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -26,6 +28,27 @@ + #define MODE_SELECT_SD 0xb + #define MODE_SELECT_MASK GENMASK(3, 0) + ++#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET 0x19 ++#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE 0x55 ++ ++static inline int init_tmp451_remote_therm_limit(void) ++{ ++ struct udevice *dev; ++ unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE; ++ int ret; ++ ++ ret = i2c_get_chip_for_busnum(CONFIG_SYS_TMP451_BUS_NUM, ++ CONFIG_SYS_I2C_TMP451_ADDR, ++ CONFIG_SYS_I2C_TMP451_ADDR_LEN, ++ &dev); ++ ++ if (!ret) ++ ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET, ++ &r_therm_limit, ++ sizeof(unsigned char)); ++ return ret; ++} ++ + static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width) + { + int ret; +@@ -92,6 +115,12 @@ int spl_board_init_f(void) + + pwm_device_init(); + ++ ret = init_tmp451_remote_therm_limit(); ++ if (ret) { ++ debug("TMP451 remote THERM limit init failed: %d\n", ret); ++ goto end; ++ } ++ + ret = spl_gemgxl_init(); + if (ret) { + debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret); +--- a/drivers/misc/Kconfig ++++ b/drivers/misc/Kconfig +@@ -536,8 +536,18 @@ config SYS_I2C_EEPROM_ADDR + depends on ID_EEPROM || I2C_EEPROM || SPL_I2C_EEPROM || CMD_EEPROM || ENV_IS_IN_EEPROM + default 0 + ++config SYS_I2C_TMP451_ADDR ++ hex "Chip address of the TMP451 device" ++ default 0 ++ + if I2C_EEPROM + ++config SYS_I2C_TMP451_ADDR_LEN ++ int "Length in bytes of the TMP451 memory array address" ++ default 1 ++ help ++ Note: This is NOT the chip address length! ++ + config SYS_I2C_EEPROM_ADDR_OVERFLOW + hex "EEPROM Address Overflow" + default 0x0 +--- a/include/configs/sifive-unmatched.h ++++ b/include/configs/sifive-unmatched.h +@@ -15,6 +15,10 @@ + + #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 + ++#define CONFIG_SYS_TMP451_BUS_NUM 0 ++#define CONFIG_SYS_I2C_TMP451_ADDR 0x4c ++#define CONFIG_SYS_I2C_TMP451_ADDR_LEN 0x1 ++ + /* Environment options */ + + #define BOOT_TARGET_DEVICES(func) \ +--- a/scripts/config_whitelist.txt ++++ b/scripts/config_whitelist.txt +@@ -1268,6 +1268,7 @@ CONFIG_SYS_TIMER_BASE + CONFIG_SYS_TIMER_COUNTER + CONFIG_SYS_TIMER_COUNTS_DOWN + CONFIG_SYS_TIMER_RATE ++CONFIG_SYS_TMP451_BUS_NUM + CONFIG_SYS_TMPVIRT + CONFIG_SYS_TSEC1_OFFSET + CONFIG_SYS_TX_ETH_BUFFER diff --git a/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch b/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch new file mode 100644 index 00000000000..3f3feb9da70 --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0008-riscv-dts-Add-few-PMU-events.patch @@ -0,0 +1,36 @@ +From c29e4d84cfa17ab96eff2a9044f486ba3c8b5c43 Mon Sep 17 00:00:00 2001 +From: Atish Patra +Date: Mon, 25 Oct 2021 11:35:41 -0700 +Subject: [PATCH] riscv: dts: Add few PMU events + +fu740 has 2 HPM counters and many HPM events defined in the fu740 manual[1]. +This patch adds some of these events and their mapping as per the +OpenSBI PMU DT binding for now. + +[1]https://sifive.cdn.prismic.io/sifive/de1491e5-077c-461d-9605-e8a0ce57337d_fu740-c000-manual-v1p3.pdf + +Signed-off-by: Atish Patra +--- + arch/riscv/dts/fu740-c000.dtsi | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/arch/riscv/dts/fu740-c000.dtsi ++++ b/arch/riscv/dts/fu740-c000.dtsi +@@ -140,6 +140,17 @@ + #size-cells = <2>; + compatible = "simple-bus"; + ranges; ++ pmu { ++ compatible = "riscv,pmu"; ++ riscv,raw-event-to-mhpmcounters = <0x00000000 0x200 0x18 ++ 0x00000000 0x400 0x18 ++ 0x00000000 0x800 0x18>; ++ riscv,event-to-mhpmcounters = <0x05 0x06 0x18 ++ 0x10009 0x10009 0x18>; ++ riscv,event-to-mhpmevent = <0x05 0x00000000 0x4000 ++ 0x06 0x00000000 0x4001 ++ 0x10008 0x00000000 0x102>; ++ }; + plic0: interrupt-controller@c000000 { + #interrupt-cells = <1>; + #address-cells = <0>; diff --git a/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch b/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch new file mode 100644 index 00000000000..87dbf984ec5 --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch @@ -0,0 +1,50 @@ +commit 1dde977518f13824b847e23275001191139bc384 +Author: Alexandre Ghiti +Date: Mon Oct 3 18:07:54 2022 +0200 + + riscv: Fix build against binutils 2.38 + + The following description is copied from the equivalent patch for the + Linux Kernel proposed by Aurelien Jarno: + + >From version 2.38, binutils default to ISA spec version 20191213. This + means that the csr read/write (csrr*/csrw*) instructions and fence.i + instruction has separated from the `I` extension, become two standalone + extensions: Zicsr and Zifencei. As the kernel uses those instruction, + this causes the following build failure: + + arch/riscv/cpu/mtrap.S: Assembler messages: + arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause' + arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc' + arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval' + arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0' + + Signed-off-by: Alexandre Ghiti + Reviewed-by: Bin Meng + Tested-by: Heinrich Schuchardt + Tested-by: Heiko Stuebner + Tested-by: Christian Stewart + Reviewed-by: Rick Chen + +diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile +index 0b80eb8d86..53d1194ffb 100644 +--- a/arch/riscv/Makefile ++++ b/arch/riscv/Makefile +@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) + CMODEL = medany + endif + +-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ ++RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C) ++ ++# Newer binutils versions default to ISA spec version 20191213 which moves some ++# instructions from the I extension to the Zicsr and Zifencei extensions. ++toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei) ++ifeq ($(toolchain-need-zicsr-zifencei),y) ++ RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei ++endif ++ ++ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \ + -mcmodel=$(CMODEL) + + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) diff --git a/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch b/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch new file mode 100644 index 00000000000..482aa1a3693 --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch @@ -0,0 +1,35 @@ +From 637800493945ffed2f454756300437a4ec86e3b1 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Wed, 19 Jul 2017 22:23:15 +0200 +Subject: mkimage: check environment for dtc binary location + +Currently mkimage assumes the dtc binary is in the path and fails +otherwise. This patch makes it check the DTC environment variable first +for the dtc binary and then fall back to the default path. This makes +it possible to call the u-boot build with make DTC=... and build a fit +image with the dtc binary not being the the default path. + +Signed-off-by: Hauke Mehrtens +Cc: Simon Glass +--- + tools/fit_image.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/tools/fit_image.c ++++ b/tools/fit_image.c +@@ -726,9 +726,14 @@ static int fit_handle_file(struct image_ + } + *cmd = '\0'; + } else if (params->datafile) { ++ const char* dtc = getenv("DTC"); ++ ++ if (!dtc) ++ dtc = MKIMAGE_DTC; ++ + /* dtc -I dts -O dtb -p 500 -o tmpfile datafile */ + snprintf(cmd, sizeof(cmd), "%s %s -o \"%s\" \"%s\"", +- MKIMAGE_DTC, params->dtc, tmpfile, params->datafile); ++ dtc, params->dtc, tmpfile, params->datafile); + debug("Trying to execute \"%s\"\n", cmd); + } else { + snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"", diff --git a/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch b/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch new file mode 100644 index 00000000000..65d14f5bece --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch @@ -0,0 +1,10 @@ +--- a/tools/Makefile ++++ b/tools/Makefile +@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \ + imximage.o \ + imx8image.o \ + imx8mimage.o \ +- kwbimage.o \ + lib/md5.o \ + lpc32xximage.o \ + mxsimage.o \ diff --git a/package/boot/uboot-sifiveu/patches/130-fix-mkimage-host-build.patch b/package/boot/uboot-sifiveu/patches/130-fix-mkimage-host-build.patch new file mode 100644 index 00000000000..cd65c1321fc --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/130-fix-mkimage-host-build.patch @@ -0,0 +1,24 @@ +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d + * 2) get public key (X509_get_pubkey) + * 3) provide der format (d2i_RSAPublicKey) + */ ++#ifdef CONFIG_TOOLS_LIBCRYPTO + static int read_pub_key(const char *keydir, const void *name, + unsigned char **pubkey, int *pubkey_len) + { +@@ -1178,6 +1179,13 @@ err_cert: + fclose(f); + return ret; + } ++#else ++static int read_pub_key(const char *keydir, const void *name, ++ unsigned char **pubkey, int *pubkey_len) ++{ ++ return -ENOSYS; ++} ++#endif + + int fit_pre_load_data(const char *keydir, void *keydest, void *fit) + { diff --git a/package/boot/uboot-sifiveu/patches/300-force-pylibfdt-build.patch b/package/boot/uboot-sifiveu/patches/300-force-pylibfdt-build.patch new file mode 100644 index 00000000000..4abf13eda86 --- /dev/null +++ b/package/boot/uboot-sifiveu/patches/300-force-pylibfdt-build.patch @@ -0,0 +1,30 @@ +--- a/Makefile ++++ b/Makefile +@@ -2028,26 +2028,7 @@ endif + # Check dtc and pylibfdt, if DTC is provided, else build them + PHONY += scripts_dtc + scripts_dtc: scripts_basic +- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \ +- $(MAKE) $(build)=scripts/dtc; \ +- else \ +- if ! $(DTC) -v >/dev/null; then \ +- echo '*** Failed to check dtc version: $(DTC)'; \ +- false; \ +- else \ +- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \ +- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \ +- false; \ +- else \ +- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \ +- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \ +- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \ +- false; \ +- fi; \ +- fi; \ +- fi; \ +- fi; \ +- fi ++ $(MAKE) $(build)=scripts/dtc + + # --------------------------------------------------------------------------- + quiet_cmd_cpp_lds = LDS $@ diff --git a/package/boot/uboot-sifiveu/uEnv-default.txt b/package/boot/uboot-sifiveu/uEnv-default.txt new file mode 100644 index 00000000000..8468a3cace0 --- /dev/null +++ b/package/boot/uboot-sifiveu/uEnv-default.txt @@ -0,0 +1,5 @@ +setenv loadkernel fatload mmc 0:3 \$kernel_addr_r Image +setenv loaddtb fatload mmc 0:3 \$fdt_addr_r dtb +setenv bootargs console=ttySIF0,115200 earlycon=sbi root=/dev/mmcblk0p4 rootwait +setenv uenvcmd run loadkernel \&\& run loaddtb \&\& booti \$kernel_addr_r - \$fdt_addr_r +run uenvcmd