diff --git a/target/linux/generic/hack-5.15/765-mxl-gpy-control-LED-reg-from-DT.patch b/target/linux/generic/hack-5.15/765-mxl-gpy-control-LED-reg-from-DT.patch index 8de3668def2..95e9749d912 100644 --- a/target/linux/generic/hack-5.15/765-mxl-gpy-control-LED-reg-from-DT.patch +++ b/target/linux/generic/hack-5.15/765-mxl-gpy-control-LED-reg-from-DT.patch @@ -55,7 +55,7 @@ Signed-off-by: David Bauer /* SGMII */ #define VSPEC1_SGMII_CTRL 0x08 #define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */ -@@ -80,6 +87,31 @@ static const struct { +@@ -80,6 +87,35 @@ static const struct { {9, 0x73}, }; @@ -64,6 +64,7 @@ Signed-off-by: David Bauer + struct device_node *node = phydev->mdio.dev.of_node; + u32 led_regs[PHY_LED_NUM_LEDS]; + int i, ret; ++ u16 val = 0xff00; + + if (!IS_ENABLED(CONFIG_OF_MDIO)) + return 0; @@ -71,8 +72,11 @@ Signed-off-by: David Bauer + if (of_property_read_u32_array(node, "mxl,led-config", led_regs, PHY_LED_NUM_LEDS)) + return 0; + ++ if (of_property_read_bool(node, "mxl,led-drive-vdd")) ++ val &= 0x0fff; ++ + /* Enable LED function handling on all ports*/ -+ phy_write(phydev, PHY_LED, 0xFF00); ++ phy_write(phydev, PHY_LED, val); + + /* Write LED register values */ + for (i = 0; i < PHY_LED_NUM_LEDS; i++) { @@ -87,7 +91,7 @@ Signed-off-by: David Bauer static int gpy_config_init(struct phy_device *phydev) { int ret; -@@ -91,7 +123,10 @@ static int gpy_config_init(struct phy_de +@@ -91,7 +127,10 @@ static int gpy_config_init(struct phy_de /* Clear all pending interrupts */ ret = phy_read(phydev, PHY_ISTAT); diff --git a/target/linux/generic/hack-6.1/765-mxl-gpy-control-LED-reg-from-DT.patch b/target/linux/generic/hack-6.1/765-mxl-gpy-control-LED-reg-from-DT.patch index d7165cb30ac..2724efa15eb 100644 --- a/target/linux/generic/hack-6.1/765-mxl-gpy-control-LED-reg-from-DT.patch +++ b/target/linux/generic/hack-6.1/765-mxl-gpy-control-LED-reg-from-DT.patch @@ -55,7 +55,7 @@ Signed-off-by: David Bauer /* SGMII */ #define VSPEC1_SGMII_CTRL 0x08 #define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */ -@@ -241,6 +248,31 @@ out: +@@ -241,6 +248,35 @@ out: return ret; } @@ -64,6 +64,7 @@ Signed-off-by: David Bauer + struct device_node *node = phydev->mdio.dev.of_node; + u32 led_regs[PHY_LED_NUM_LEDS]; + int i, ret; ++ u16 val = 0xff00; + + if (!IS_ENABLED(CONFIG_OF_MDIO)) + return 0; @@ -71,8 +72,11 @@ Signed-off-by: David Bauer + if (of_property_read_u32_array(node, "mxl,led-config", led_regs, PHY_LED_NUM_LEDS)) + return 0; + ++ if (of_property_read_bool(node, "mxl,led-drive-vdd")) ++ val &= 0x0fff; ++ + /* Enable LED function handling on all ports*/ -+ phy_write(phydev, PHY_LED, 0xFF00); ++ phy_write(phydev, PHY_LED, val); + + /* Write LED register values */ + for (i = 0; i < PHY_LED_NUM_LEDS; i++) { @@ -87,7 +91,7 @@ Signed-off-by: David Bauer static int gpy_config_init(struct phy_device *phydev) { int ret; -@@ -252,7 +284,10 @@ static int gpy_config_init(struct phy_de +@@ -252,7 +288,10 @@ static int gpy_config_init(struct phy_de /* Clear all pending interrupts */ ret = phy_read(phydev, PHY_ISTAT); diff --git a/target/linux/mediatek/patches-5.15/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch b/target/linux/mediatek/patches-5.15/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch index 598d9d0d218..6df4436ab9b 100644 --- a/target/linux/mediatek/patches-5.15/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch +++ b/target/linux/mediatek/patches-5.15/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch @@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle --- a/drivers/net/phy/mxl-gpy.c +++ b/drivers/net/phy/mxl-gpy.c -@@ -191,8 +191,11 @@ static bool gpy_2500basex_chk(struct phy +@@ -195,8 +195,11 @@ static bool gpy_2500basex_chk(struct phy phydev->speed = SPEED_2500; phydev->interface = PHY_INTERFACE_MODE_2500BASEX; @@ -28,7 +28,7 @@ Signed-off-by: Daniel Golle return true; } -@@ -216,6 +219,14 @@ static int gpy_config_aneg(struct phy_de +@@ -220,6 +223,14 @@ static int gpy_config_aneg(struct phy_de u32 adv; int ret; @@ -43,7 +43,7 @@ Signed-off-by: Daniel Golle if (phydev->autoneg == AUTONEG_DISABLE) { /* Configure half duplex with genphy_setup_forced, * because genphy_c45_pma_setup_forced does not support. -@@ -306,6 +317,8 @@ static void gpy_update_interface(struct +@@ -310,6 +321,8 @@ static void gpy_update_interface(struct switch (phydev->speed) { case SPEED_2500: phydev->interface = PHY_INTERFACE_MODE_2500BASEX; @@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, VSPEC1_SGMII_CTRL_ANEN, 0); if (ret < 0) -@@ -317,7 +330,7 @@ static void gpy_update_interface(struct +@@ -321,7 +334,7 @@ static void gpy_update_interface(struct case SPEED_100: case SPEED_10: phydev->interface = PHY_INTERFACE_MODE_SGMII; diff --git a/target/linux/mediatek/patches-6.1/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch b/target/linux/mediatek/patches-6.1/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch index d7457273712..76d8b0ef008 100644 --- a/target/linux/mediatek/patches-6.1/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch +++ b/target/linux/mediatek/patches-6.1/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch @@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle --- a/drivers/net/phy/mxl-gpy.c +++ b/drivers/net/phy/mxl-gpy.c -@@ -367,8 +367,11 @@ static bool gpy_2500basex_chk(struct phy +@@ -371,8 +371,11 @@ static bool gpy_2500basex_chk(struct phy phydev->speed = SPEED_2500; phydev->interface = PHY_INTERFACE_MODE_2500BASEX; @@ -28,7 +28,7 @@ Signed-off-by: Daniel Golle return true; } -@@ -392,6 +395,14 @@ static int gpy_config_aneg(struct phy_de +@@ -396,6 +399,14 @@ static int gpy_config_aneg(struct phy_de u32 adv; int ret; @@ -43,7 +43,7 @@ Signed-off-by: Daniel Golle if (phydev->autoneg == AUTONEG_DISABLE) { /* Configure half duplex with genphy_setup_forced, * because genphy_c45_pma_setup_forced does not support. -@@ -482,6 +493,8 @@ static void gpy_update_interface(struct +@@ -486,6 +497,8 @@ static void gpy_update_interface(struct switch (phydev->speed) { case SPEED_2500: phydev->interface = PHY_INTERFACE_MODE_2500BASEX; @@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, VSPEC1_SGMII_CTRL_ANEN, 0); if (ret < 0) -@@ -493,7 +506,7 @@ static void gpy_update_interface(struct +@@ -497,7 +510,7 @@ static void gpy_update_interface(struct case SPEED_100: case SPEED_10: phydev->interface = PHY_INTERFACE_MODE_SGMII;