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define bcm6338 SDRAM base register and make sure that the right CPU id will be used to detect a bcm6338
SVN-Revision: 16567
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@ -40,6 +40,7 @@ static const unsigned long bcm96338_regs_base[] = {
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[RSET_UDC0] = BCM_6338_UDC0_BASE,
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[RSET_UDC0] = BCM_6338_UDC0_BASE,
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[RSET_UART0] = BCM_6338_UART0_BASE,
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[RSET_UART0] = BCM_6338_UART0_BASE,
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[RSET_GPIO] = BCM_6338_GPIO_BASE,
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[RSET_GPIO] = BCM_6338_GPIO_BASE,
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[RSET_SDRAM] = BCM_6338_SDRAM_BASE,
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[RSET_SPI] = BCM_6338_SPI_BASE,
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[RSET_SPI] = BCM_6338_SPI_BASE,
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[RSET_MEMC] = BCM_6338_MEMC_BASE,
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[RSET_MEMC] = BCM_6338_MEMC_BASE,
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};
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};
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@ -310,7 +311,7 @@ void __init bcm63xx_cpu_init(void)
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expected_cpu_id = 0;
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expected_cpu_id = 0;
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switch (c->cputype) {
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switch (c->cputype) {
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case CPU_BCM6338:
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case CPU_BCM3302:
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expected_cpu_id = BCM6338_CPU_ID;
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expected_cpu_id = BCM6338_CPU_ID;
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bcm63xx_regs_base = bcm96338_regs_base;
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bcm63xx_regs_base = bcm96338_regs_base;
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bcm63xx_irqs = bcm96338_irqs;
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bcm63xx_irqs = bcm96338_irqs;
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@ -134,7 +134,9 @@ enum bcm63xx_regs_set {
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#define BCM_6338_USBDMA_BASE (0xfffe2400)
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#define BCM_6338_USBDMA_BASE (0xfffe2400)
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#define BCM_6338_ENET0_BASE (0xfffe2800)
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#define BCM_6338_ENET0_BASE (0xfffe2800)
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#define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */
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#define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */
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#define BCM_6338_MEMC_BASE (0xfffe3100)
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#define BCM_6338_SDRAM_REGS_BASE (0xfffe3100)
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#define BCM_6338_SDRAM_BASE (0xfffe3100)
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#define BCM_6338_MEMC_BASE (0xdeadbeef)
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/*
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/*
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* 6345 register sets base address
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* 6345 register sets base address
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@ -225,6 +227,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
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return BCM_6338_SPI_BASE;
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return BCM_6338_SPI_BASE;
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case RSET_MEMC:
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case RSET_MEMC:
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return BCM_6338_MEMC_BASE;
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return BCM_6338_MEMC_BASE;
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case RSET_SDRAM:
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return BCM_6338_SDRAM_BASE;
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}
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}
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#endif
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#endif
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#ifdef CONFIG_BCM63XX_CPU_6345
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#ifdef CONFIG_BCM63XX_CPU_6345
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