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bcm4908: backport first 5.18 DTS changes
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit da8b720b0e)
This commit is contained in:
Rafał Miłecki
parent
e6a718239f
commit
87b9ba9ed9
@ -0,0 +1,47 @@
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From 33826e9c6ba76b265d4e26cb95493fa27ed78974 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Wed, 29 Dec 2021 11:23:14 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcm4908: use proper TWD binding
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Block at <ff800400 0x4c> is a TWD that contains timers, watchdog and
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reset. Actual timers happen to be at block beginning but they only span
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across the first 0x28 registers. It means the old block description was
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incorrect (size 0x3c).
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Drop timers binding for now and use documented TWD binding. Timers
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should be properly documented and defined as TWD subnode.
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Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -273,9 +273,9 @@
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#size-cells = <1>;
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ranges = <0x00 0x00 0xff800000 0x3000>;
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- timer: timer@400 {
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- compatible = "brcm,bcm6328-timer", "syscon";
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- reg = <0x400 0x3c>;
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+ twd: timer-mfd@400 {
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+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
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+ reg = <0x400 0x4c>;
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};
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gpio0: gpio-controller@500 {
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@@ -330,7 +330,7 @@
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reboot {
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compatible = "syscon-reboot";
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- regmap = <&timer>;
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+ regmap = <&twd>;
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offset = <0x34>;
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mask = <1>;
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};
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@ -0,0 +1,160 @@
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From 72b1c5da796ec5266f2012c36470e226cb4f09c9 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 30 Dec 2021 12:05:35 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcm4908: add pinctrl binding
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Describe pinmux block with its maps.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 135 ++++++++++++++++++
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1 file changed, 135 insertions(+)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -287,6 +287,141 @@
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gpio-controller;
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};
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+ pinctrl@560 {
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+ compatible = "brcm,bcm4908-pinctrl";
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+ reg = <0x560 0x10>;
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+
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+ pins_led_0_a: led_0-a-pins {
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+ function = "led_0";
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+ groups = "led_0_grp_a";
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+ };
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+
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+ pins_led_1_a: led_1-a-pins {
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+ function = "led_1";
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+ groups = "led_1_grp_a";
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+ };
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+
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+ pins_led_2_a: led_2-a-pins {
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+ function = "led_2";
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+ groups = "led_2_grp_a";
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+ };
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+
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+ pins_led_3_a: led_3-a-pins {
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+ function = "led_3";
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+ groups = "led_3_grp_a";
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+ };
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+
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+ pins_led_4_a: led_4-a-pins {
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+ function = "led_4";
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+ groups = "led_4_grp_a";
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+ };
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+
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+ pins_led_5_a: led_5-a-pins {
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+ function = "led_5";
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+ groups = "led_5_grp_a";
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+ };
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+
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+ pins_led_6_a: led_6-a-pins {
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+ function = "led_6";
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+ groups = "led_6_grp_a";
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+ };
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+
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+ pins_led_7_a: led_7-a-pins {
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+ function = "led_7";
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+ groups = "led_7_grp_a";
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+ };
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+
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+ pins_led_8_a: led_8-a-pins {
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+ function = "led_8";
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+ groups = "led_8_grp_a";
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+ };
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+
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+ pins_led_9_a: led_9-a-pins {
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+ function = "led_9";
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+ groups = "led_9_grp_a";
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+ };
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+
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+ pins_led_21_a: led_21-a-pins {
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+ function = "led_21";
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+ groups = "led_21_grp_a";
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+ };
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+
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+ pins_led_22_a: led_22-a-pins {
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+ function = "led_22";
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+ groups = "led_22_grp_a";
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+ };
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+
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+ pins_led_26_a: led_26-a-pins {
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+ function = "led_26";
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+ groups = "led_26_grp_a";
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+ };
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+
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+ pins_led_27_a: led_27-a-pins {
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+ function = "led_27";
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+ groups = "led_27_grp_a";
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+ };
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+
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+ pins_led_28_a: led_28-a-pins {
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+ function = "led_28";
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+ groups = "led_28_grp_a";
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+ };
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+
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+ pins_led_29_a: led_29-a-pins {
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+ function = "led_29";
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+ groups = "led_29_grp_a";
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+ };
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+
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+ pins_led_30_a: led_30-a-pins {
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+ function = "led_30";
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+ groups = "led_30_grp_a";
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+ };
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+
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+ pins_hs_uart: hs_uart-pins {
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+ function = "hs_uart";
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+ groups = "hs_uart_grp";
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+ };
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+
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+ pins_i2c_a: i2c-a-pins {
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+ function = "i2c";
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+ groups = "i2c_grp_a";
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+ };
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+
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+ pins_i2c_b: i2c-b-pins {
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+ function = "i2c";
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+ groups = "i2c_grp_b";
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+ };
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+
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+ pins_i2s: i2s-pins {
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+ function = "i2s";
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+ groups = "i2s_grp";
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+ };
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+
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+ pins_nand_ctrl: nand_ctrl-pins {
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+ function = "nand_ctrl";
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+ groups = "nand_ctrl_grp";
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+ };
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+
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+ pins_nand_data: nand_data-pins {
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+ function = "nand_data";
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+ groups = "nand_data_grp";
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+ };
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+
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+ pins_emmc_ctrl: emmc_ctrl-pins {
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+ function = "emmc_ctrl";
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+ groups = "emmc_ctrl_grp";
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+ };
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+
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+ pins_usb0_pwr: usb0_pwr-pins {
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+ function = "usb0_pwr";
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+ groups = "usb0_pwr_grp";
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+ };
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+
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+ pins_usb1_pwr: usb1_pwr-pins {
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+ function = "usb1_pwr";
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+ groups = "usb1_pwr_grp";
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+ };
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+ };
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+
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uart0: serial@640 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x640 0x18>;
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@ -17,16 +17,10 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -273,9 +273,18 @@
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#size-cells = <1>;
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ranges = <0x00 0x00 0xff800000 0x3000>;
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- timer: timer@400 {
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- compatible = "brcm,bcm6328-timer", "syscon";
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- reg = <0x400 0x3c>;
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+ twd: timer-mfd@400 {
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+ compatible = "brcm,bcm4908-twd", "brcm,twd", "simple-mfd", "syscon";
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+ reg = <0x400 0x4c>;
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@@ -276,6 +276,15 @@
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twd: timer-mfd@400 {
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compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
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reg = <0x400 0x4c>;
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+ ranges = <0x0 0x400 0x4c>;
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+
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+ #address-cells = <1>;
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@ -39,12 +33,3 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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};
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gpio0: gpio-controller@500 {
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@@ -330,7 +339,7 @@
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reboot {
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compatible = "syscon-reboot";
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- regmap = <&timer>;
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+ regmap = <&twd>;
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offset = <0x34>;
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mask = <1>;
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};
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