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realtek: Use MDIO_* constants from <linux/mdio.h>

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To improve code readability in drivers/net/phy/rtl83xx-phy.c, replace
constants MMD_AN and MMD_VEND2 from drivers/net/phy/rtl83xx-phy.h with
MDIO_MMD_AN and MDIO_MMD_VEND2 from <linux/mdio.h>.

Also, replace
BIT(0) with MDIO_EEE_2_5GT,
BIT(1) with MDIO_EEE_100TX,
BIT(2) with MDIO_EEE_1000T,
BIT(9) with MDIO_AN_CTRL1_RESTART,
BIT(12) with MDIO_AN_CTRL1_ENABLE,
32 with MDIO_AN_10GBT_CTRL,
60 with MDIO_AN_EEE_ADV, and
62 with MDIO_AN_EEE_ADV2
from <linux/mdio.h>.

Suggested-by: DENG Qingfang <dqfext@gmail.com>
Signed-off-by: Pascal Ernster <git@hardfalcon.net>
This commit is contained in:
Pascal Ernster 2023-06-04 22:16:20 +02:00 committed by Sander Vanheule
parent 171e67e2f7
commit 87a2f03b86
2 changed files with 40 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

80
target/linux/realtek/files-5.15/drivers/net/phy/rtl83xx-phy.c
View File

@ -13,6 +13,7 @@
#include <linux/crc32.h> #include <linux/crc32.h>
#include <linux/sfp.h> #include <linux/sfp.h>
#include <linux/mii.h> #include <linux/mii.h>
#include <linux/mdio.h>
#include <asm/mach-rtl838x/mach-rtl83xx.h> #include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx-phy.h" #include "rtl83xx-phy.h"
@ -443,20 +444,20 @@ static int rtl8226_read_status(struct phy_device *phydev)
/* Link status must be read twice */ /* Link status must be read twice */
for (int i = 0; i < 2; i++) for (int i = 0; i < 2; i++)
val = phy_read_mmd(phydev, MMD_VEND2, 0xA402); val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA402);
phydev->link = val & BIT(2) ? 1 : 0; phydev->link = val & BIT(2) ? 1 : 0;
if (!phydev->link) if (!phydev->link)
goto out; goto out;
/* Read duplex status */ /* Read duplex status */
val = phy_read_mmd(phydev, MMD_VEND2, 0xA434); val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA434);
if (val < 0) if (val < 0)
goto out; goto out;
phydev->duplex = !!(val & BIT(3)); phydev->duplex = !!(val & BIT(3));
/* Read speed */ /* Read speed */
val = phy_read_mmd(phydev, MMD_VEND2, 0xA434); val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA434);
switch (val & 0x0630) { switch (val & 0x0630) {
case 0x0000: case 0x0000:
phydev->speed = SPEED_10; phydev->speed = SPEED_10;
@ -491,7 +492,7 @@ static int rtl8226_advertise_aneg(struct phy_device *phydev)
pr_info("In %s\n", __func__); pr_info("In %s\n", __func__);
v = phy_read_mmd(phydev, MMD_AN, 16); v = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
if (v < 0) if (v < 0)
goto out; goto out;
@ -500,25 +501,25 @@ static int rtl8226_advertise_aneg(struct phy_device *phydev)
v |= ADVERTISE_100HALF; v |= ADVERTISE_100HALF;
v |= ADVERTISE_100FULL; v |= ADVERTISE_100FULL;
ret = phy_write_mmd(phydev, MMD_AN, 16, v); ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, v);
/* Allow 1GBit */ /* Allow 1GBit */
v = phy_read_mmd(phydev, MMD_VEND2, 0xA412); v = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA412);
if (v < 0) if (v < 0)
goto out; goto out;
v |= ADVERTISE_1000FULL; v |= ADVERTISE_1000FULL;
ret = phy_write_mmd(phydev, MMD_VEND2, 0xA412, v); ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xA412, v);
if (ret < 0) if (ret < 0)
goto out; goto out;
/* Allow 2.5G */ /* Allow 2.5G */
v = phy_read_mmd(phydev, MMD_AN, 32); v = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL);
if (v < 0) if (v < 0)
goto out; goto out;
v |= BIT(7); v |= MDIO_AN_10GBT_CTRL_ADV2_5G;
ret = phy_write_mmd(phydev, MMD_AN, 32, v); ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, v);
out: out:
return ret; return ret;
@ -535,22 +536,22 @@ static int rtl8226_config_aneg(struct phy_device *phydev)
if (ret) if (ret)
goto out; goto out;
/* AutoNegotiationEnable */ /* AutoNegotiationEnable */
v = phy_read_mmd(phydev, MMD_AN, 0); v = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
if (v < 0) if (v < 0)
goto out; goto out;
v |= BIT(12); /* Enable AN */ v |= MDIO_AN_CTRL1_ENABLE; /* Enable AN */
ret = phy_write_mmd(phydev, MMD_AN, 0, v); ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, v);
if (ret < 0) if (ret < 0)
goto out; goto out;
/* RestartAutoNegotiation */ /* RestartAutoNegotiation */
v = phy_read_mmd(phydev, MMD_VEND2, 0xA400); v = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA400);
if (v < 0) if (v < 0)
goto out; goto out;
v |= BIT(9); v |= MDIO_AN_CTRL1_RESTART;
ret = phy_write_mmd(phydev, MMD_VEND2, 0xA400, v); ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xA400, v);
} }
/* TODO: ret = __genphy_config_aneg(phydev, ret); */ /* TODO: ret = __genphy_config_aneg(phydev, ret); */
@ -567,12 +568,12 @@ static int rtl8226_get_eee(struct phy_device *phydev,
pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled); pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
val = phy_read_mmd(phydev, MMD_AN, 60); val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
if (e->eee_enabled) { if (e->eee_enabled) {
e->eee_enabled = !!(val & BIT(1)); e->eee_enabled = !!(val & MDIO_EEE_100TX);
if (!e->eee_enabled) { if (!e->eee_enabled) {
val = phy_read_mmd(phydev, MMD_AN, 62); val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2);
e->eee_enabled = !!(val & BIT(0)); e->eee_enabled = !!(val & MDIO_EEE_2_5GT);
} }
} }
pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled); pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
@ -592,29 +593,29 @@ static int rtl8226_set_eee(struct phy_device *phydev, struct ethtool_eee *e)
poll_state = disable_polling(port); poll_state = disable_polling(port);
/* Remember aneg state */ /* Remember aneg state */
val = phy_read_mmd(phydev, MMD_AN, 0); val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
an_enabled = !!(val & BIT(12)); an_enabled = !!(val & MDIO_AN_CTRL1_ENABLE);
/* Setup 100/1000MBit */ /* Setup 100/1000MBit */
val = phy_read_mmd(phydev, MMD_AN, 60); val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
if (e->eee_enabled) if (e->eee_enabled)
val |= 0x6; val |= (MDIO_EEE_100TX | MDIO_EEE_1000T);
else else
val &= 0x6; val &= (MDIO_EEE_100TX | MDIO_EEE_1000T);
phy_write_mmd(phydev, MMD_AN, 60, val); phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
/* Setup 2.5GBit */ /* Setup 2.5GBit */
val = phy_read_mmd(phydev, MMD_AN, 62); val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2);
if (e->eee_enabled) if (e->eee_enabled)
val |= 0x1; val |= MDIO_EEE_2_5GT;
else else
val &= 0x1; val &= MDIO_EEE_2_5GT;
phy_write_mmd(phydev, MMD_AN, 62, val); phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2, val);
/* RestartAutoNegotiation */ /* RestartAutoNegotiation */
val = phy_read_mmd(phydev, MMD_VEND2, 0xA400); val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xA400);
val |= BIT(9); val |= MDIO_AN_CTRL1_RESTART;
phy_write_mmd(phydev, MMD_VEND2, 0xA400, val); phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xA400, val);
resume_polling(poll_state); resume_polling(poll_state);
@ -1058,10 +1059,9 @@ void rtl8218d_eee_set(struct phy_device *phydev, bool enable)
val = phy_read(phydev, MII_BMCR); val = phy_read(phydev, MII_BMCR);
an_enabled = val & BMCR_ANENABLE; an_enabled = val & BMCR_ANENABLE;
/* Enable 100M (bit 1) / 1000M (bit 2) EEE */ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
val = phy_read_mmd(phydev, 7, 60); val |= MDIO_EEE_1000T | MDIO_EEE_100TX;
val |= BIT(2) | BIT(1); phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, enable ? (MDIO_EEE_100TX | MDIO_EEE_1000T) : 0);
phy_write_mmd(phydev, 7, 60, enable ? 0x6 : 0);
/* 500M EEE ability */ /* 500M EEE ability */
val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20); val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);
@ -1093,7 +1093,7 @@ static int rtl8218b_get_eee(struct phy_device *phydev,
/* Set GPHY page to copper */ /* Set GPHY page to copper */
phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER); phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
val = phy_read_paged(phydev, 7, 60); val = phy_read_paged(phydev, 7, MDIO_AN_EEE_ADV);
if (e->eee_enabled) { if (e->eee_enabled) {
/* Verify vs MAC-based EEE */ /* Verify vs MAC-based EEE */
e->eee_enabled = !!(val & BIT(7)); e->eee_enabled = !!(val & BIT(7));
@ -1121,7 +1121,7 @@ static int rtl8218d_get_eee(struct phy_device *phydev,
/* Set GPHY page to copper */ /* Set GPHY page to copper */
phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER); phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
val = phy_read_paged(phydev, 7, 60); val = phy_read_paged(phydev, 7, MDIO_AN_EEE_ADV);
if (e->eee_enabled) if (e->eee_enabled)
e->eee_enabled = !!(val & BIT(7)); e->eee_enabled = !!(val & BIT(7));
pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled); pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
@ -1162,7 +1162,7 @@ static int rtl8214fc_set_eee(struct phy_device *phydev,
phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val); phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
/* Enable 100M (bit 1) / 1000M (bit 2) EEE */ /* Enable 100M (bit 1) / 1000M (bit 2) EEE */
phy_write_paged(phydev, 7, 60, e->eee_enabled ? 0x6 : 0); phy_write_paged(phydev, 7, MDIO_AN_EEE_ADV, e->eee_enabled ? (MDIO_EEE_100TX | MDIO_EEE_1000T) : 0);
/* 500M EEE ability */ /* 500M EEE ability */
val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20); val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);

4
target/linux/realtek/files-5.15/drivers/net/phy/rtl83xx-phy.h
View File

@ -35,10 +35,6 @@ struct __attribute__ ((__packed__)) fw_header {
#define PHY_ID_RTL8393_I 0x001c8393 #define PHY_ID_RTL8393_I 0x001c8393
#define PHY_ID_RTL9300_I 0x70d03106 #define PHY_ID_RTL9300_I 0x70d03106
/* PHY MMD devices */
#define MMD_AN 7
#define MMD_VEND2 31
/* Registers of the internal Serdes of the 8380 */ /* Registers of the internal Serdes of the 8380 */
#define RTL838X_SDS_MODE_SEL (0x0028) #define RTL838X_SDS_MODE_SEL (0x0028)
#define RTL838X_SDS_CFG_REG (0x0034) #define RTL838X_SDS_CFG_REG (0x0034)