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qualcommbe: ipq95xx: Refresh dts SPI-NAND patch to v14

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Refresh dts SPI-NAND patch to to v14. This is to keep stuff synced with
current pending patch revision and make it easier to replace patch
later (and discover something broke in the meantime)

Link: https://github.com/openwrt/openwrt/pull/17788
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi 2025-01-30 16:41:51 +01:00
parent 46fcb0056e
commit 7fb8b48120
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GPG Key ID: AC001D09ADBFEAD7
4 changed files with 48 additions and 19 deletions
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47
target/linux/qualcommbe/patches-6.6/101-arm64-dts-qcom-ipq9574-Add-SPI-nand-support.patch
View File

@ -1,13 +1,40 @@
From 968c5e8220209eb2185654f01748c349515a3b8e Mon Sep 17 00:00:00 2001
From: Md Sadre Alam <quic_mdalam@quicinc.com>
Date: Thu, 15 Feb 2024 12:26:40 +0530
Subject: [PATCH v10 7/8] arm64: dts: qcom: ipq9574: Add SPI nand support
To: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <andersson@kernel.org>,
<konradybcio@kernel.org>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <vigneshr@ti.com>,
<manivannan.sadhasivam@linaro.org>,
<linux-arm-msm@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>
Cc: <quic_srichara@quicinc.com>, <quic_varada@quicinc.com>,
<quic_mdalam@quicinc.com>
Subject: [PATCH v14 7/8] arm64: dts: qcom: ipq9574: Add SPI nand support
Date: Wed, 20 Nov 2024 14:45:05 +0530 [thread overview]
Message-ID: <20241120091507.1404368-8-quic_mdalam@quicinc.com> (raw)
In-Reply-To: <20241120091507.1404368-1-quic_mdalam@quicinc.com>
Add SPI NAND support for ipq9574 SoC.
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v14]
* No change
Change in [v13]
* No change
Change in [v12]
* No change
Change in [v11]
* No change
Change in [v10]
* No change
@ -54,11 +81,11 @@ Change in [v1]
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 27 ++++++++++++
2 files changed, 70 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
@@ -172,4 +172,47 @@
bias-pull-down;
};
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
@@ -95,6 +95,49 @@
drive-strength = <8>;
bias-disable;
};
+
+ qpic_snand_default_state: qpic-snand-default-state {
@ -104,6 +131,8 @@ Change in [v1]
+ nand-ecc-step-size = <512>;
+ };
};
&usb_0_dwc3 {
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -447,6 +447,33 @@
@ -122,7 +151,7 @@ Change in [v1]
+ };
+
+ qpic_nand: spi@79b0000 {
+ compatible = "qcom,spi-qpic-snand", "qcom,ipq9574-nand";
+ compatible = "qcom,ipq9574-snand";
+ reg = <0x79b0000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;

4
target/linux/qualcommbe/patches-6.6/106-arm64-dts-qcom-fix-USB-vdda-pll-supply-for-ipq9574-r.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
@@ -102,7 +102,7 @@
@@ -145,7 +145,7 @@
};
&usb_0_qmpphy {
@ -33,7 +33,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
vdda-phy-supply = <&regulator_fixed_0p925>;
status = "okay";
@@ -110,7 +110,7 @@
@@ -153,7 +153,7 @@
&usb_0_qusbphy {
vdd-supply = <&regulator_fixed_0p925>;

4
target/linux/qualcommbe/patches-6.6/200-05-arm64-dts-qcom-Add-IPQ9574-RDP433-port-node.patch
View File

@ -65,8 +65,8 @@ Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
&sdhc_1 {
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
@@ -216,3 +256,130 @@
nand-ecc-step-size = <512>;
@@ -173,3 +213,130 @@
};
};
};
+

12
target/linux/qualcommbe/patches-6.6/900-arm64-dts-qcom-Add-label-to-EDMA-port-for-IPQ9574-RD.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
@@ -272,6 +272,7 @@
@@ -229,6 +229,7 @@
reg = <1>;
phy-mode = "qsgmii";
managed = "in-band-status";
@ -20,7 +20,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
phy-handle = <&phy0>;
pcs-handle = <&pcsuniphy0_ch0>;
clocks = <&nsscc NSS_CC_PORT1_MAC_CLK>,
@@ -292,6 +293,7 @@
@@ -249,6 +250,7 @@
reg = <2>;
phy-mode = "qsgmii";
managed = "in-band-status";
@ -28,7 +28,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
phy-handle = <&phy1>;
pcs-handle = <&pcsuniphy0_ch1>;
clocks = <&nsscc NSS_CC_PORT2_MAC_CLK>,
@@ -312,6 +314,7 @@
@@ -269,6 +271,7 @@
reg = <3>;
phy-mode = "qsgmii";
managed = "in-band-status";
@ -36,7 +36,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
phy-handle = <&phy2>;
pcs-handle = <&pcsuniphy0_ch2>;
clocks = <&nsscc NSS_CC_PORT3_MAC_CLK>,
@@ -332,6 +335,7 @@
@@ -289,6 +292,7 @@
reg = <4>;
phy-mode = "qsgmii";
managed = "in-band-status";
@ -44,7 +44,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
phy-handle = <&phy3>;
pcs-handle = <&pcsuniphy0_ch3>;
clocks = <&nsscc NSS_CC_PORT4_MAC_CLK>,
@@ -352,6 +356,7 @@
@@ -309,6 +313,7 @@
reg = <5>;
phy-mode = "usxgmii";
managed = "in-band-status";
@ -52,7 +52,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
phy-handle = <&phy4>;
pcs-handle = <&pcsuniphy1_ch0>;
clocks = <&nsscc NSS_CC_PORT5_MAC_CLK>,
@@ -372,6 +377,7 @@
@@ -329,6 +334,7 @@
reg = <6>;
phy-mode = "usxgmii";
managed = "in-band-status";