mirror of
https://github.com/openwrt/openwrt.git
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mediatek: add support for reyee AX3200-E5
This is yet another model of the Ruijie RG-EW3200GX PRO with a slightly
different flash layout, install process is the same.
Specifications:
SoC: MT7622B
RAM: 256MB
Flash: XMC XM25QH128C or Winbond WQ25Q128JVSQ 16MB SPI NOR
Ethernet: 5x1GbE
Switch: MT7531BE
WiFi: 2.4G: MT7622 5G: MT7915AN+MT7975AN
3LEDs: System LED(blue) + Mesh LED(green) + Mesh LED(red)
2Keys: Mesh button + Reset button
UART: Marked J19 on board. 3.3v, 115200n1
Power: 12V 2.5A
Flash instruction:
1. Serve the initramfs.img using a TFTP server with address 10.10.10.3.
2. Interrupt the uboot startup process via UART.
3. Select "System Load Linux to SDRAM via TFTP" item.
4. (important) Back up firmware(mtd7) partitions with:
dd if=/dev/mtd7 of=/tmp/firmware.bin
and then download the firmware.bin image via SCP.
5. Flash the OpenWrt sysupgrade firmware.
Recovery stock firmware:
1. Transfer the firmware.bin image to the device.
2. Flash the image with:
mtd write firmware.bin firmware
Signed-off-by: Alex Hansen <mralexh123@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Alex Hansen
Daniel Golle
parent
84183f0d98
commit
7dbac3433f
78
target/linux/mediatek/dts/mt7622-reyee-ax3200-e5.dts
Normal file
78
target/linux/mediatek/dts/mt7622-reyee-ax3200-e5.dts
Normal file
@ -0,0 +1,78 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622-ruijie-rg-ew3200.dtsi"
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/ {
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model = "reyee AX3200 E5";
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compatible = "reyee,ax3200-e5", "mediatek,mt7622";
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};
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&nor_flash {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi_nor_pins>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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label = "ATF";
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reg = <0x20000 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot";
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reg = <0x30000 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x90000>;
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};
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factory: partition@90000 {
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label = "Factory";
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reg = <0x90000 0xd0000>;
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read-only;
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};
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partition@d0000 {
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label = "product_info";
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reg = <0xd0000 0xe0000>;
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read-only;
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};
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partition@e0000 {
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label = "kdump";
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reg = <0xe0000 0xf0000>;
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read-only;
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};
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partition@f0000 {
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compatible = "denx,fit";
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label = "firmware";
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reg = <0xf0000 0x1000000>;
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};
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};
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};
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};
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325
target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi
Normal file
325
target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi
Normal file
@ -0,0 +1,325 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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aliases {
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ethernet0 = &gmac0;
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label-mac-device = &gmac0;
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n1";
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bootargs = "console=ttyS0,115200n1 swiotlb=512";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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mesh_green {
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label = "green:mesh";
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gpios = <&pio 79 GPIO_ACTIVE_LOW>;
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};
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mesh_red {
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label = "red:mesh";
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gpios = <&pio 82 GPIO_ACTIVE_LOW>;
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};
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led_system: system_blue {
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label = "blue:system";
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gpios = <&pio 81 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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};
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ð {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-connection-type = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "mediatek,mt7531";
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reg = <0>;
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reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&pio>;
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interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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wan: port@4 {
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reg = <4>;
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label = "wan";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pcie0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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};
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&slot0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x5000>;
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ieee80211-freq-limit = <5000000 6000000>;
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mediatek,disable-radar-background;
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};
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};
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&pio {
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epa_elna_pins: epa-elna-pins {
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mux {
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function = "antsel";
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groups = "antsel0", "antsel1", "antsel2", "antsel3",
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"antsel4", "antsel5", "antsel6", "antsel7",
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"antsel8", "antsel9", "antsel12", "antsel13",
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"antsel14", "antsel15", "antsel16", "antsel17";
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};
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};
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_0_waken",
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"pcie0_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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spi_nor_pins: spi-nor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx";
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&pwrap {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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};
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&nor_flash {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi_nor_pins>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "ATF";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "u-boot";
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reg = <0x60000 0x50000>;
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read-only;
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};
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partition@B0000 {
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label = "u-boot-env";
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reg = <0xb0000 0x20000>;
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};
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factory: partition@D0000 {
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label = "Factory";
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reg = <0xd0000 0x80000>;
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read-only;
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};
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partition@150000 {
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label = "product_info";
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reg = <0x150000 0x10000>;
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read-only;
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};
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partition@160000 {
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label = "kdump";
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reg = <0x160000 0x10000>;
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read-only;
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};
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partition@170000 {
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compatible = "denx,fit";
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label = "firmware";
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reg = <0x170000 0xe90000>;
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};
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};
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};
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};
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&rtc {
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status = "disabled";
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};
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&uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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&watchdog {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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};
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&wmac {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&epa_elna_pins>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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@ -1,239 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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#include "mt7622-ruijie-rg-ew3200.dtsi"
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/ {
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model = "Ruijie RG-EW3200GX PRO";
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compatible = "ruijie,rg-ew3200gx-pro", "mediatek,mt7622";
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aliases {
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ethernet0 = &gmac0;
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label-mac-device = &gmac0;
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n1";
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bootargs = "console=ttyS0,115200n1 swiotlb=512";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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mesh_green {
|
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label = "green:mesh";
|
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gpios = <&pio 79 GPIO_ACTIVE_LOW>;
|
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};
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|
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mesh_red {
|
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label = "red:mesh";
|
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gpios = <&pio 82 GPIO_ACTIVE_LOW>;
|
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};
|
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led_system: system_blue {
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label = "blue:system";
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gpios = <&pio 81 GPIO_ACTIVE_LOW>;
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default-state = "on";
|
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};
|
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};
|
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|
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memory {
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reg = <0 0x40000000 0 0x40000000>;
|
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};
|
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};
|
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|
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ð {
|
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status = "okay";
|
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|
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pinctrl-names = "default";
|
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pinctrl-0 = <ð_pins>;
|
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|
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gmac0: mac@0 {
|
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compatible = "mediatek,eth-mac";
|
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reg = <0>;
|
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phy-connection-type = "2500base-x";
|
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fixed-link {
|
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speed = <2500>;
|
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full-duplex;
|
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pause;
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
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#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
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switch@0 {
|
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compatible = "mediatek,mt7531";
|
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reg = <0>;
|
||||
reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
|
||||
|
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interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
wan: port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_pins>;
|
||||
};
|
||||
|
||||
&slot0 {
|
||||
wifi@0,0 {
|
||||
compatible = "mediatek,mt76";
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
mediatek,mtd-eeprom = <&factory 0x5000>;
|
||||
ieee80211-freq-limit = <5000000 6000000>;
|
||||
mediatek,disable-radar-background;
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
epa_elna_pins: epa-elna-pins {
|
||||
mux {
|
||||
function = "antsel";
|
||||
groups = "antsel0", "antsel1", "antsel2", "antsel3",
|
||||
"antsel4", "antsel5", "antsel6", "antsel7",
|
||||
"antsel8", "antsel9", "antsel12", "antsel13",
|
||||
"antsel14", "antsel15", "antsel16", "antsel17";
|
||||
};
|
||||
};
|
||||
|
||||
eth_pins: eth-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "mdc_mdio", "rgmii_via_gmac2";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_pins: pcie0-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie0_pad_perst",
|
||||
"pcie0_0_waken",
|
||||
"pcie0_0_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pmic_bus_pins: pmic-bus-pins {
|
||||
mux {
|
||||
function = "pmic";
|
||||
groups = "pmic_bus";
|
||||
};
|
||||
};
|
||||
|
||||
spi_nor_pins: spi-nor-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "spi_nor";
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart0_0_tx_rx";
|
||||
};
|
||||
};
|
||||
|
||||
watchdog_pins: watchdog-pins {
|
||||
mux {
|
||||
function = "watchdog";
|
||||
groups = "watchdog";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwrap {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_bus_pins>;
|
||||
};
|
||||
|
||||
&nor_flash {
|
||||
@ -301,29 +73,3 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
};
|
||||
|
||||
&wmac {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&epa_elna_pins>;
|
||||
mediatek,mtd-eeprom = <&factory 0x0>;
|
||||
};
|
||||
|
||||
@ -237,6 +237,15 @@ define Device/ruijie_rg-ew3200gx-pro
|
||||
endef
|
||||
TARGET_DEVICES += ruijie_rg-ew3200gx-pro
|
||||
|
||||
define Device/reyee_ax3200-e5
|
||||
DEVICE_VENDOR := reyee
|
||||
DEVICE_MODEL := AX3200 E5
|
||||
DEVICE_DTS := mt7622-reyee-ax3200-e5
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_PACKAGES := kmod-mt7915e
|
||||
endef
|
||||
TARGET_DEVICES += reyee_ax3200-e5
|
||||
|
||||
define Device/totolink_a8000ru
|
||||
DEVICE_VENDOR := TOTOLINK
|
||||
DEVICE_MODEL := A8000RU
|
||||
|
||||
@ -14,6 +14,7 @@ mediatek_setup_interfaces()
|
||||
linksys,e8450-ubi|\
|
||||
mediatek,mt7622-rfb1|\
|
||||
mediatek,mt7622-rfb1-ubi|\
|
||||
reyee,ax3200-e5|\
|
||||
ruijie,rg-ew3200gx-pro)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
|
||||
;;
|
||||
@ -53,6 +54,7 @@ mediatek_setup_macs()
|
||||
local label_mac=""
|
||||
|
||||
case $board in
|
||||
reyee,ax3200-e5|\
|
||||
ruijie,rg-ew3200gx-pro)
|
||||
lan_mac=$(macaddr_add $(get_mac_label) 1)
|
||||
;;
|
||||
|
||||
@ -13,6 +13,7 @@ case "$board" in
|
||||
bananapi,bpi-r64)
|
||||
[ "$PHYNBR" = "0" ] && macaddr_add $(cat /sys/class/net/eth0/address) 2 > /sys${DEVPATH}/macaddress
|
||||
;;
|
||||
reyee,ax3200-e5|\
|
||||
ruijie,rg-ew3200gx-pro)
|
||||
[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) 3 > /sys${DEVPATH}/macaddress
|
||||
[ "$PHYNBR" = "1" ] && macaddr_add $(get_mac_label) 2 > /sys${DEVPATH}/macaddress
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user