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kernel: delete Linux 5.4 config and patches

Browse Source 
As the upcoming release will be based on Linux 5.10 only, remove all
kernel configuration as well as patches for Linux 5.4.
There were no targets still actively using Linux 5.4.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)
This commit is contained in:
Daniel Golle 2022-03-21 01:16:48 +00:00
parent 9470160c35
commit 786bf7fdac
1709 changed files with 0 additions and 477715 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/kernel-5.4
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@ -1,2 +0,0 @@
LINUX_VERSION-5.4 = .175
LINUX_KERNEL_HASH-5.4.175 = ac901bdffb1488d6c730ca7ab42322163dd331b240e2f06ad83d199e251a4840

277
target/linux/archs38/config-5.4
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@ -1,277 +0,0 @@
# CONFIG_16KSTACKS is not set
CONFIG_ARC=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARC_BUILTIN_DTB_NAME=""
CONFIG_ARC_CACHE=y
CONFIG_ARC_CACHE_LINE_SHIFT=6
CONFIG_ARC_CACHE_PAGES=y
CONFIG_ARC_CPU_HS=y
CONFIG_ARC_CURR_IN_REG=y
CONFIG_ARC_DBG=y
# CONFIG_ARC_DBG_TLB_PARANOIA is not set
CONFIG_ARC_DW2_UNWIND=y
CONFIG_ARC_HAS_ACCL_REGS=y
CONFIG_ARC_HAS_DCACHE=y
# CONFIG_ARC_HAS_DCCM is not set
CONFIG_ARC_HAS_DIV_REM=y
CONFIG_ARC_HAS_ICACHE=y
# CONFIG_ARC_HAS_ICCM is not set
CONFIG_ARC_HAS_LL64=y
CONFIG_ARC_HAS_LLSC=y
# CONFIG_ARC_HAS_PAE40 is not set
CONFIG_ARC_HAS_SWAPE=y
CONFIG_ARC_IRQ_NO_AUTOSAVE=y
CONFIG_ARC_KVADDR_SIZE=256
CONFIG_ARC_MCIP=y
# CONFIG_ARC_METAWARE_HLINK is not set
CONFIG_ARC_MMU_V4=y
# CONFIG_ARC_PAGE_SIZE_16K is not set
# CONFIG_ARC_PAGE_SIZE_4K is not set
CONFIG_ARC_PAGE_SIZE_8K=y
CONFIG_ARC_PLAT_AXS10X=y
# CONFIG_ARC_PLAT_EZNPS is not set
# CONFIG_ARC_PLAT_TB10X is not set
# CONFIG_ARC_SMP_HALT_ON_RESET is not set
CONFIG_ARC_SOC_HSDK=y
CONFIG_ARC_TIMERS=y
CONFIG_ARC_TIMERS_64BIT=y
CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y
CONFIG_AXS103=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED=y
CONFIG_CC_HAS_KASAN_GENERIC=y
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLK_HSDK=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SHA256=y
CONFIG_DEVTMPFS=y
CONFIG_DMADEVICES=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DWMAC_ANARION=y
CONFIG_DWMAC_GENERIC=y
CONFIG_DW_APB_ICTL=y
CONFIG_DW_AXI_DMAC=y
CONFIG_EXT4_FS=y
# CONFIG_EZNPS_GIC is not set
CONFIG_FAT_FS=y
CONFIG_FB=y
CONFIG_FB_CMDLINE=y
CONFIG_FIXED_PHY=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PENDING_IRQ=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_SNPS_CREG=y
CONFIG_GRACE_PERIOD=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PCI=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_ST_PRESS=y
CONFIG_IIO_ST_PRESS_I2C=y
CONFIG_IIO_ST_PRESS_SPI=y
CONFIG_IIO_ST_SENSORS_CORE=y
CONFIG_IIO_ST_SENSORS_I2C=y
CONFIG_IIO_ST_SENSORS_SPI=y
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_TRIGGERED_BUFFER=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_WORK=y
# CONFIG_ISA_ARCOMPACT is not set
CONFIG_ISA_ARCV2=y
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KERNEL_GZIP=y
CONFIG_LIBFDT=y
CONFIG_LINUX_LINK_BASE=0x90000000
CONFIG_LINUX_RAM_BASE=0x80000000
CONFIG_LOCKD=y
CONFIG_LOCKUP_DETECTOR=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MICREL_PHY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DW=y
# CONFIG_MMC_DW_BLUEFIELD is not set
# CONFIG_MMC_DW_EXYNOS is not set
# CONFIG_MMC_DW_HI3798CV200 is not set
# CONFIG_MMC_DW_K3 is not set
CONFIG_MMC_DW_PLTFM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NAMESPACES=y
CONFIG_NATIONAL_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_NS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NO_IOPORT_MAP=y
CONFIG_NR_CPUS=4
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PPS=y
CONFIG_PREEMPT=y
CONFIG_PREEMPTION=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_PTP_1588_CLOCK=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_RESET_AXS10X=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_HSDK=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_ARC=y
CONFIG_SERIAL_ARC_CONSOLE=y
CONFIG_SERIAL_ARC_NR_PORTS=1
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_SPI=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_DW_MMIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SRCU=y
CONFIG_STACKTRACE=y
# CONFIG_STANDALONE is not set
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
# CONFIG_STMMAC_SELFTESTS is not set
CONFIG_SUNRPC=y
CONFIG_SWPHY=y
CONFIG_TASKS_RCU=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TI_ADC108S102=y
CONFIG_TREE_SRCU=y
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_USB_SUPPORT=y
# CONFIG_USER_NS is not set
CONFIG_VFAT_FS=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y

21
target/linux/archs38/patches-5.4/0001-arch-arc-Add-compiler-option-for-gcc8.4.patch
View File

@ -1,21 +0,0 @@
From 2e2b3aeda9af9c029bf347c974911fe96cd79c43 Mon Sep 17 00:00:00 2001
From: Evgeniy Didin <didin@synopsys.com>
Date: Mon, 23 Mar 2020 15:57:18 +0300
Subject: [PATCH] arch/arc: Add compiler option for gcc8.4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
---
arch/arc/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -11,7 +11,7 @@ endif
cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
cflags-$(CONFIG_ISA_ARCOMPACT) += -mA7
-cflags-$(CONFIG_ISA_ARCV2) += -mcpu=hs38
+cflags-$(CONFIG_ISA_ARCV2) += -mcpu=hs38 -mmpy-option=2
ifdef CONFIG_ARC_CURR_IN_REG
# For a global register defintion, make sure it gets passed to every file

208
target/linux/bcm47xx/config-5.4
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@ -1,208 +0,0 @@
CONFIG_ADM6996_PHY=y
CONFIG_ARCH_BINFMT_ELF_STATE=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_BCM47XX=y
CONFIG_BCM47XX_BCMA=y
CONFIG_BCM47XX_NVRAM=y
CONFIG_BCM47XX_SPROM=y
CONFIG_BCM47XX_SSB=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
CONFIG_BCMA_DEBUG=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
CONFIG_BCMA_DRIVER_MIPS=y
CONFIG_BCMA_DRIVER_PCI=y
CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
CONFIG_BCMA_HOST_SOC=y
CONFIG_BCMA_NFLASH=y
CONFIG_BCMA_PFLASH=y
CONFIG_BCMA_SFLASH=y
# CONFIG_BGMAC_BCMA is not set
CONFIG_BLK_MQ_PCI=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_CPU_BMIPS is not set
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_DIRECT_OPS=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_NONCOHERENT_OPS=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_WDT=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_COMPILER_H=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_COPY_THREAD_TLS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO_REGISTER=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_BCM47XXSFLASH=y
CONFIG_MTD_BCM47XX_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_BCM47XXNFLASH=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_PHYSMAP=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_OF is not set
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SRCU=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_BLOCKIO=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_SSB_DRIVER_GPIO=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_HOST_SOC=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_SERIAL=y
CONFIG_SSB_SFLASH=y
CONFIG_SSB_SPROM=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_B53=y
# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
CONFIG_SWCONFIG_B53_PHY_DRIVER=y
CONFIG_SWCONFIG_B53_PHY_FIXUP=y
# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_BMIPS=y
CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_WATCHDOG_CORE=y

492
target/linux/bcm47xx/patches-5.4/159-cpu_fixes.patch
View File

@ -1,492 +0,0 @@
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -26,6 +26,38 @@
extern void (*r4k_blast_dcache)(void);
extern void (*r4k_blast_icache)(void);
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+#include <asm/paccess.h>
+#include <linux/ssb/ssb.h>
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
+
+static inline unsigned long bcm4710_dummy_rreg(void)
+{
+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
+}
+
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
+
+static inline unsigned long bcm4710_fill_tlb(void *addr)
+{
+ return *(unsigned long *)addr;
+}
+
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
+
+static inline void bcm4710_protected_fill_tlb(void *addr)
+{
+ unsigned long x;
+ get_dbe(x, (unsigned long *)addr);;
+}
+
+#else
+#define BCM4710_DUMMY_RREG()
+
+#define BCM4710_FILL_TLB(addr)
+#define BCM4710_PROTECTED_FILL_TLB(addr)
+#endif
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -56,6 +88,7 @@ static inline void flush_icache_line_ind
static inline void flush_dcache_line_indexed(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Index_Writeback_Inv_D, addr);
}
@@ -79,11 +112,13 @@ static inline void flush_icache_line(uns
static inline void flush_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Writeback_Inv_D, addr);
}
static inline void invalidate_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Invalidate_D, addr);
}
@@ -156,6 +191,7 @@ static inline int protected_flush_icache
#ifdef CONFIG_EVA
return protected_cachee_op(Hit_Invalidate_I, addr);
#else
+ BCM4710_DUMMY_RREG();
return protected_cache_op(Hit_Invalidate_I, addr);
#endif
}
@@ -169,6 +205,7 @@ static inline int protected_flush_icache
*/
static inline int protected_writeback_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
#ifdef CONFIG_EVA
return protected_cachee_op(Hit_Writeback_Inv_D, addr);
#else
@@ -526,8 +563,51 @@ static inline void invalidate_tcache_pag
: "r" (base), \
"i" (op));
+static inline void blast_dcache(void)
+{
+ unsigned long start = KSEG0;
+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
+ unsigned long end = (start + dcache_size);
+
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+
+ BCM4710_FILL_TLB(start);
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Hit_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page_indexed(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+ for (ws = 0; ws < ws_end; ws += ws_inc) {
+ start = page + ws;
+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, addr);
+ }
+ }
+}
+
/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \
+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \
static inline void extra##blast_##pfx##cache##lsize(void) \
{ \
unsigned long start = INDEX_BASE; \
@@ -537,6 +617,7 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws, indexop); \
@@ -547,6 +628,7 @@ static inline void extra##blast_##pfx##c
unsigned long start = page; \
unsigned long end = page + PAGE_SIZE; \
\
+ war \
do { \
cache##lsize##_unroll32(start, hitop); \
start += lsize * 32; \
@@ -563,31 +645,32 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws, indexop); \
}
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
-
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , )
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , )
+
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , )
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , )
#define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \
static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
@@ -612,58 +695,29 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/* build blast_xxx_range, protected_blast_xxx_range */
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \
static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
unsigned long end) \
{ \
unsigned long lsize = cpu_##desc##_line_size(); \
- unsigned long lsize_2 = lsize * 2; \
- unsigned long lsize_3 = lsize * 3; \
- unsigned long lsize_4 = lsize * 4; \
- unsigned long lsize_5 = lsize * 5; \
- unsigned long lsize_6 = lsize * 6; \
- unsigned long lsize_7 = lsize * 7; \
- unsigned long lsize_8 = lsize * 8; \
unsigned long addr = start & ~(lsize - 1); \
- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \
- int lines = (aend - addr) / lsize; \
- \
- while (lines >= 8) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- prot##cache_op(hitop, addr + lsize_4); \
- prot##cache_op(hitop, addr + lsize_5); \
- prot##cache_op(hitop, addr + lsize_6); \
- prot##cache_op(hitop, addr + lsize_7); \
- addr += lsize_8; \
- lines -= 8; \
- } \
- \
- if (lines & 0x4) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- addr += lsize_4; \
- } \
+ unsigned long aend = (end - 1) & ~(lsize - 1); \
\
- if (lines & 0x2) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- addr += lsize_2; \
- } \
+ war \
\
- if (lines & 0x1) { \
+ while (1) { \
+ war2 \
prot##cache_op(hitop, addr); \
+ if (addr == aend) \
+ break; \
+ addr += lsize; \
} \
}
#ifndef CONFIG_EVA
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , )
#else
@@ -697,15 +751,15 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache
__BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I)
#endif
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , )
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \
- protected_, loongson2_)
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
+ protected_, loongson2_, , )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , )
/* blast_inv_dcache_range */
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , )
/* Currently, this is very specific to Loongson-3 */
#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -429,6 +429,10 @@
#else
.set push
.set arch=r4000
+#ifdef CONFIG_BCM47XX
+ nop
+ nop
+#endif
eret
.set pop
#endif
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -21,6 +21,19 @@
#include <asm/war.h>
#include <asm/thread_info.h>
+#ifdef CONFIG_BCM47XX
+# ifdef eret
+# undef eret
+# endif
+# define eret \
+ .set push; \
+ .set noreorder; \
+ nop; \
+ nop; \
+ eret; \
+ .set pop;
+#endif
+
__INIT
/*
@@ -32,6 +45,9 @@
NESTED(except_vec3_generic, 0, sp)
.set push
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
andi k1, k1, 0x7c
#ifdef CONFIG_64BIT
@@ -52,6 +68,9 @@ NESTED(except_vec3_r4000, 0, sp)
.set push
.set arch=r4000
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
li k0, 31<<2
andi k1, k1, 0x7c
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -39,6 +39,9 @@
#include <asm/dma-coherence.h>
#include <asm/mips-cps.h>
+/* For enabling BCM4710 cache workarounds */
+static int bcm4710 = 0;
+
/*
* Bits describing what cache ops an SMP callback function may perform.
*
@@ -190,6 +193,9 @@ static void r4k_blast_dcache_user_page_s
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page = blast_dcache_page;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_user_page = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -208,6 +214,9 @@ static void r4k_blast_dcache_page_indexe
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_page_indexed = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -227,6 +236,9 @@ static void r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache = blast_dcache;
+ else
if (dc_lsize == 0)
r4k_blast_dcache = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -1779,6 +1791,17 @@ static void coherency_setup(void)
* silly idea of putting something else there ...
*/
switch (current_cpu_type()) {
+ case CPU_BMIPS3300:
+ {
+ u32 cm;
+ cm = read_c0_diag();
+ /* Enable icache */
+ cm |= (1 << 31);
+ /* Enable dcache */
+ cm |= (1 << 30);
+ write_c0_diag(cm);
+ }
+ break;
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1825,6 +1848,15 @@ void r4k_cache_init(void)
extern void build_copy_page(void);
struct cpuinfo_mips *c = &current_cpu_data;
+ /* Check if special workarounds are required */
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
+ printk("Enabling BCM4710A0 cache workarounds.\n");
+ bcm4710 = 1;
+ } else
+#endif
+ bcm4710 = 0;
+
probe_pcache();
probe_vcache();
setup_scache();
@@ -1901,7 +1933,15 @@ void r4k_cache_init(void)
*/
local_r4k___flush_cache_all(NULL);
+#ifdef CONFIG_BCM47XX
+ {
+ static void (*_coherency_setup)(void);
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
+ _coherency_setup();
+ }
+#else
coherency_setup();
+#endif
board_cache_error_setup = r4k_cache_error_setup;
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -980,6 +980,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1341,6 +1344,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+# endif
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -1352,6 +1358,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+#endif
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -2052,6 +2061,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+# endif
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2098,6 +2110,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
uasm_i_eret(p); /* return from trap */
#ifdef CONFIG_64BIT

78
target/linux/bcm47xx/patches-5.4/160-kmap_coherent.patch
View File

@ -1,78 +0,0 @@
From: Jeff Hansen <jhansen@cardaccess-inc.com>
Subject: [PATCH] kmap_coherent
On ASUS WL-500gP there are some "Data bus error"s when executing simple
commands liks "ps" or "cat /proc/1/cmdline".
This fixes OpenWrt ticket #1485: https://dev.openwrt.org/ticket/1485
---
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -243,6 +243,9 @@
#ifndef cpu_has_pindexed_dcache
#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
#endif
+#ifndef cpu_use_kmap_coherent
+#define cpu_use_kmap_coherent 1
+#endif
/*
* I-Cache snoops remote store. This only matters on SMP. Some multiprocessors
--- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
@@ -80,4 +80,6 @@
#define cpu_scache_line_size() 0
#define cpu_has_vz 0
+#define cpu_use_kmap_coherent 0
+
#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -697,7 +697,7 @@ static inline void local_r4k_flush_cache
map_coherent = (cpu_has_dc_aliases &&
page_mapcount(page) &&
!Page_dcache_dirty(page));
- if (map_coherent)
+ if (map_coherent && cpu_use_kmap_coherent)
vaddr = kmap_coherent(page, addr);
else
vaddr = kmap_atomic(page);
@@ -719,7 +719,7 @@ static inline void local_r4k_flush_cache
}
if (vaddr) {
- if (map_coherent)
+ if (map_coherent && cpu_use_kmap_coherent)
kunmap_coherent();
else
kunmap_atomic(vaddr);
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -174,7 +174,7 @@ void copy_user_highpage(struct page *to,
void *vfrom, *vto;
vto = kmap_atomic(to);
- if (cpu_has_dc_aliases &&
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
page_mapcount(from) && !Page_dcache_dirty(from)) {
vfrom = kmap_coherent(from, vaddr);
copy_page(vto, vfrom);
@@ -196,7 +196,7 @@ void copy_to_user_page(struct vm_area_st
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len)
{
- if (cpu_has_dc_aliases &&
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
page_mapcount(page) && !Page_dcache_dirty(page)) {
void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(vto, src, len);
@@ -214,7 +214,7 @@ void copy_from_user_page(struct vm_area_
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len)
{
- if (cpu_has_dc_aliases &&
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
page_mapcount(page) && !Page_dcache_dirty(page)) {
void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(dst, vfrom, len);

121
target/linux/bcm47xx/patches-5.4/209-b44-register-adm-switch.patch
View File

@ -1,121 +0,0 @@
From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 9 Nov 2013 17:03:59 +0100
Subject: [PATCH 210/210] b44: register adm switch
---
drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++
drivers/net/ethernet/broadcom/b44.h | 3 ++
2 files changed, 60 insertions(+)
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -31,6 +31,8 @@
#include <linux/ssb/ssb.h>
#include <linux/slab.h>
#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/adm6996-gpio.h>
#include <linux/uaccess.h>
#include <asm/io.h>
@@ -2249,6 +2251,69 @@ static void b44_adjust_link(struct net_d
}
}
+#ifdef CONFIG_BCM47XX
+static int b44_register_adm_switch(struct b44 *bp)
+{
+ int gpio;
+ struct platform_device *pdev;
+ struct adm6996_gpio_platform_data adm_data = {0};
+ struct platform_device_info info = {0};
+
+ adm_data.model = ADM6996L;
+ gpio = bcm47xx_nvram_gpio_pin("adm_eecs");
+ if (gpio >= 0)
+ adm_data.eecs = gpio;
+ else
+ adm_data.eecs = 2;
+
+ gpio = bcm47xx_nvram_gpio_pin("adm_eesk");
+ if (gpio >= 0)
+ adm_data.eesk = gpio;
+ else
+ adm_data.eesk = 3;
+
+ gpio = bcm47xx_nvram_gpio_pin("adm_eedi");
+ if (gpio >= 0)
+ adm_data.eedi = gpio;
+ else
+ adm_data.eedi = 4;
+
+ /*
+ * We ignore the "adm_rc" GPIO here. The driver does not use it,
+ * and it conflicts with the Reset button GPIO on the Linksys WRT54GSv1.
+ */
+
+ info.parent = bp->sdev->dev;
+ info.name = "adm6996_gpio";
+ info.id = -1;
+ info.data = &adm_data;
+ info.size_data = sizeof(adm_data);
+
+ if (!bp->adm_switch) {
+ pdev = platform_device_register_full(&info);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ bp->adm_switch = pdev;
+ }
+ return 0;
+}
+static void b44_unregister_adm_switch(struct b44 *bp)
+{
+ if (bp->adm_switch)
+ platform_device_unregister(bp->adm_switch);
+}
+#else
+static int b44_register_adm_switch(struct b44 *bp)
+{
+ return 0;
+}
+static void b44_unregister_adm_switch(struct b44 *bp)
+{
+
+}
+#endif /* CONFIG_BCM47XX */
+
static int b44_register_phy_one(struct b44 *bp)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
@@ -2285,6 +2350,9 @@ static int b44_register_phy_one(struct b
if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) &&
(sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {
+ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM)
+ b44_register_adm_switch(bp);
+
dev_info(sdev->dev,
"could not find PHY at %i, use fixed one\n",
bp->phy_addr);
@@ -2481,6 +2549,7 @@ static void b44_remove_one(struct ssb_de
unregister_netdev(dev);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
b44_unregister_phy_one(bp);
+ b44_unregister_adm_switch(bp);
ssb_device_disable(sdev, 0);
ssb_bus_may_powerdown(sdev->bus);
netif_napi_del(&bp->napi);
--- a/drivers/net/ethernet/broadcom/b44.h
+++ b/drivers/net/ethernet/broadcom/b44.h
@@ -408,6 +408,9 @@ struct b44 {
struct mii_bus *mii_bus;
int old_link;
struct mii_if_info mii_if;
+
+ /* platform device for associated switch */
+ struct platform_device *adm_switch;
};
#endif /* _B44_H */

54
target/linux/bcm47xx/patches-5.4/210-b44_phy_fix.patch
View File

@ -1,54 +0,0 @@
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -431,10 +431,34 @@ static void b44_wap54g10_workaround(stru
error:
pr_warn("PHY: cannot reset MII transceiver isolate bit\n");
}
+
+static void b44_bcm47xx_workarounds(struct b44 *bp)
+{
+ char buf[20];
+ struct ssb_device *sdev = bp->sdev;
+
+ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */
+ if (sdev->bus->sprom.board_num == 100) {
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
+ } else {
+ /* WL-HDD */
+ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 &&
+ !strncmp(buf, "WL300-", strlen("WL300-"))) {
+ if (sdev->bus->sprom.et0phyaddr == 0 &&
+ sdev->bus->sprom.et1phyaddr == 1)
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
+ }
+ }
+ return;
+}
#else
static inline void b44_wap54g10_workaround(struct b44 *bp)
{
}
+
+static inline void b44_bcm47xx_workarounds(struct b44 *bp)
+{
+}
#endif
static int b44_setup_phy(struct b44 *bp)
@@ -443,6 +467,7 @@ static int b44_setup_phy(struct b44 *bp)
int err;
b44_wap54g10_workaround(bp);
+ b44_bcm47xx_workarounds(bp);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
return 0;
@@ -2179,6 +2204,8 @@ static int b44_get_invariants(struct b44
* valid PHY address. */
bp->phy_addr &= 0x1F;
+ b44_bcm47xx_workarounds(bp);
+
memcpy(bp->dev->dev_addr, addr, ETH_ALEN);
if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){

25
target/linux/bcm47xx/patches-5.4/280-activate_ssb_support_in_usb.patch
View File

@ -1,25 +0,0 @@
This prevents the options from being delete with make kernel_oldconfig.
---
drivers/ssb/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/bcma/Kconfig
+++ b/drivers/bcma/Kconfig
@@ -32,6 +32,7 @@ config BCMA_HOST_PCI
config BCMA_HOST_SOC
bool "Support for BCMA in a SoC"
depends on HAS_IOMEM
+ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
help
Host interface for a Broadcom AIX bus directly mapped into
the memory. This only works with the Broadcom SoCs from the
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -136,6 +136,7 @@ config SSB_SFLASH
config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
default y
config SSB_DRIVER_EXTIF

21
target/linux/bcm47xx/patches-5.4/300-fork_cacheflush.patch
View File

@ -1,21 +0,0 @@
From: Wolfram Joost <dbox2@frokaschwei.de>
Subject: [PATCH] fork_cacheflush
On ASUS WL-500gP there are many unexpected "Segmentation fault"s that
seem to be caused by a kernel. They can be avoided by:
1) Disabling highpage
2) Using flush_cache_mm in flush_cache_dup_mm
For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035
---
--- a/arch/mips/include/asm/cacheflush.h
+++ b/arch/mips/include/asm/cacheflush.h
@@ -46,7 +46,7 @@
extern void (*flush_cache_all)(void);
extern void (*__flush_cache_all)(void);
extern void (*flush_cache_mm)(struct mm_struct *mm);
-#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
extern void (*flush_cache_range)(struct vm_area_struct *vma,
unsigned long start, unsigned long end);
extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);

74
target/linux/bcm47xx/patches-5.4/310-no_highpage.patch
View File

@ -1,74 +0,0 @@
From: Jeff Hansen <jhansen@cardaccess-inc.com>
Subject: [PATCH] no highpage
On ASUS WL-500gP there are many unexpected "Segmentation fault"s that
seem to be caused by a kernel. They can be avoided by:
1) Disabling highpage
2) Using flush_cache_mm in flush_cache_dup_mm
For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035
---
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -71,6 +71,7 @@ static inline unsigned int page_size_ftl
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
#include <linux/pfn.h>
+#include <asm/cpu-features.h>
extern void build_clear_page(void);
extern void build_copy_page(void);
@@ -110,11 +111,16 @@ static inline void clear_user_page(void
flush_data_cache_page((unsigned long)addr);
}
-struct vm_area_struct;
-extern void copy_user_highpage(struct page *to, struct page *from,
- unsigned long vaddr, struct vm_area_struct *vma);
+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
+ struct page *to)
+{
+ extern void (*flush_data_cache_page)(unsigned long addr);
-#define __HAVE_ARCH_COPY_USER_HIGHPAGE
+ copy_page(vto, vfrom);
+ if (!cpu_has_ic_fills_f_dc ||
+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+ flush_data_cache_page((unsigned long)vto);
+}
/*
* These are used to make use of C type-checking..
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -168,30 +168,6 @@ void kunmap_coherent(void)
preempt_enable();
}
-void copy_user_highpage(struct page *to, struct page *from,
- unsigned long vaddr, struct vm_area_struct *vma)
-{
- void *vfrom, *vto;
-
- vto = kmap_atomic(to);
- if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
- page_mapcount(from) && !Page_dcache_dirty(from)) {
- vfrom = kmap_coherent(from, vaddr);
- copy_page(vto, vfrom);
- kunmap_coherent();
- } else {
- vfrom = kmap_atomic(from);
- copy_page(vto, vfrom);
- kunmap_atomic(vfrom);
- }
- if ((!cpu_has_ic_fills_f_dc) ||
- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
- flush_data_cache_page((unsigned long)vto);
- kunmap_atomic(vto);
- /* Make sure this page is cleared on other CPU's too before using it */
- smp_wmb();
-}
-
void copy_to_user_page(struct vm_area_struct *vma,
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len)

185
target/linux/bcm47xx/patches-5.4/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch
View File

@ -1,185 +0,0 @@
--- a/arch/mips/bcm47xx/board.c
+++ b/arch/mips/bcm47xx/board.c
@@ -141,6 +141,7 @@ struct bcm47xx_board_type_list2 bcm47xx_
{{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"},
{{BCM47XX_BOARD_LINKSYS_WRT310NV1, "Linksys WRT310N V1"}, "WRT310N", "1.0"},
{{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"},
+ {{BCM47XX_BOARD_LINKSYS_WRT320N_V1, "Linksys WRT320N V1"}, "WRT320N", "1.0"},
{{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"},
{{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"},
{{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"},
@@ -161,9 +162,12 @@ struct bcm47xx_board_type_list1 bcm47xx_
{{BCM47XX_BOARD_LUXUL_XWR_600_V1, "Luxul XWR-600 V1"}, "luxul_xwr600_v1"},
{{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"},
{{BCM47XX_BOARD_NETGEAR_R6200_V1, "Netgear R6200 V1"}, "U12H192T00_NETGEAR"},
+ {{BCM47XX_BOARD_NETGEAR_R6300_V1, "Netgear R6300 V1"}, "U12H218T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"},
+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V1, "Netgear WN2500RP V1"}, "U12H197T00_NETGEAR"},
+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V2, "Netgear WN2500RP V2"}, "U12H294T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"},
{{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"},
--- a/arch/mips/bcm47xx/buttons.c
+++ b/arch/mips/bcm47xx/buttons.c
@@ -27,6 +27,12 @@
/* Asus */
static const struct gpio_keys_button
+bcm47xx_buttons_asus_rtn10u[] __initconst = {
+ BCM47XX_GPIO_KEY(20, KEY_WPS_BUTTON),
+ BCM47XX_GPIO_KEY(21, KEY_RESTART),
+};
+
+static const struct gpio_keys_button
bcm47xx_buttons_asus_rtn12[] __initconst = {
BCM47XX_GPIO_KEY(0, KEY_WPS_BUTTON),
BCM47XX_GPIO_KEY(1, KEY_RESTART),
@@ -277,6 +283,18 @@ bcm47xx_buttons_linksys_wrt310nv1[] __in
};
static const struct gpio_keys_button
+bcm47xx_buttons_linksys_wrt310n_v2[] __initconst = {
+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON),
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
+};
+
+static const struct gpio_keys_button
+bcm47xx_buttons_linksys_wrt320n_v1[] __initconst = {
+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON),
+ BCM47XX_GPIO_KEY(8, KEY_RESTART),
+};
+
+static const struct gpio_keys_button
bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = {
BCM47XX_GPIO_KEY(5, KEY_WIMAX),
BCM47XX_GPIO_KEY(6, KEY_RESTART),
@@ -392,6 +410,17 @@ bcm47xx_buttons_netgear_r6200_v1[] __ini
};
static const struct gpio_keys_button
+bcm47xx_buttons_netgear_r6300_v1[] __initconst = {
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
+};
+
+static const struct gpio_keys_button
+bcm47xx_buttons_netgear_wn2500rp_v1[] __initconst = {
+ BCM47XX_GPIO_KEY(12, KEY_RESTART),
+ BCM47XX_GPIO_KEY(31, KEY_WPS_BUTTON),
+};
+
+static const struct gpio_keys_button
bcm47xx_buttons_netgear_wndr3400v1[] __initconst = {
BCM47XX_GPIO_KEY(4, KEY_RESTART),
BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON),
@@ -478,6 +507,9 @@ int __init bcm47xx_buttons_register(void
int err;
switch (board) {
+ case BCM47XX_BOARD_ASUS_RTN10U:
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn10u);
+ break;
case BCM47XX_BOARD_ASUS_RTN12:
err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn12);
break;
@@ -608,6 +640,12 @@ int __init bcm47xx_buttons_register(void
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1);
break;
+ case BCM47XX_BOARD_LINKSYS_WRT310NV2:
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310n_v2);
+ break;
+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1:
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt320n_v1);
+ break;
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2);
break;
@@ -674,6 +712,12 @@ int __init bcm47xx_buttons_register(void
case BCM47XX_BOARD_NETGEAR_R6200_V1:
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6200_v1);
break;
+ case BCM47XX_BOARD_NETGEAR_R6300_V1:
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6300_v1);
+ break;
+ case BCM47XX_BOARD_NETGEAR_WN2500RP_V1:
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wn2500rp_v1);
+ break;
case BCM47XX_BOARD_NETGEAR_WNDR3400V1:
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1);
break;
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
@@ -72,6 +72,7 @@ enum bcm47xx_board {
BCM47XX_BOARD_LINKSYS_WRT300NV11,
BCM47XX_BOARD_LINKSYS_WRT310NV1,
BCM47XX_BOARD_LINKSYS_WRT310NV2,
+ BCM47XX_BOARD_LINKSYS_WRT320N_V1,
BCM47XX_BOARD_LINKSYS_WRT54G3GV2,
BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101,
BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467,
@@ -99,9 +100,12 @@ enum bcm47xx_board {
BCM47XX_BOARD_MOTOROLA_WR850GV2V3,
BCM47XX_BOARD_NETGEAR_R6200_V1,
+ BCM47XX_BOARD_NETGEAR_R6300_V1,
BCM47XX_BOARD_NETGEAR_WGR614V8,
BCM47XX_BOARD_NETGEAR_WGR614V9,
BCM47XX_BOARD_NETGEAR_WGR614_V10,
+ BCM47XX_BOARD_NETGEAR_WN2500RP_V1,
+ BCM47XX_BOARD_NETGEAR_WN2500RP_V2,
BCM47XX_BOARD_NETGEAR_WNDR3300,
BCM47XX_BOARD_NETGEAR_WNDR3400V1,
BCM47XX_BOARD_NETGEAR_WNDR3400V2,
--- a/arch/mips/bcm47xx/leds.c
+++ b/arch/mips/bcm47xx/leds.c
@@ -30,6 +30,14 @@
/* Asus */
static const struct gpio_led
+bcm47xx_leds_asus_rtn10u[] __initconst = {
+ BCM47XX_GPIO_LED(5, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
+ BCM47XX_GPIO_LED(6, "green", "power", 1, LEDS_GPIO_DEFSTATE_ON),
+ BCM47XX_GPIO_LED(7, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),
+ BCM47XX_GPIO_LED(8, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF),
+};
+
+static const struct gpio_led
bcm47xx_leds_asus_rtn12[] __initconst = {
BCM47XX_GPIO_LED(2, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
BCM47XX_GPIO_LED(7, "unk", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
@@ -314,6 +322,13 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc
};
static const struct gpio_led
+bcm47xx_leds_linksys_wrt320n_v1[] __initconst = {
+ BCM47XX_GPIO_LED(1, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
+ BCM47XX_GPIO_LED(2, "blue", "power", 0, LEDS_GPIO_DEFSTATE_ON),
+ BCM47XX_GPIO_LED(4, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
+};
+
+static const struct gpio_led
bcm47xx_leds_linksys_wrt54g_generic[] __initconst = {
BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
@@ -556,6 +571,9 @@ void __init bcm47xx_leds_register(void)
enum bcm47xx_board board = bcm47xx_board_get();
switch (board) {
+ case BCM47XX_BOARD_ASUS_RTN10U:
+ bcm47xx_set_pdata(bcm47xx_leds_asus_rtn10u);
+ break;
case BCM47XX_BOARD_ASUS_RTN12:
bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12);
break;
@@ -689,6 +707,9 @@ void __init bcm47xx_leds_register(void)
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1);
break;
+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1:
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt320n_v1);
+ break;
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2);
break;

34
target/linux/bcm47xx/patches-5.4/400-mtd-bcm47xxpart-get-nvram.patch
View File

@ -1,34 +0,0 @@
--- a/drivers/mtd/parsers/bcm47xxpart.c
+++ b/drivers/mtd/parsers/bcm47xxpart.c
@@ -98,6 +98,7 @@ static int bcm47xxpart_parse(struct mtd_
int trx_num = 0; /* Number of found TRX partitions */
int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
int err;
+ bool found_nvram = false;
/*
* Some really old flashes (like AT45DB*) had smaller erasesize-s, but
@@ -279,12 +280,23 @@ static int bcm47xxpart_parse(struct mtd_
if (buf[0] == NVRAM_HEADER) {
bcm47xxpart_add_part(&parts[curr_part++], "nvram",
master->size - blocksize, 0);
+ found_nvram = true;
break;
}
}
kfree(buf);
+ if (!found_nvram) {
+ pr_err("can not find a nvram partition reserve last block\n");
+ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess",
+ master->size - blocksize * 2, MTD_WRITEABLE);
+ for (i = 0; i < curr_part; i++) {
+ if (parts[i].size + parts[i].offset == master->size)
+ parts[i].offset -= blocksize * 2;
+ }
+ }
+
/*
* Assume that partitions end at the beginning of the one they are
* followed by.

41
target/linux/bcm47xx/patches-5.4/610-pci_ide_fix.patch
View File

@ -1,41 +0,0 @@
From: b.sander
Subject: [PATCH] pci: IDE fix
These are standard probing messages when using pdc202xx_old:
pdc202xx_old 0000:00:01.0: IDE controller (0x105a:0x0d30 rev 0x02)
PCI: Enabling device 0000:00:01.0 (0004 -> 0007)
PCI: Fixing up device 0000:00:01.0
0000:00:01.0: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode.
0000:00:01.0: FORCING BURST BIT 0x00->0x01 ACTIVE
pdc202xx_old 0000:00:01.0: 100% native mode on irq 6
With the default MAX_HWIFS value after above we get:
ide2: BM-DMA at 0x0400-0x0407
ide3: BM-DMA at 0x0408-0x040f
Probing IDE interface ide2...
hde: CF500, CFA DISK drive
As you can see it's ide2 + ide3 and hde.
With this patch applied we get:
ide0: BM-DMA at 0x0400-0x0407
ide1: BM-DMA at 0x0408-0x040f
Probing IDE interface ide0...
hda: CF500, CFA DISK drive
This fixes OpenWrt ticket #7061: https://dev.openwrt.org/ticket/7061
---
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -236,7 +236,11 @@ static inline void ide_std_init_ports(st
hw->io_ports.ctl_addr = ctl_addr;
}
+#if defined CONFIG_BCM47XX
+# define MAX_HWIFS 2
+#else
#define MAX_HWIFS 10
+#endif
/*
* Now for the data we need to maintain per-drive: ide_drive_t

17
target/linux/bcm47xx/patches-5.4/791-tg3-no-pci-sleep.patch
View File

@ -1,17 +0,0 @@
When the Ethernet controller is powered down and someone wants to
access the mdio bus like the witch driver (b53) the system crashed if
PCI_D3hot was set before. This patch deactivates this power sawing mode
when a switch driver is in use.
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -4279,7 +4279,8 @@ static int tg3_power_down_prepare(struct
static void tg3_power_down(struct tg3 *tp)
{
pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));
- pci_set_power_state(tp->pdev, PCI_D3hot);
+ if (!tg3_flag(tp, ROBOSWITCH))
+ pci_set_power_state(tp->pdev, PCI_D3hot);
}
static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u32 *speed, u8 *duplex)

73
target/linux/bcm47xx/patches-5.4/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch
View File

@ -1,73 +0,0 @@
From 597715c61ae75a05ab3310a34ff3857a006f0f63 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 20 Nov 2014 21:32:42 +0100
Subject: [PATCH] bcma: add table of serial flashes with smaller blocks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/bcma/driver_chipcommon_sflash.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
--- a/drivers/bcma/driver_chipcommon_sflash.c
+++ b/drivers/bcma/driver_chipcommon_sflash.c
@@ -9,6 +9,7 @@
#include <linux/platform_device.h>
#include <linux/bcma/bcma.h>
+#include <bcm47xx_board.h>
static struct resource bcma_sflash_resource = {
.name = "bcma_sflash",
@@ -42,6 +43,13 @@ static const struct bcma_sflash_tbl_e bc
{ NULL },
};
+/* Some devices use smaller blocks (and have more of them) */
+static const struct bcma_sflash_tbl_e bcma_sflash_st_shrink_tbl[] = {
+ { "M25P16", 0x14, 0x1000, 512, },
+ { "M25P32", 0x15, 0x1000, 1024, },
+ { NULL },
+};
+
static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = {
{ "SST25WF512", 1, 0x1000, 16, },
{ "SST25VF512", 0x48, 0x1000, 16, },
@@ -85,6 +93,24 @@ static void bcma_sflash_cmd(struct bcma_
bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n");
}
+const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+ const struct bcma_sflash_tbl_e *e;
+
+ switch (board) {
+ case BCM47XX_BOARD_NETGEAR_WGR614_V10:
+ case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
+ for (e = bcma_sflash_st_shrink_tbl; e->name; e++) {
+ if (e->id == id)
+ return e;
+ }
+ return NULL;
+ default:
+ return NULL;
+ }
+}
+
/* Initialize serial flash access */
int bcma_sflash_init(struct bcma_drv_cc *cc)
{
@@ -115,6 +141,10 @@ int bcma_sflash_init(struct bcma_drv_cc
case 0x13:
return -ENOTSUPP;
default:
+ e = bcma_sflash_shrink_flash(id);
+ if (e)
+ break;
+
for (e = bcma_sflash_st_tbl; e->name; e++) {
if (e->id == id)
break;

295
target/linux/bcm47xx/patches-5.4/820-wgt634u-nvram-fix.patch
View File

@ -1,295 +0,0 @@
The Netgear wgt634u uses a different format for storing the
configuration. This patch is needed to read out the correct
configuration. The cfe_env.c file uses a different method way to read
out the configuration than the in kernel cfe config reader.
--- a/drivers/firmware/broadcom/Makefile
+++ b/drivers/firmware/broadcom/Makefile
@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o
+obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o cfe_env.o
obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx_sprom.o
--- /dev/null
+++ b/drivers/firmware/broadcom/cfe_env.c
@@ -0,0 +1,228 @@
+/*
+ * CFE environment variable access
+ *
+ * Copyright 2001-2003, Broadcom Corporation
+ * Copyright 2006, Felix Fietkau <nbd@nbd.name>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <asm/io.h>
+#include <linux/uaccess.h>
+
+#define NVRAM_SIZE (0x1ff0)
+static char _nvdata[NVRAM_SIZE];
+static char _valuestr[256];
+
+/*
+ * TLV types. These codes are used in the "type-length-value"
+ * encoding of the items stored in the NVRAM device (flash or EEPROM)
+ *
+ * The layout of the flash/nvram is as follows:
+ *
+ * <type> <length> <data ...> <type> <length> <data ...> <type_end>
+ *
+ * The type code of "ENV_TLV_TYPE_END" marks the end of the list.
+ * The "length" field marks the length of the data section, not
+ * including the type and length fields.
+ *
+ * Environment variables are stored as follows:
+ *
+ * <type_env> <length> <flags> <name> = <value>
+ *
+ * If bit 0 (low bit) is set, the length is an 8-bit value.
+ * If bit 0 (low bit) is clear, the length is a 16-bit value
+ *
+ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still
+ * indicates the size of the length field.
+ *
+ * Flags are from the constants below:
+ *
+ */
+#define ENV_LENGTH_16BITS 0x00 /* for low bit */
+#define ENV_LENGTH_8BITS 0x01
+
+#define ENV_TYPE_USER 0x80
+
+#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
+#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
+
+/*
+ * The actual TLV types we support
+ */
+
+#define ENV_TLV_TYPE_END 0x00
+#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
+
+/*
+ * Environment variable flags
+ */
+
+#define ENV_FLG_NORMAL 0x00 /* normal read/write */
+#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */
+#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */
+
+#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */
+#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */
+
+
+/* *********************************************************************
+ * _nvram_read(buffer,offset,length)
+ *
+ * Read data from the NVRAM device
+ *
+ * Input parameters:
+ * buffer - destination buffer
+ * offset - offset of data to read
+ * length - number of bytes to read
+ *
+ * Return value:
+ * number of bytes read, or <0 if error occured
+ ********************************************************************* */
+static int
+_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
+{
+ int i;
+ if (offset > NVRAM_SIZE)
+ return -1;
+
+ for ( i = 0; i < length; i++) {
+ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
+ }
+ return length;
+}
+
+
+static char*
+_strnchr(const char *dest,int c,size_t cnt)
+{
+ while (*dest && (cnt > 0)) {
+ if (*dest == c) return (char *) dest;
+ dest++;
+ cnt--;
+ }
+ return NULL;
+}
+
+
+
+/*
+ * Core support API: Externally visible.
+ */
+
+/*
+ * Get the value of an NVRAM variable
+ * @param name name of variable to get
+ * @return value of variable or NULL if undefined
+ */
+
+char *cfe_env_get(unsigned char *nv_buf, const char *name)
+{
+ int size;
+ unsigned char *buffer;
+ unsigned char *ptr;
+ unsigned char *envval;
+ unsigned int reclen;
+ unsigned int rectype;
+ int offset;
+ int flg;
+
+ if (!strcmp(name, "nvram_type"))
+ return "cfe";
+
+ size = NVRAM_SIZE;
+ buffer = &_nvdata[0];
+
+ ptr = buffer;
+ offset = 0;
+
+ /* Read the record type and length */
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
+ goto error;
+ }
+
+ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) {
+
+ /* Adjust pointer for TLV type */
+ rectype = *(ptr);
+ offset++;
+ size--;
+
+ /*
+ * Read the length. It can be either 1 or 2 bytes
+ * depending on the code
+ */
+ if (rectype & ENV_LENGTH_8BITS) {
+ /* Read the record type and length - 8 bits */
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
+ goto error;
+ }
+ reclen = *(ptr);
+ size--;
+ offset++;
+ }
+ else {
+ /* Read the record type and length - 16 bits, MSB first */
+ if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
+ goto error;
+ }
+ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
+ size -= 2;
+ offset += 2;
+ }
+
+ if (reclen > size)
+ break; /* should not happen, bad NVRAM */
+
+ switch (rectype) {
+ case ENV_TLV_TYPE_ENV:
+ /* Read the TLV data */
+ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
+ goto error;
+ flg = *ptr++;
+ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
+ if (envval) {
+ *envval++ = '\0';
+ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
+ _valuestr[(reclen-1)-(envval-ptr)] = '\0';
+#if 0
+ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
+#endif
+ if(!strcmp(ptr, name)){
+ return _valuestr;
+ }
+ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
+ return _valuestr;
+ }
+ break;
+
+ default:
+ /* Unknown TLV type, skip it. */
+ break;
+ }
+
+ /*
+ * Advance to next TLV
+ */
+
+ size -= (int)reclen;
+ offset += reclen;
+
+ /* Read the next record type */
+ ptr = buffer;
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1)
+ goto error;
+ }
+
+error:
+ return NULL;
+
+}
+
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
@@ -33,6 +33,8 @@ struct nvram_header {
static char nvram_buf[NVRAM_SPACE];
static size_t nvram_len;
static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
+static int cfe_env;
+extern char *cfe_env_get(char *nv_buf, const char *name);
/**
* bcm47xx_nvram_is_valid - check for a valid NVRAM at specified memory
@@ -80,6 +82,26 @@ static int bcm47xx_nvram_find_and_copy(v
return -EEXIST;
}
+ cfe_env = 0;
+
+ /* XXX: hack for supporting the CFE environment stuff on WGT634U */
+ if (res_size >= 8 * 1024 * 1024) {
+ u32 *src = (u32 *)(flash_start + 8 * 1024 * 1024 - 0x2000);
+ u32 *dst = (u32 *)nvram_buf;
+
+ if ((*src & 0xff00ff) == 0x000001) {
+ printk("early_nvram_init: WGT634U NVRAM found.\n");
+
+ for (i = 0; i < 0x1ff0; i++) {
+ if (*src == 0xFFFFFFFF)
+ break;
+ *dst++ = *src++;
+ }
+ cfe_env = 1;
+ return 0;
+ }
+ }
+
/* TODO: when nvram is on nand flash check for bad blocks first. */
/* Try every possible flash size and check for NVRAM at its end */
@@ -172,6 +194,13 @@ int bcm47xx_nvram_getenv(const char *nam
if (!name)
return -EINVAL;
+ if (cfe_env) {
+ value = cfe_env_get(nvram_buf, name);
+ if (!value)
+ return -ENOENT;
+ return snprintf(val, val_len, "%s", value);
+ }
+
if (!nvram_len) {
err = nvram_init();
if (err)

101
target/linux/bcm47xx/patches-5.4/830-huawei_e970_support.patch
View File

@ -1,101 +0,0 @@
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -37,6 +37,7 @@
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
#include <linux/bcma/bcma_soc.h>
+#include <linux/old_gpio_wdt.h>
#include <asm/bootinfo.h>
#include <asm/idle.h>
#include <asm/prom.h>
@@ -254,6 +255,33 @@ static struct fixed_phy_status bcm47xx_f
.duplex = DUPLEX_FULL,
};
+static struct gpio_wdt_platform_data gpio_wdt_data;
+
+static struct platform_device gpio_wdt_device = {
+ .name = "gpio-wdt",
+ .id = 0,
+ .dev = {
+ .platform_data = &gpio_wdt_data,
+ },
+};
+
+static int __init bcm47xx_register_gpio_watchdog(void)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+
+ switch (board) {
+ case BCM47XX_BOARD_HUAWEI_E970:
+ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n");
+ gpio_wdt_data.gpio = 7;
+ gpio_wdt_data.interval = HZ;
+ gpio_wdt_data.first_interval = HZ / 5;
+ return platform_device_register(&gpio_wdt_device);
+ default:
+ /* Nothing to do */
+ return 0;
+ }
+}
+
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
@@ -275,6 +303,7 @@ static int __init bcm47xx_register_bus_c
bcm47xx_workarounds();
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
+ bcm47xx_register_gpio_watchdog();
return 0;
}
device_initcall(bcm47xx_register_bus_complete);
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -63,6 +63,7 @@ CONFIG_HW_RANDOM=y
CONFIG_GPIO_SYSFS=y
CONFIG_WATCHDOG=y
CONFIG_BCM47XX_WDT=y
+CONFIG_GPIO_WDT=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_USB=y
--- a/drivers/ssb/embedded.c
+++ b/drivers/ssb/embedded.c
@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu
}
EXPORT_SYMBOL(ssb_watchdog_timer_set);
+#ifdef CONFIG_BCM47XX
+#include <bcm47xx_board.h>
+
+static bool ssb_watchdog_supported(void)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+
+ /* The Huawei E970 has a hardware watchdog using a GPIO */
+ switch (board) {
+ case BCM47XX_BOARD_HUAWEI_E970:
+ return false;
+ default:
+ return true;
+ }
+}
+#else
+static bool ssb_watchdog_supported(void)
+{
+ return true;
+}
+#endif
+
int ssb_watchdog_register(struct ssb_bus *bus)
{
struct bcm47xx_wdt wdt = {};
struct platform_device *pdev;
+ if (!ssb_watchdog_supported())
+ return 0;
+
if (ssb_chipco_available(&bus->chipco)) {
wdt.driver_data = &bus->chipco;
wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;

360
target/linux/bcm47xx/patches-5.4/831-old_gpio_wdt.patch
View File

@ -1,360 +0,0 @@
This generic GPIO watchdog is used on Huawei E970 (bcm47xx)
Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1657,6 +1657,15 @@ config WDT_MTX1
Hardware driver for the MTX-1 boards. This is a watchdog timer that
will reboot the machine after a 100 seconds timer expired.
+config GPIO_WDT
+ tristate "GPIO Hardware Watchdog"
+ help
+ Hardware driver for GPIO-controlled watchdogs. GPIO pin and
+ toggle interval settings are platform-specific. The driver
+ will stop toggling the GPIO (i.e. machine reboots) after a
+ 100 second timer expired and no process has written to
+ /dev/watchdog during that time.
+
config PNX833X_WDT
tristate "PNX833x Hardware Watchdog"
depends on SOC_PNX8335
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -158,6 +158,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
+obj-$(CONFIG_GPIO_WDT) += old_gpio_wdt.o
obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
--- /dev/null
+++ b/drivers/watchdog/old_gpio_wdt.c
@@ -0,0 +1,301 @@
+/*
+ * Driver for GPIO-controlled Hardware Watchdogs.
+ *
+ * Copyright (C) 2013 Mathias Adam <m.adam--linux@adamis.de>
+ *
+ * Replaces mtx1_wdt (driver for the MTX-1 Watchdog):
+ *
+ * (C) Copyright 2005 4G Systems <info@4g-systems.biz>,
+ * All Rights Reserved.
+ * http://www.4g-systems.biz
+ *
+ * (C) Copyright 2007 OpenWrt.org, Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Neither Michael Stickel nor 4G Systems admit liability nor provide
+ * warranty for any of this software. This material is provided
+ * "AS-IS" and at no charge.
+ *
+ * (c) Copyright 2005 4G Systems <info@4g-systems.biz>
+ *
+ * Release 0.01.
+ * Author: Michael Stickel michael.stickel@4g-systems.biz
+ *
+ * Release 0.02.
+ * Author: Florian Fainelli florian@openwrt.org
+ * use the Linux watchdog/timer APIs
+ *
+ * Release 0.03.
+ * Author: Mathias Adam <m.adam--linux@adamis.de>
+ * make it a generic gpio watchdog driver
+ *
+ * The Watchdog is configured to reset the MTX-1
+ * if it is not triggered for 100 seconds.
+ * It should not be triggered more often than 1.6 seconds.
+ *
+ * A timer triggers the watchdog every 5 seconds, until
+ * it is opened for the first time. After the first open
+ * it MUST be triggered every 2..95 seconds.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/timer.h>
+#include <linux/completion.h>
+#include <linux/jiffies.h>
+#include <linux/watchdog.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/gpio.h>
+#include <linux/old_gpio_wdt.h>
+
+static int ticks = 100 * HZ;
+
+static struct {
+ struct completion stop;
+ spinlock_t lock;
+ int running;
+ struct timer_list timer;
+ int queue;
+ int default_ticks;
+ unsigned long inuse;
+ unsigned gpio;
+ unsigned int gstate;
+ int interval;
+ int first_interval;
+} gpio_wdt_device;
+
+static void gpio_wdt_trigger(struct timer_list *unused)
+{
+ spin_lock(&gpio_wdt_device.lock);
+ if (gpio_wdt_device.running && ticks > 0)
+ ticks -= gpio_wdt_device.interval;
+
+ /* toggle wdt gpio */
+ gpio_wdt_device.gstate = !gpio_wdt_device.gstate;
+ gpio_set_value(gpio_wdt_device.gpio, gpio_wdt_device.gstate);
+
+ if (gpio_wdt_device.queue && ticks > 0)
+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.interval);
+ else
+ complete(&gpio_wdt_device.stop);
+ spin_unlock(&gpio_wdt_device.lock);
+}
+
+static void gpio_wdt_reset(void)
+{
+ ticks = gpio_wdt_device.default_ticks;
+}
+
+
+static void gpio_wdt_start(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_wdt_device.lock, flags);
+ if (!gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 1;
+ gpio_wdt_device.gstate = 1;
+ gpio_set_value(gpio_wdt_device.gpio, 1);
+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.first_interval);
+ }
+ gpio_wdt_device.running++;
+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags);
+}
+
+static int gpio_wdt_stop(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_wdt_device.lock, flags);
+ if (gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 0;
+ gpio_wdt_device.gstate = 0;
+ gpio_set_value(gpio_wdt_device.gpio, 0);
+ }
+ ticks = gpio_wdt_device.default_ticks;
+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags);
+ return 0;
+}
+
+/* Filesystem functions */
+
+static int gpio_wdt_open(struct inode *inode, struct file *file)
+{
+ if (test_and_set_bit(0, &gpio_wdt_device.inuse))
+ return -EBUSY;
+ return nonseekable_open(inode, file);
+}
+
+
+static int gpio_wdt_release(struct inode *inode, struct file *file)
+{
+ clear_bit(0, &gpio_wdt_device.inuse);
+ return 0;
+}
+
+static long gpio_wdt_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ void __user *argp = (void __user *)arg;
+ int __user *p = (int __user *)argp;
+ unsigned int value;
+ static const struct watchdog_info ident = {
+ .options = WDIOF_CARDRESET,
+ .identity = "GPIO WDT",
+ };
+
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ if (copy_to_user(argp, &ident, sizeof(ident)))
+ return -EFAULT;
+ break;
+ case WDIOC_GETSTATUS:
+ case WDIOC_GETBOOTSTATUS:
+ put_user(0, p);
+ break;
+ case WDIOC_SETOPTIONS:
+ if (get_user(value, p))
+ return -EFAULT;
+ if (value & WDIOS_ENABLECARD)
+ gpio_wdt_start();
+ else if (value & WDIOS_DISABLECARD)
+ gpio_wdt_stop();
+ else
+ return -EINVAL;
+ return 0;
+ case WDIOC_KEEPALIVE:
+ gpio_wdt_reset();
+ break;
+ default:
+ return -ENOTTY;
+ }
+ return 0;
+}
+
+
+static ssize_t gpio_wdt_write(struct file *file, const char *buf,
+ size_t count, loff_t *ppos)
+{
+ if (!count)
+ return -EIO;
+ gpio_wdt_reset();
+ return count;
+}
+
+static const struct file_operations gpio_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .unlocked_ioctl = gpio_wdt_ioctl,
+ .open = gpio_wdt_open,
+ .write = gpio_wdt_write,
+ .release = gpio_wdt_release,
+};
+
+
+static struct miscdevice gpio_wdt_misc = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &gpio_wdt_fops,
+};
+
+
+static int gpio_wdt_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct gpio_wdt_platform_data *gpio_wdt_data = pdev->dev.platform_data;
+
+ gpio_wdt_device.gpio = gpio_wdt_data->gpio;
+ gpio_wdt_device.interval = gpio_wdt_data->interval;
+ gpio_wdt_device.first_interval = gpio_wdt_data->first_interval;
+ if (gpio_wdt_device.first_interval <= 0) {
+ gpio_wdt_device.first_interval = gpio_wdt_device.interval;
+ }
+
+ ret = gpio_request(gpio_wdt_device.gpio, "gpio-wdt");
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to request gpio");
+ return ret;
+ }
+
+ spin_lock_init(&gpio_wdt_device.lock);
+ init_completion(&gpio_wdt_device.stop);
+ gpio_wdt_device.queue = 0;
+ clear_bit(0, &gpio_wdt_device.inuse);
+ timer_setup(&gpio_wdt_device.timer, gpio_wdt_trigger, 0L);
+ gpio_wdt_device.default_ticks = ticks;
+
+ gpio_wdt_start();
+ dev_info(&pdev->dev, "GPIO Hardware Watchdog driver (gpio=%i interval=%i/%i)\n",
+ gpio_wdt_data->gpio, gpio_wdt_data->first_interval, gpio_wdt_data->interval);
+ return 0;
+}
+
+static int gpio_wdt_remove(struct platform_device *pdev)
+{
+ /* FIXME: do we need to lock this test ? */
+ if (gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 0;
+ wait_for_completion(&gpio_wdt_device.stop);
+ }
+
+ gpio_free(gpio_wdt_device.gpio);
+ misc_deregister(&gpio_wdt_misc);
+ return 0;
+}
+
+static struct platform_driver gpio_wdt_driver = {
+ .probe = gpio_wdt_probe,
+ .remove = gpio_wdt_remove,
+ .driver.name = "gpio-wdt",
+ .driver.owner = THIS_MODULE,
+};
+
+static int __init gpio_wdt_init(void)
+{
+ return platform_driver_register(&gpio_wdt_driver);
+}
+arch_initcall(gpio_wdt_init);
+
+/*
+ * We do wdt initialization in two steps: arch_initcall probes the wdt
+ * very early to start pinging the watchdog (misc devices are not yet
+ * available), and later module_init() just registers the misc device.
+ */
+static int gpio_wdt_init_late(void)
+{
+ int ret;
+
+ ret = misc_register(&gpio_wdt_misc);
+ if (ret < 0) {
+ pr_err("GPIO_WDT: failed to register misc device\n");
+ return ret;
+ }
+ return 0;
+}
+#ifndef MODULE
+module_init(gpio_wdt_init_late);
+#endif
+
+static void __exit gpio_wdt_exit(void)
+{
+ platform_driver_unregister(&gpio_wdt_driver);
+}
+module_exit(gpio_wdt_exit);
+
+MODULE_AUTHOR("Michael Stickel, Florian Fainelli, Mathias Adam");
+MODULE_DESCRIPTION("Driver for GPIO hardware watchdogs");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+MODULE_ALIAS("platform:gpio-wdt");
--- /dev/null
+++ b/include/linux/old_gpio_wdt.h
@@ -0,0 +1,21 @@
+/*
+ * Definitions for the GPIO watchdog driver
+ *
+ * Copyright (C) 2013 Mathias Adam <m.adam--linux@adamis.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _GPIO_WDT_H_
+#define _GPIO_WDT_H_
+
+struct gpio_wdt_platform_data {
+ int gpio; /* GPIO line number */
+ int interval; /* watchdog reset interval in system ticks */
+ int first_interval; /* first wd reset interval in system ticks */
+};
+
+#endif /* _GPIO_WDT_H_ */

30
target/linux/bcm47xx/patches-5.4/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch
View File

@ -1,30 +0,0 @@
From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Wed, 8 Apr 2015 06:58:11 +0200
Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
If SoC has a CardBus we can set resources of device at slot 1 only. It's
impossigle to set bridge resources as it simply overwrites device 1
configuration and usually results in Data bus error-s.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/ssb/driver_pcicore.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc
WARN_ON(!pc->hostmode);
if (unlikely(len != 1 && len != 2 && len != 4))
goto out;
+ /* CardBus SoCs allow configuring dev 1 resources only */
+ if (extpci_core->cardbusmode && dev != 1 &&
+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5)
+ goto out;
addr = get_cfgspace_addr(pc, bus, dev, func, off);
if (unlikely(!addr))
goto out;

46
target/linux/bcm47xx/patches-5.4/940-bcm47xx-yenta.patch
View File

@ -1,46 +0,0 @@
--- a/drivers/pcmcia/yenta_socket.c
+++ b/drivers/pcmcia/yenta_socket.c
@@ -921,6 +921,8 @@ static unsigned int yenta_probe_irq(stru
* Probe for usable interrupts using the force
* register to generate bogus card status events.
*/
+#ifndef CONFIG_BCM47XX
+ /* WRT54G3G does not like this */
cb_writel(socket, CB_SOCKET_EVENT, -1);
cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
reg = exca_readb(socket, I365_CSCINT);
@@ -936,6 +938,7 @@ static unsigned int yenta_probe_irq(stru
}
cb_writel(socket, CB_SOCKET_MASK, 0);
exca_writeb(socket, I365_CSCINT, reg);
+#endif
mask = probe_irq_mask(val) & 0xffff;
@@ -1020,6 +1023,10 @@ static void yenta_get_socket_capabilitie
else
socket->socket.irq_mask = 0;
+ /* irq mask probing is broken for the WRT54G3G */
+ if (socket->socket.irq_mask == 0)
+ socket->socket.irq_mask = 0x6f8;
+
dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
socket->socket.irq_mask, socket->cb_irq);
}
@@ -1251,6 +1258,15 @@ static int yenta_probe(struct pci_dev *d
dev_info(&dev->dev, "Socket status: %08x\n",
cb_readl(socket, CB_SOCKET_STATE));
+ /* Generate an interrupt on card insert/remove */
+ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
+
+ /* Set up Multifunction Routing Status Register */
+ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
+
+ /* Switch interrupts to parallelized */
+ config_writeb(socket, 0x92, 0x64);
+
yenta_fixup_parent_bridge(dev->subordinate);
/* Register it with the pcmcia layer.. */

11
target/linux/bcm47xx/patches-5.4/976-ssb_increase_pci_delay.patch
View File

@ -1,11 +0,0 @@
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -390,7 +390,7 @@ static void ssb_pcicore_init_hostmode(st
set_io_port_base(ssb_pcicore_controller.io_map_base);
/* Give some time to the PCI controller to configure itself with the new
* values. Not waiting at this point causes crashes of the machine. */
- mdelay(10);
+ mdelay(300);
register_pci_controller(&ssb_pcicore_controller);
}

24
target/linux/bcm47xx/patches-5.4/999-wl_exports.patch
View File

@ -1,24 +0,0 @@
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
@@ -30,7 +30,8 @@ struct nvram_header {
u32 config_ncdl; /* ncdl values for memc */
};
-static char nvram_buf[NVRAM_SPACE];
+char nvram_buf[NVRAM_SPACE];
+EXPORT_SYMBOL(nvram_buf);
static size_t nvram_len;
static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
static int cfe_env;
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -62,6 +62,9 @@ void (*_dma_cache_wback_inv)(unsigned lo
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+EXPORT_SYMBOL(_dma_cache_wback_inv);
+EXPORT_SYMBOL(_dma_cache_inv);
+
#endif /* CONFIG_DMA_NONCOHERENT */
/*

225
target/linux/bcm4908/config-5.4
View File

@ -1,225 +0,0 @@
CONFIG_64BIT=y
CONFIG_ARCH_BCM4908=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CONT_SHIFT=4
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_SSBD=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_B53=y
CONFIG_BCM4908_ENET=y
CONFIG_BCM7038_WDT=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_PMB=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_PM=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200"
CONFIG_CMDLINE_FORCE=y
CONFIG_COMMON_CLK=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_REMAP=y
CONFIG_DRM_RCAR_WRITEBACK=y
CONFIG_DTC=y
CONFIG_EDAC_SUPPORT=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FRAME_POINTER=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_BRCMSTB=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_OF_PARTS_BCM4908=y
# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPLIT_CFE_BOOTFS=y
# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_BCM_SF2=y
CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_BRCM_COMMON=y
CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_IOPORT_MAP=y
CONFIG_NR_CPUS=4
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_PADATA=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PHY_BRCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM4908=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RATIONAL=y
CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB_SUPPORT=y
CONFIG_VMAP_STACK=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

68
target/linux/bcm4908/files-5.4/drivers/net/ethernet/broadcom/unimac.h
View File

@ -1,68 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __UNIMAC_H
#define __UNIMAC_H
#define UMAC_HD_BKP_CTRL 0x004
#define HD_FC_EN (1 << 0)
#define HD_FC_BKOFF_OK (1 << 1)
#define IPG_CONFIG_RX_SHIFT 2
#define IPG_CONFIG_RX_MASK 0x1F
#define UMAC_CMD 0x008
#define CMD_TX_EN (1 << 0)
#define CMD_RX_EN (1 << 1)
#define CMD_SPEED_10 0
#define CMD_SPEED_100 1
#define CMD_SPEED_1000 2
#define CMD_SPEED_2500 3
#define CMD_SPEED_SHIFT 2
#define CMD_SPEED_MASK 3
#define CMD_PROMISC (1 << 4)
#define CMD_PAD_EN (1 << 5)
#define CMD_CRC_FWD (1 << 6)
#define CMD_PAUSE_FWD (1 << 7)
#define CMD_RX_PAUSE_IGNORE (1 << 8)
#define CMD_TX_ADDR_INS (1 << 9)
#define CMD_HD_EN (1 << 10)
#define CMD_SW_RESET_OLD (1 << 11)
#define CMD_SW_RESET (1 << 13)
#define CMD_LCL_LOOP_EN (1 << 15)
#define CMD_AUTO_CONFIG (1 << 22)
#define CMD_CNTL_FRM_EN (1 << 23)
#define CMD_NO_LEN_CHK (1 << 24)
#define CMD_RMT_LOOP_EN (1 << 25)
#define CMD_RX_ERR_DISC (1 << 26)
#define CMD_PRBL_EN (1 << 27)
#define CMD_TX_PAUSE_IGNORE (1 << 28)
#define CMD_TX_RX_EN (1 << 29)
#define CMD_RUNT_FILTER_DIS (1 << 30)
#define UMAC_MAC0 0x00c
#define UMAC_MAC1 0x010
#define UMAC_MAX_FRAME_LEN 0x014
#define UMAC_PAUSE_QUANTA 0x018
#define UMAC_MODE 0x044
#define MODE_LINK_STATUS (1 << 5)
#define UMAC_FRM_TAG0 0x048 /* outer tag */
#define UMAC_FRM_TAG1 0x04c /* inner tag */
#define UMAC_TX_IPG_LEN 0x05c
#define UMAC_EEE_CTRL 0x064
#define EN_LPI_RX_PAUSE (1 << 0)
#define EN_LPI_TX_PFC (1 << 1)
#define EN_LPI_TX_PAUSE (1 << 2)
#define EEE_EN (1 << 3)
#define RX_FIFO_CHECK (1 << 4)
#define EEE_TX_CLK_DIS (1 << 5)
#define DIS_EEE_10M (1 << 6)
#define LP_IDLE_PREDICTION_MODE (1 << 7)
#define UMAC_EEE_LPI_TIMER 0x068
#define UMAC_EEE_WAKE_TIMER 0x06C
#define UMAC_EEE_REF_COUNT 0x070
#define EEE_REFERENCE_COUNT_MASK 0xffff
#define UMAC_RX_IPG_INV 0x078
#define UMAC_MACSEC_PROG_TX_CRC 0x310
#define UMAC_MACSEC_CTRL 0x314
#define UMAC_PAUSE_CTRL 0x330
#define UMAC_TX_FLUSH 0x334
#define UMAC_RX_FIFO_STATUS 0x338
#define UMAC_TX_FIFO_STATUS 0x33c
#endif

60
target/linux/bcm4908/patches-5.4/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch
View File

@ -1,60 +0,0 @@
From 2f8913a7b17efd3a116825160a2d3a6610444587 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 12 Nov 2020 16:08:31 +0100
Subject: [PATCH] dt-bindings: arm: bcm: document BCM4908 bindings
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 is a new family that includes BCM4906, BCM4908 and BCM49408.
It's mostly used in home routers and often replaces Northstar in vendors
portfolio.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bindings/arm/bcm/brcm,bcm4908.yaml | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM4908 device tree bindings
+
+description:
+ Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs.
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: BCM4906 based boards
+ items:
+ - const: brcm,bcm4906
+ - const: brcm,bcm4908
+
+ - description: BCM4908 based boards
+ items:
+ - enum:
+ - asus,gt-ac5300
+ - const: brcm,bcm4908
+
+ - description: BCM49408 based boards
+ items:
+ - const: brcm,bcm49408
+ - const: brcm,bcm4908
+
+additionalProperties: true
+
+...

307
target/linux/bcm4908/patches-5.4/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch
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@ -1,307 +0,0 @@
From 2961f69f151c0a6771f55cef46398fe49ca20902 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 12 Nov 2020 16:08:32 +0100
Subject: [PATCH] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early
DTS files
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
They don't descibe hardware fully yet but it's enough to boot a system.
Some missing blocks:
1. PMC (Power Management Controller?)
2. Ethernet
3. Crypto
4. Thermal
Asus DTS is missing defining full NAND partitions layout and buttons.
Further changes will fill those gaps as soon as required bindings will
be found / tested / added.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 2 +
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 66 +++++++
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 187 ++++++++++++++++++
4 files changed, 256 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -4,5 +4,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp
bcm2837-rpi-3-b-plus.dtb \
bcm2837-rpi-cm3-io3.dtb
+subdir-y += bcm4908
subdir-y += northstar2
subdir-y += stingray
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "bcm4908.dtsi"
+
+/ {
+ compatible = "asus,gt-ac5300", "brcm,bcm4908";
+ model = "Asus GT-AC5300";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x40000000>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ wifi {
+ label = "WiFi";
+ linux,code = <KEY_RFKILL>;
+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "WPS";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ };
+
+ restart {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+ };
+
+ brightness {
+ label = "LEDs";
+ linux,code = <KEY_BRIGHTNESS_ZERO>;
+ gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&nandcs {
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+ brcm,nand-has-wp;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "cferom";
+ reg = <0x0 0x100000>;
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x0>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x81000000 0x4000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ clocks {
+ periph_clk: periph_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x80000000 0x10000>;
+
+ usb@c300 {
+ compatible = "generic-ehci";
+ reg = <0xc300 0x100>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb@c400 {
+ compatible = "generic-ohci";
+ reg = <0xc400 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb@d000 {
+ compatible = "generic-xhci";
+ reg = <0xd000 0x8c8>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0xff800000 0x3000>;
+
+ timer: timer@400 {
+ compatible = "brcm,bcm6328-timer", "syscon";
+ reg = <0x400 0x3c>;
+ };
+
+ gpio0: gpio-controller@500 {
+ compatible = "brcm,bcm6345-gpio";
+ reg-names = "dirout", "dat";
+ reg = <0x500 0x28>, <0x528 0x28>;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "periph";
+ status = "okay";
+ };
+
+ nand@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "nand";
+ status = "okay";
+
+ nandcs: nandcs@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ };
+ };
+
+ reboot {
+ compatible = "syscon-reboot";
+ regmap = <&timer>;
+ offset = <0x34>;
+ mask = <1>;
+ };
+ };
+};

44
target/linux/bcm4908/patches-5.4/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch
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@ -1,44 +0,0 @@
From dccb22d078ebd098115e4f66bde1ee2249c8640b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 12 Nov 2020 16:08:30 +0100
Subject: [PATCH] arm64: add config for Broadcom BCM4908 SoCs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add ARCH_BCM4908 config that can be used for compiling DTS files.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/Kconfig.platforms | 8 ++++++++
arch/arm64/configs/defconfig | 1 +
2 files changed, 9 insertions(+)
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -43,6 +43,14 @@ config ARCH_BCM2835
This enables support for the Broadcom BCM2837 SoC.
This SoC is used in the Raspberry Pi 3 device.
+config ARCH_BCM4908
+ bool "Broadcom BCM4908 family"
+ select GPIOLIB
+ help
+ This enables support for the Broadcom BCM4906, BCM4908 and
+ BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be
+ found in home routers.
+
config ARCH_BCM_IPROC
bool "Broadcom iProc SoC Family"
select COMMON_CLK_IPROC
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -33,6 +33,7 @@ CONFIG_ARCH_AGILEX=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_BCM2835=y
+CONFIG_ARCH_BCM4908=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BERLIN=y
CONFIG_ARCH_BRCMSTB=y

28
target/linux/bcm4908/patches-5.4/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch
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@ -1,28 +0,0 @@
From 3a5da4f54801ac42837a0b3151fa8285e01e8b0e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 8 Dec 2020 08:03:03 +0100
Subject: [PATCH] dt-bindings: arm: bcm: document Netgear R8000P binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a BCM4906 based device.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 2 ++
1 file changed, 2 insertions(+)
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
@@ -19,6 +19,8 @@ properties:
oneOf:
- description: BCM4906 based boards
items:
+ - enum:
+ - netgear,r8000p
- const: brcm,bcm4906
- const: brcm,bcm4908

104
target/linux/bcm4908/patches-5.4/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch
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@ -1,104 +0,0 @@
From c8b404fb05dcfadff477e49b7ea6b500e015f101 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 8 Dec 2020 08:03:04 +0100
Subject: [PATCH 2/4] arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P
DTS files
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Netgear R8000P is home router based on BCM4906 that is a cheaper variant
of BCM4908 (e.g. 2 cores instead of 4).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 +
.../bcm4908/bcm4906-netgear-r8000p.dts | 52 +++++++++++++++++++
.../boot/dts/broadcom/bcm4908/bcm4906.dtsi | 18 +++++++
3 files changed, 71 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+#include "bcm4906.dtsi"
+
+/ {
+ compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908";
+ model = "Netgear R8000P";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x20000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wps {
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&nandcs {
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "cferom";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "firmware";
+ reg = <0x100000 0x4400000>;
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "bcm4908.dtsi"
+
+/ {
+ cpus {
+ /delete-node/ cpu@2;
+
+ /delete-node/ cpu@3;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+};

32
target/linux/bcm4908/patches-5.4/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch
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@ -1,32 +0,0 @@
From 56098be85d19cd56b59d7b3854ea035cc8cb9e95 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 8 Dec 2020 11:49:50 +0100
Subject: [PATCH 3/4] arm64: dts: broadcom: bcm4908: use proper NAND binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has controller that needs different IRQ handling just like the
BCM63138. Describe it properly.
On Linux this change fixes:
brcmstb_nand ff801800.nand: timeout waiting for command 0x9
brcmstb_nand ff801800.nand: intfc status d0000000
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -164,7 +164,7 @@
nand@1800 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
reg = <0x1800 0x600>, <0x2000 0x10>;
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

41
target/linux/bcm4908/patches-5.4/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch
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@ -1,41 +0,0 @@
From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 10 Dec 2020 08:21:54 +0100
Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset
controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This reset controller is a single register in the Broadcom's MISC block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -177,6 +177,21 @@
};
};
+ misc@2600 {
+ compatible = "brcm,misc", "simple-mfd";
+ reg = <0x2600 0xe4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x2600 0xe4>;
+
+ reset-controller@2644 {
+ compatible = "brcm,bcm4908-misc-pcie-reset";
+ reg = <0x44 0x04>;
+ #reset-cells = <1>;
+ };
+ };
+
reboot {
compatible = "syscon-reboot";
regmap = <&timer>;

184
target/linux/bcm4908/patches-5.4/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch
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@ -1,184 +0,0 @@
From 527a3ac9bdf81da4b7160ce3cea57f28a0e5eb64 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 13 Jan 2021 12:14:06 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always
connected to the internal PHYs. Remaining ports depend on device setup.
Asus GT-AC5300 has an extra switch with its PHYs accessible using the
internal MDIO.
CPU port and Ethernet interface remain to be documented.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 51 +++++++++++
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 85 ++++++++++++++++++-
2 files changed, 135 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -44,6 +44,57 @@
};
};
+&ports {
+ port@0 {
+ label = "lan2";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan6";
+ };
+
+ port@3 {
+ label = "lan5";
+ };
+
+ /* External BCM53134S switch */
+ port@7 {
+ label = "sw";
+ reg = <7>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+};
+
+&mdio {
+ /* lan8 */
+ ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ /* lan7 */
+ ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ /* lan4 */
+ ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ /* lan3 */
+ ethernet-phy@3 {
+ reg = <3>;
+ };
+};
+
&nandcs {
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -108,7 +108,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00 0x00 0x80000000 0x10000>;
+ ranges = <0x00 0x00 0x80000000 0xd0000>;
usb@c300 {
compatible = "generic-ehci";
@@ -130,6 +130,89 @@
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+ ethernet-switch@80000 {
+ compatible = "simple-bus";
+ #size-cells = <1>;
+ #address-cells = <1>;
+ ranges = <0 0x80000 0x50000>;
+
+ ethernet-switch@0 {
+ compatible = "brcm,bcm4908-switch";
+ reg = <0x0 0x40000>,
+ <0x40000 0x110>,
+ <0x40340 0x30>,
+ <0x40380 0x30>,
+ <0x40600 0x34>,
+ <0x40800 0x208>;
+ reg-names = "core", "reg", "intrl2_0",
+ "intrl2_1", "fcb", "acb";
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ brcm,num-gphy = <5>;
+ brcm,num-rgmii-ports = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ phy-mode = "internal";
+ phy-handle = <&phy8>;
+ };
+
+ port@1 {
+ reg = <1>;
+ phy-mode = "internal";
+ phy-handle = <&phy9>;
+ };
+
+ port@2 {
+ reg = <2>;
+ phy-mode = "internal";
+ phy-handle = <&phy10>;
+ };
+
+ port@3 {
+ reg = <3>;
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ };
+ };
+
+ mdio: mdio@405c0 {
+ compatible = "brcm,unimac-mdio";
+ reg = <0x405c0 0x8>;
+ reg-names = "mdio";
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ phy8: ethernet-phy@8 {
+ reg = <8>;
+ };
+
+ phy9: ethernet-phy@9 {
+ reg = <9>;
+ };
+
+ phy10: ethernet-phy@a {
+ reg = <10>;
+ };
+
+ phy11: ethernet-phy@b {
+ reg = <11>;
+ };
+
+ phy12: ethernet-phy@c {
+ reg = <12>;
+ };
+ };
+ };
};
bus@ff800000 {

50
target/linux/bcm4908/patches-5.4/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch
View File

@ -1,50 +0,0 @@
From edcf90801c8e58bd6306d85a4e714a6f09f452df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 13 Jan 2021 12:15:47 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe PMB block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
PMB (Power Management Bus) controls powering connected devices (e.g.
PCIe, USB, SATA). In BCM4908 it's a part of the PROCMON block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -108,7 +108,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00 0x00 0x80000000 0xd0000>;
+ ranges = <0x00 0x00 0x80000000 0x281000>;
usb@c300 {
compatible = "generic-ehci";
@@ -213,6 +213,21 @@
};
};
};
+
+ procmon: syscon@280000 {
+ compatible = "simple-bus";
+ reg = <0x280000 0x1000>;
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ power-controller@2800c0 {
+ compatible = "brcm,bcm4908-pmb";
+ reg = <0x2800c0 0x40>;
+ #power-domain-cells = <1>;
+ };
+ };
};
bus@ff800000 {

134
target/linux/bcm4908/patches-5.4/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch
View File

@ -1,134 +0,0 @@
From 3c321ba794ca6383a4aa68ea803e18cc6ad44412 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 19 Feb 2021 06:50:26 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI
and XHCI. It requires powering up using the PMB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 25 ++++++++++++++++---
3 files changed, 55 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -26,6 +26,23 @@
};
};
+&usb_phy {
+ brcm,ioc = <1>;
+ status = "okay";
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
&nandcs {
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -44,6 +44,23 @@
};
};
+&usb_phy {
+ brcm,ioc = <1>;
+ status = "okay";
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
&ports {
port@0 {
label = "lan2";
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -2,6 +2,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/soc/bcm-pmb.h>
/dts-v1/;
@@ -110,24 +112,39 @@
#size-cells = <1>;
ranges = <0x00 0x00 0x80000000 0x281000>;
- usb@c300 {
+ usb_phy: usb-phy@c200 {
+ compatible = "brcm,bcm4908-usb-phy";
+ reg = <0xc200 0x100>;
+ reg-names = "ctrl";
+ power-domains = <&pmb BCM_PMB_HOST_USB>;
+ dr_mode = "host";
+ brcm,has-xhci;
+ brcm,has-eohci;
+ #phy-cells = <1>;
+ status = "disabled";
+ };
+
+ ehci: usb@c300 {
compatible = "generic-ehci";
reg = <0xc300 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
};
- usb@c400 {
+ ohci: usb@c400 {
compatible = "generic-ohci";
reg = <0xc400 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
};
- usb@d000 {
+ xhci: usb@d000 {
compatible = "generic-xhci";
reg = <0xd000 0x8c8>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb_phy PHY_TYPE_USB3>;
status = "disabled";
};
@@ -222,7 +239,7 @@
#address-cells = <1>;
#size-cells = <1>;
- power-controller@2800c0 {
+ pmb: power-controller@2800c0 {
compatible = "brcm,bcm4908-pmb";
reg = <0x2800c0 0x40>;
#power-domain-cells = <1>;

51
target/linux/bcm4908/patches-5.4/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch
View File

@ -1,51 +0,0 @@
From b1bbe48eec190b6a35f400c5a3ec6b0fc8fc3fe6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 19 Feb 2021 06:50:27 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Ethernet controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 SoCs have an integrated Ethernet controller.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -112,6 +112,14 @@
#size-cells = <1>;
ranges = <0x00 0x00 0x80000000 0x281000>;
+ enet: ethernet@2000 {
+ compatible = "brcm,bcm4908-enet";
+ reg = <0x2000 0x1000>;
+
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rx";
+ };
+
usb_phy: usb-phy@c200 {
compatible = "brcm,bcm4908-usb-phy";
reg = <0xc200 0x100>;
@@ -199,6 +207,17 @@
phy-mode = "internal";
phy-handle = <&phy11>;
};
+
+ port@8 {
+ reg = <8>;
+ phy-mode = "internal";
+ ethernet = <&enet>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
};

50
target/linux/bcm4908/patches-5.4/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch
View File

@ -1,50 +0,0 @@
From 406e98afffe975982f63ea5d21bf9a47a81b56ee Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 19 Feb 2021 06:50:28 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
R8000P model has 4 LAN ports and 1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -43,6 +43,31 @@
status = "okay";
};
+&ports {
+ port@0 {
+ label = "lan4";
+ };
+
+ port@1 {
+ label = "lan3";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan1";
+ };
+
+ port@7 {
+ reg = <7>;
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ label = "wan";
+ };
+};
+
&nandcs {
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;

81
target/linux/bcm4908/patches-5.4/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch
View File

@ -1,81 +0,0 @@
From 6224415c0389ba6661825746312163a64ece8f3a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 19 Feb 2021 06:50:29 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P
LEDs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There are a few more GPIO connected LEDs there didn't get described
initially.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 50 ++++++++++++++++++-
1 file changed, 49 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -18,11 +18,59 @@
leds {
compatible = "gpio-leds";
- wps {
+ led-power-white {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+ };
+
+ led-power-amber {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+ };
+
+ led-wps {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
+
+ led-2ghz {
+ function = "2ghz";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led-5ghz-1 {
+ function = "5ghz-1";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led-5ghz-2 {
+ function = "5ghz-2";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ };
+
+ led-usb2 {
+ function = "usb2";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+
+ led-usb3 {
+ function = "usb3";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ };
+
+ led-wifi {
+ function = "wifi";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 56 GPIO_ACTIVE_LOW>;
+ };
};
};

55
target/linux/bcm4908/patches-5.4/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch
View File

@ -1,55 +0,0 @@
From cbaca2c467dc25a163107e14a53b7925214eab17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 19 Feb 2021 06:50:30 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe firmware partitions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 bootloader supports multiple firmware partitions and has its own
bindings defined for them.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 1 +
.../dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 12 +++++++++++-
2 files changed, 12 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -135,6 +135,7 @@
};
partition@100000 {
+ compatible = "brcm,bcm4908-firmware";
label = "firmware";
reg = <0x100000 0x4400000>;
};
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -122,7 +122,7 @@
#size-cells = <0>;
partitions {
- compatible = "fixed-partitions";
+ compatible = "brcm,bcm4908-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -130,5 +130,15 @@
label = "cferom";
reg = <0x0 0x100000>;
};
+
+ partition@100000 {
+ compatible = "brcm,bcm4908-firmware";
+ reg = <0x100000 0x5700000>;
+ };
+
+ partition@5800000 {
+ compatible = "brcm,bcm4908-firmware";
+ reg = <0x5800000 0x5700000>;
+ };
};
};

30
target/linux/bcm4908/patches-5.4/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch
View File

@ -1,30 +0,0 @@
From a348ff97ffb840b9d74b0e64b3e0e6002187d224 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 9 Mar 2021 19:44:09 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: fix switch parent node name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Ethernet switch and MDIO are grouped using "simple-bus". It's not
allowed to use "ethernet-switch" node name as it isn't a switch. Replace
it with "bus".
Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -156,7 +156,7 @@
status = "disabled";
};
- ethernet-switch@80000 {
+ bus@80000 {
compatible = "simple-bus";
#size-cells = <1>;
#address-cells = <1>;

27
target/linux/bcm4908/patches-5.4/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch
View File

@ -1,27 +0,0 @@
From b3de2a12d1a61d90a4d86c9840acc7d05066137f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 10 Mar 2021 08:46:02 +0100
Subject: [PATCH] dt-bindings: arm: bcm: document TP-Link Archer C2300 binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
One more BCM4906 based device.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 +
1 file changed, 1 insertion(+)
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
@@ -21,6 +21,7 @@ properties:
items:
- enum:
- netgear,r8000p
+ - tplink,archer-c2300-v1
- const: brcm,bcm4906
- const: brcm,bcm4908

212
target/linux/bcm4908/patches-5.4/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch
View File

@ -1,212 +0,0 @@
From 6a30934a5470a0ce7ea32b0c6b600accfae94b1a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 10 Mar 2021 08:46:03 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It
has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports,
1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 +
.../bcm4906-tplink-archer-c2300-v1.dts | 182 ++++++++++++++++++
2 files changed, 183 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
+dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+#include "bcm4906.dtsi"
+
+/ {
+ compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908";
+ model = "TP-Link Archer C2300 V1";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x20000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-power {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ led-2ghz {
+ function = "2ghz";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ led-5ghz {
+ function = "5ghz";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ led-wan-amber {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-wan-blue {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+ };
+
+ led-lan {
+ function = LED_FUNCTION_LAN;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ };
+
+ led-wps {
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led-usb2 {
+ function = "usb2";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led-usb3 {
+ function = "usbd3";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+
+ led-brightness {
+ function = LED_FUNCTION_BACKLIGHT;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ brightness {
+ label = "LEDs";
+ linux,code = <KEY_BRIGHTNESS_ZERO>;
+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "WPS";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi {
+ label = "WiFi";
+ linux,code = <KEY_RFKILL>;
+ gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+ };
+
+ restart {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&usb_phy {
+ brcm,ioc = <1>;
+ status = "okay";
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
+&ports {
+ port@0 {
+ label = "lan4";
+ };
+
+ port@1 {
+ label = "lan3";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan1";
+ };
+
+ port@7 {
+ reg = <7>;
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ label = "wan";
+ };
+};
+
+&nandcs {
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ partitions {
+ compatible = "brcm,bcm4908-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "cferom";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ compatible = "brcm,bcm4908-firmware";
+ reg = <0x100000 0x3900000>;
+ };
+
+ partition@5800000 {
+ compatible = "brcm,bcm4908-firmware";
+ reg = <0x3a00000 0x3900000>;
+ };
+ };
+};

28
target/linux/bcm4908/patches-5.4/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch
View File

@ -1,28 +0,0 @@
From 5ccb9f9cf05bbd729430c6d6d30d40c96a15c56a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Mar 2021 12:01:20 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY
mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Port 7 is connected to the external BCM53134S switch using RGMII.
Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -82,6 +82,7 @@
port@7 {
label = "sw";
reg = <7>;
+ phy-mode = "rgmii";
fixed-link {
speed = <1000>;

30
target/linux/bcm4908/patches-5.4/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch
View File

@ -1,30 +0,0 @@
From 5337af7918bedde9713cd223ce5df74b3d6c7d7a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 17 Mar 2021 09:16:31 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet TX irq
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This hardware supports two interrupts, one per DMA channel (RX and TX).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -116,8 +116,9 @@
compatible = "brcm,bcm4908-enet";
reg = <0x2000 0x1000>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "rx";
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rx", "tx";
};
usb_phy: usb-phy@c200 {

82
target/linux/bcm4908/patches-5.4/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch
View File

@ -1,82 +0,0 @@
From 9f01f5cdb548352418b34ce77db02a560fe2913b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 29 Mar 2021 17:45:14 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet MAC addr
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
On most BCM4908 devices MAC address can be read from the bootloader
binary section containing device settings. Use NVMEM to describe that.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 14 ++++++++++++++
.../broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 14 ++++++++++++++
2 files changed, 28 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@@ -74,6 +74,11 @@
};
};
+&enet {
+ nvmem-cells = <&base_mac_addr>;
+ nvmem-cell-names = "mac-address";
+};
+
&usb_phy {
brcm,ioc = <1>;
status = "okay";
@@ -130,8 +135,17 @@
#size-cells = <1>;
partition@0 {
+ compatible = "nvmem-cells";
label = "cferom";
reg = <0x0 0x100000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x100000>;
+
+ base_mac_addr: mac@106a0 {
+ reg = <0x106a0 0x6>;
+ };
};
partition@100000 {
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -44,6 +44,11 @@
};
};
+&enet {
+ nvmem-cells = <&base_mac_addr>;
+ nvmem-cell-names = "mac-address";
+};
+
&usb_phy {
brcm,ioc = <1>;
status = "okay";
@@ -128,8 +133,17 @@
#size-cells = <1>;
partition@0 {
+ compatible = "nvmem-cells";
label = "cferom";
reg = <0x0 0x100000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x100000>;
+
+ base_mac_addr: mac@106a0 {
+ reg = <0x106a0 0x6>;
+ };
};
partition@100000 {

25
target/linux/bcm4908/patches-5.4/033-v5.14-0001-ARM-dts-BCM5301X-Fix-NAND-nodes-names.patch
View File

@ -1,25 +0,0 @@
From b660269cba748dfd07eb5551a88ff34d5ea0b86e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 16 Apr 2021 15:37:48 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix NAND nodes names
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This matches nand-controller.yaml requirements.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -306,7 +306,7 @@
interrupt-names = "nand";
status = "okay";
- nandcs: nandcs@0 {
+ nandcs: nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
};

27
target/linux/bcm4908/patches-5.4/034-v5.16-0001-arm64-dts-broadcom-bcm4908-Fix-NAND-node-name.patch
View File

@ -1,27 +0,0 @@
From d0ae9c944b9472c5691a482297df7a57d7fd1199 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 14:11:08 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix NAND node name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This matches nand-controller.yaml requirements.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -296,7 +296,7 @@
status = "okay";
};
- nand@1800 {
+ nand-controller@1800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";

38
target/linux/bcm4908/patches-5.4/034-v5.16-0002-arm64-dts-broadcom-bcm4908-Move-reboot-syscon-out-of.patch
View File

@ -1,38 +0,0 @@
From 6cf9f70255b90b540b9cbde062f18fea29024a75 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 14:26:06 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: Move reboot syscon out of bus
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes following error for every bcm4908 DTS file:
bus@ff800000: reboot: {'type': 'object'} is not allowed for {'compatible': ['syscon-reboot'], 'regmap': [[15]], 'offset': [[52]], 'mask': [[1]]}
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -326,12 +326,12 @@
#reset-cells = <1>;
};
};
+ };
- reboot {
- compatible = "syscon-reboot";
- regmap = <&timer>;
- offset = <0x34>;
- mask = <1>;
- };
+ reboot {
+ compatible = "syscon-reboot";
+ regmap = <&timer>;
+ offset = <0x34>;
+ mask = <1>;
};
};

28
target/linux/bcm4908/patches-5.4/034-v5.16-0003-arm64-dts-broadcom-bcm4908-Fix-UART-clock-name.patch
View File

@ -1,28 +0,0 @@
From 6c38c39ab2141f53786d73e706675e8819a3f2cb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 17:37:02 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix UART clock name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
According to the binding the correct clock name is "refclk".
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -292,7 +292,7 @@
reg = <0x640 0x18>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&periph_clk>;
- clock-names = "periph";
+ clock-names = "refclk";
status = "okay";
};

27
target/linux/bcm4908/patches-5.4/035-v5.17-0001-dt-bindings-arm-bcm-document-Netgear-RAXE500-binding.patch
View File

@ -1,27 +0,0 @@
From 7b0c9ca7f18e8d2e2cf3c342d91f037d436777bf Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Nov 2021 11:14:12 +0100
Subject: [PATCH] dt-bindings: arm: bcm: document Netgear RAXE500 binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
One more BCM4908 based device.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 +
1 file changed, 1 insertion(+)
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
@@ -29,6 +29,7 @@ properties:
items:
- enum:
- asus,gt-ac5300
+ - netgear,raxe500
- const: brcm,bcm4908
- description: BCM49408 based boards

81
target/linux/bcm4908/patches-5.4/035-v5.17-0002-arm64-dts-broadcom-bcm4908-add-DT-for-Netgear-RAXE50.patch
View File

@ -1,81 +0,0 @@
From d0e68d354f345873e15876a7b35be1baaf5e3ec9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Nov 2021 11:14:13 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a home router based on BCM4908 SoC. It has: 1 GiB of RAM, 512 MiB
NAND flash, 6 Ethernet ports and 3 x BCM43684 (WiFi). One of Ethernet
ports is "2.5 G Multi-Gig port" that isn't described yet (it isn't known
how it's wired up).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 +
.../bcm4908/bcm4908-netgear-raxe500.dts | 50 +++++++++++++++++++
2 files changed, 51 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
@@ -2,3 +2,4 @@
dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "bcm4908.dtsi"
+
+/ {
+ compatible = "netgear,raxe500", "brcm,bcm4908";
+ model = "Netgear RAXE500";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x40000000>;
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
+&ports {
+ port@0 {
+ label = "lan4";
+ };
+
+ port@1 {
+ label = "lan3";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan1";
+ };
+
+ port@7 {
+ reg = <7>;
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ label = "wan";
+ };
+};

47
target/linux/bcm4908/patches-5.4/036-v5.18-0001-arm64-dts-broadcom-bcm4908-use-proper-TWD-binding.patch
View File

@ -1,47 +0,0 @@
From 33826e9c6ba76b265d4e26cb95493fa27ed78974 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 29 Dec 2021 11:23:14 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: use proper TWD binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Block at <ff800400 0x4c> is a TWD that contains timers, watchdog and
reset. Actual timers happen to be at block beginning but they only span
across the first 0x28 registers. It means the old block description was
incorrect (size 0x3c).
Drop timers binding for now and use documented TWD binding. Timers
should be properly documented and defined as TWD subnode.
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -273,9 +273,9 @@
#size-cells = <1>;
ranges = <0x00 0x00 0xff800000 0x3000>;
- timer: timer@400 {
- compatible = "brcm,bcm6328-timer", "syscon";
- reg = <0x400 0x3c>;
+ twd: timer-mfd@400 {
+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
+ reg = <0x400 0x4c>;
};
gpio0: gpio-controller@500 {
@@ -330,7 +330,7 @@
reboot {
compatible = "syscon-reboot";
- regmap = <&timer>;
+ regmap = <&twd>;
offset = <0x34>;
mask = <1>;
};

160
target/linux/bcm4908/patches-5.4/036-v5.18-0002-arm64-dts-broadcom-bcm4908-add-pinctrl-binding.patch
View File

@ -1,160 +0,0 @@
From 72b1c5da796ec5266f2012c36470e226cb4f09c9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 30 Dec 2021 12:05:35 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add pinctrl binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Describe pinmux block with its maps.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 135 ++++++++++++++++++
1 file changed, 135 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -287,6 +287,141 @@
gpio-controller;
};
+ pinctrl@560 {
+ compatible = "brcm,bcm4908-pinctrl";
+ reg = <0x560 0x10>;
+
+ pins_led_0_a: led_0-a-pins {
+ function = "led_0";
+ groups = "led_0_grp_a";
+ };
+
+ pins_led_1_a: led_1-a-pins {
+ function = "led_1";
+ groups = "led_1_grp_a";
+ };
+
+ pins_led_2_a: led_2-a-pins {
+ function = "led_2";
+ groups = "led_2_grp_a";
+ };
+
+ pins_led_3_a: led_3-a-pins {
+ function = "led_3";
+ groups = "led_3_grp_a";
+ };
+
+ pins_led_4_a: led_4-a-pins {
+ function = "led_4";
+ groups = "led_4_grp_a";
+ };
+
+ pins_led_5_a: led_5-a-pins {
+ function = "led_5";
+ groups = "led_5_grp_a";
+ };
+
+ pins_led_6_a: led_6-a-pins {
+ function = "led_6";
+ groups = "led_6_grp_a";
+ };
+
+ pins_led_7_a: led_7-a-pins {
+ function = "led_7";
+ groups = "led_7_grp_a";
+ };
+
+ pins_led_8_a: led_8-a-pins {
+ function = "led_8";
+ groups = "led_8_grp_a";
+ };
+
+ pins_led_9_a: led_9-a-pins {
+ function = "led_9";
+ groups = "led_9_grp_a";
+ };
+
+ pins_led_21_a: led_21-a-pins {
+ function = "led_21";
+ groups = "led_21_grp_a";
+ };
+
+ pins_led_22_a: led_22-a-pins {
+ function = "led_22";
+ groups = "led_22_grp_a";
+ };
+
+ pins_led_26_a: led_26-a-pins {
+ function = "led_26";
+ groups = "led_26_grp_a";
+ };
+
+ pins_led_27_a: led_27-a-pins {
+ function = "led_27";
+ groups = "led_27_grp_a";
+ };
+
+ pins_led_28_a: led_28-a-pins {
+ function = "led_28";
+ groups = "led_28_grp_a";
+ };
+
+ pins_led_29_a: led_29-a-pins {
+ function = "led_29";
+ groups = "led_29_grp_a";
+ };
+
+ pins_led_30_a: led_30-a-pins {
+ function = "led_30";
+ groups = "led_30_grp_a";
+ };
+
+ pins_hs_uart: hs_uart-pins {
+ function = "hs_uart";
+ groups = "hs_uart_grp";
+ };
+
+ pins_i2c_a: i2c-a-pins {
+ function = "i2c";
+ groups = "i2c_grp_a";
+ };
+
+ pins_i2c_b: i2c-b-pins {
+ function = "i2c";
+ groups = "i2c_grp_b";
+ };
+
+ pins_i2s: i2s-pins {
+ function = "i2s";
+ groups = "i2s_grp";
+ };
+
+ pins_nand_ctrl: nand_ctrl-pins {
+ function = "nand_ctrl";
+ groups = "nand_ctrl_grp";
+ };
+
+ pins_nand_data: nand_data-pins {
+ function = "nand_data";
+ groups = "nand_data_grp";
+ };
+
+ pins_emmc_ctrl: emmc_ctrl-pins {
+ function = "emmc_ctrl";
+ groups = "emmc_ctrl_grp";
+ };
+
+ pins_usb0_pwr: usb0_pwr-pins {
+ function = "usb0_pwr";
+ groups = "usb0_pwr_grp";
+ };
+
+ pins_usb1_pwr: usb1_pwr-pins {
+ function = "usb1_pwr";
+ groups = "usb1_pwr_grp";
+ };
+ };
+
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";
reg = <0x640 0x18>;

35
target/linux/bcm4908/patches-5.4/036-v5.18-0003-arm64-dts-broadcom-bcm4908-add-watchdog-block.patch
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@ -1,35 +0,0 @@
From 47513f6dd93b5b7d91143219c2c1fb883664ed13 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 9 Feb 2022 21:14:17 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add watchdog block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has the same watchdog as BCM63xx devices. Use "brcm,bcm6345-wdt"
binding which matches the first SoC with that block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -276,6 +276,15 @@
twd: timer-mfd@400 {
compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
reg = <0x400 0x4c>;
+ ranges = <0x0 0x400 0x4c>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ watchdog@28 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x28 0x8>;
+ };
};
gpio0: gpio-controller@500 {

34
target/linux/bcm4908/patches-5.4/036-v5.18-0004-arm64-dts-broadcom-bcm4908-add-I2C-block.patch
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@ -1,34 +0,0 @@
From ba5dfa2fd8d0aed4e4b6f650ba9e8ea7cdd6ead1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 15 Feb 2022 07:36:39 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add I2C block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -456,6 +456,15 @@
};
};
+ i2c@2100 {
+ compatible = "brcm,brcmper-i2c";
+ reg = <0x2100 0x58>;
+ clock-frequency = <97500>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c_a>;
+ status = "disabled";
+ };
+
misc@2600 {
compatible = "brcm,misc", "simple-mfd";
reg = <0x2600 0xe4>;

50
target/linux/bcm4908/patches-5.4/070-v5.10-0001-net-dsa-b53-Use-dev_-err-info-instead-of-pr_.patch
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@ -1,50 +0,0 @@
From 3b33438c52def0de4a5577ad541e50923bcc2596 Mon Sep 17 00:00:00 2001
From: Paul Barker <pbarker@konsulko.com>
Date: Thu, 3 Sep 2020 12:26:20 +0100
Subject: [PATCH] net: dsa: b53: Use dev_{err,info} instead of pr_*
This change allows us to see which device the err or info messages are
referring to if we have multiple b53 compatible devices on a board.
As this removes the only pr_*() calls in this file we can drop the
definition of pr_fmt().
Signed-off-by: Paul Barker <pbarker@konsulko.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/b53/b53_common.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
@@ -17,8 +17,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/gpio.h>
@@ -2475,8 +2473,9 @@ int b53_switch_detect(struct b53_device
dev->chip_id = id32;
break;
default:
- pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
- id8, id32);
+ dev_err(dev->dev,
+ "unsupported switch detected (BCM53%02x/BCM%x)\n",
+ id8, id32);
return -ENODEV;
}
}
@@ -2506,7 +2505,8 @@ int b53_switch_register(struct b53_devic
if (ret)
return ret;
- pr_info("found switch: %s, rev %i\n", dev->name, dev->core_rev);
+ dev_info(dev->dev, "found switch: %s, rev %i\n",
+ dev->name, dev->core_rev);
return dsa_register_switch(dev->ds);
}

30
target/linux/bcm4908/patches-5.4/070-v5.10-0002-net-dsa-b53-Print-err-message-on-SW_RST-timeout.patch
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@ -1,30 +0,0 @@
From 434d2312cd8057aa6972f2b39aa0b359d02af9f4 Mon Sep 17 00:00:00 2001
From: Paul Barker <pbarker@konsulko.com>
Date: Thu, 3 Sep 2020 12:26:21 +0100
Subject: [PATCH] net: dsa: b53: Print err message on SW_RST timeout
This allows us to differentiate between the possible failure modes of
b53_switch_reset() by looking at the dmesg output.
Signed-off-by: Paul Barker <pbarker@konsulko.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/b53/b53_common.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
@@ -755,8 +755,11 @@ static int b53_switch_reset(struct b53_d
usleep_range(1000, 2000);
} while (timeout-- > 0);
- if (timeout == 0)
+ if (timeout == 0) {
+ dev_err(dev->dev,
+ "Timeout waiting for SW_RST to clear!\n");
return -ETIMEDOUT;
+ }
}
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);

131
target/linux/bcm4908/patches-5.4/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch
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@ -1,131 +0,0 @@
From 73b7a6047971aa6ce4a70fc4901964d14f077171 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 6 Jan 2021 22:32:02 +0100
Subject: [PATCH] net: dsa: bcm_sf2: support BCM4908's integrated switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 family SoCs come with integrated Starfighter 2 switch. Its
registers layout it a mix of BCM7278 and BCM7445. It has 5 integrated
PHYs and 8 ports. It also supports RGMII and SerDes.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210106213202.17459-3-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/b53/b53_common.c | 14 +++++++++++++
drivers/net/dsa/b53/b53_priv.h | 1 +
drivers/net/dsa/bcm_sf2.c | 36 +++++++++++++++++++++++++++++---
drivers/net/dsa/bcm_sf2_regs.h | 1 +
4 files changed, 49 insertions(+), 3 deletions(-)
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
@@ -2271,6 +2271,22 @@ static const struct b53_chip_data b53_sw
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
+ /* Starfighter 2 */
+ {
+ .chip_id = BCM4908_DEVICE_ID,
+ .dev_name = "BCM4908",
+ .vlans = 4096,
+ .enabled_ports = 0x1bf,
+#if 0
+ .arl_bins = 4,
+ .arl_buckets = 256,
+#endif
+ .cpu_port = 8, /* TODO: ports 4, 5, 8 */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ },
{
.chip_id = BCM7445_DEVICE_ID,
.dev_name = "BCM7445",
--- a/drivers/net/dsa/b53/b53_priv.h
+++ b/drivers/net/dsa/b53/b53_priv.h
@@ -64,6 +64,7 @@ struct b53_io_ops {
#define B53_INVALID_LANE 0xff
enum {
+ BCM4908_DEVICE_ID = 0x4908,
BCM5325_DEVICE_ID = 0x25,
BCM5365_DEVICE_ID = 0x65,
BCM5389_DEVICE_ID = 0x89,
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -61,7 +61,8 @@ static void bcm_sf2_imp_setup(struct dsa
b53_brcm_hdr_setup(ds, port);
if (port == 8) {
- if (priv->type == BCM7445_DEVICE_ID)
+ if (priv->type == BCM4908_DEVICE_ID ||
+ priv->type == BCM7445_DEVICE_ID)
offset = CORE_STS_OVERRIDE_IMP;
else
offset = CORE_STS_OVERRIDE_IMP2;
@@ -543,7 +544,8 @@ static void bcm_sf2_sw_mac_config(struct
if (port == core_readl(priv, CORE_IMP0_PRT_ID))
return;
- if (priv->type == BCM7445_DEVICE_ID)
+ if (priv->type == BCM4908_DEVICE_ID ||
+ priv->type == BCM7445_DEVICE_ID)
offset = CORE_STS_OVERRIDE_GMIIP_PORT(port);
else
offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port);
@@ -985,6 +987,30 @@ struct bcm_sf2_of_data {
unsigned int num_cfp_rules;
};
+static const u16 bcm_sf2_4908_reg_offsets[] = {
+ [REG_SWITCH_CNTRL] = 0x00,
+ [REG_SWITCH_STATUS] = 0x04,
+ [REG_DIR_DATA_WRITE] = 0x08,
+ [REG_DIR_DATA_READ] = 0x0c,
+ [REG_SWITCH_REVISION] = 0x10,
+ [REG_PHY_REVISION] = 0x14,
+ [REG_SPHY_CNTRL] = 0x24,
+ [REG_CROSSBAR] = 0xc8,
+ [REG_RGMII_0_CNTRL] = 0xe0,
+ [REG_RGMII_1_CNTRL] = 0xec,
+ [REG_RGMII_2_CNTRL] = 0xf8,
+ [REG_LED_0_CNTRL] = 0x40,
+ [REG_LED_1_CNTRL] = 0x4c,
+ [REG_LED_2_CNTRL] = 0x58,
+};
+
+static const struct bcm_sf2_of_data bcm_sf2_4908_data = {
+ .type = BCM4908_DEVICE_ID,
+ .core_reg_align = 0,
+ .reg_offsets = bcm_sf2_4908_reg_offsets,
+ .num_cfp_rules = 0, /* FIXME */
+};
+
/* Register offsets for the SWITCH_REG_* block */
static const u16 bcm_sf2_7445_reg_offsets[] = {
[REG_SWITCH_CNTRL] = 0x00,
@@ -1033,6 +1059,9 @@ static const struct bcm_sf2_of_data bcm_
};
static const struct of_device_id bcm_sf2_of_match[] = {
+ { .compatible = "brcm,bcm4908-switch",
+ .data = &bcm_sf2_4908_data
+ },
{ .compatible = "brcm,bcm7445-switch-v4.0",
.data = &bcm_sf2_7445_data
},
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -17,6 +17,7 @@ enum bcm_sf2_reg_offs {
REG_SWITCH_REVISION,
REG_PHY_REVISION,
REG_SPHY_CNTRL,
+ REG_CROSSBAR,
REG_RGMII_0_CNTRL,
REG_RGMII_1_CNTRL,
REG_RGMII_2_CNTRL,

33
target/linux/bcm4908/patches-5.4/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch
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@ -1,33 +0,0 @@
From 8373a0fe9c7160a55482effa8a3f725efd3f8434 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 10 Mar 2021 13:51:59 +0100
Subject: [PATCH] net: dsa: bcm_sf2: use 2 Gbps IMP port link on BCM4908
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 uses 2 Gbps link between switch and the Ethernet interface.
Without this BCM4908 devices were able to achieve only 2 x ~895 Mb/s.
This allows handling e.g. NAT traffic with 940 Mb/s.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -70,7 +70,10 @@ static void bcm_sf2_imp_setup(struct dsa
/* Force link status for IMP port */
reg = core_readl(priv, offset);
reg |= (MII_SW_OR | LINK_STS);
- reg &= ~GMII_SPEED_UP_2G;
+ if (priv->type == BCM4908_DEVICE_ID)
+ reg |= GMII_SPEED_UP_2G;
+ else
+ reg &= ~GMII_SPEED_UP_2G;
core_writel(priv, reg, offset);
/* Enable Broadcast, Multicast, Unicast forwarding to IMP port */

65
target/linux/bcm4908/patches-5.4/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch
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@ -1,65 +0,0 @@
From 387d1c1819790aa8398c7cffab587f9a050a0d1a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 7 Feb 2021 23:26:31 +0100
Subject: [PATCH] dt-bindings: net: document BCM4908 Ethernet controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 is a family of SoCs with integrated Ethernet controller.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../bindings/net/brcm,bcm4908enet.yaml | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM4908 Ethernet controller
+
+description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+properties:
+ compatible:
+ const: brcm,bcm4908enet
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: RX interrupt
+
+ interrupt-names:
+ const: rx
+
+required:
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ethernet@80002000 {
+ compatible = "brcm,bcm4908enet";
+ reg = <0x80002000 0x1000>;
+
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rx";
+ };

847
target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch
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@ -1,847 +0,0 @@
From 4feffeadbcb2e5b11cbbf191a33c245b74a5837b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 7 Feb 2021 23:26:32 +0100
Subject: [PATCH] net: broadcom: bcm4908enet: add BCM4908 controller driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 SoCs family uses Ethernel controller that includes UniMAC but
uses different DMA engine (than other controllers) and requires
different programming.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
MAINTAINERS | 9 +
drivers/net/ethernet/broadcom/Kconfig | 8 +
drivers/net/ethernet/broadcom/Makefile | 1 +
drivers/net/ethernet/broadcom/bcm4908enet.c | 676 ++++++++++++++++++++
drivers/net/ethernet/broadcom/bcm4908enet.h | 96 +++
5 files changed, 790 insertions(+)
create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.c
create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.h
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3208,6 +3208,15 @@ F: Documentation/devicetree/bindings/mip
F: arch/mips/bcm47xx/*
F: arch/mips/include/asm/mach-bcm47xx/*
+BROADCOM BCM4908 ETHERNET DRIVER
+M: Rafał Miłecki <rafal@milecki.pl>
+M: bcm-kernel-feedback-list@broadcom.com
+L: netdev@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml
+F: drivers/net/ethernet/broadcom/bcm4908enet.*
+F: drivers/net/ethernet/broadcom/unimac.h
+
BROADCOM BCM5301X ARM ARCHITECTURE
M: Hauke Mehrtens <hauke@hauke-m.de>
M: Rafał Miłecki <zajec5@gmail.com>
--- a/drivers/net/ethernet/broadcom/Kconfig
+++ b/drivers/net/ethernet/broadcom/Kconfig
@@ -51,6 +51,14 @@ config B44_PCI
depends on B44_PCI_AUTOSELECT && B44_PCICORE_AUTOSELECT
default y
+config BCM4908ENET
+ tristate "Broadcom BCM4908 internal mac support"
+ depends on ARCH_BCM4908 || COMPILE_TEST
+ default y
+ help
+ This driver supports Ethernet controller integrated into Broadcom
+ BCM4908 family SoCs.
+
config BCM63XX_ENET
tristate "Broadcom 63xx internal mac support"
depends on BCM63XX
--- a/drivers/net/ethernet/broadcom/Makefile
+++ b/drivers/net/ethernet/broadcom/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_B44) += b44.o
+obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o
obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o
obj-$(CONFIG_BCMGENET) += genet/
obj-$(CONFIG_BNX2) += bnx2.o
--- /dev/null
+++ b/drivers/net/ethernet/broadcom/bcm4908enet.c
@@ -0,0 +1,676 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+ */
+
+#include <linux/delay.h>
+#include <linux/etherdevice.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include "bcm4908enet.h"
+#include "unimac.h"
+
+#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG
+#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG
+#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM
+#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM
+
+#define ENET_TX_BDS_NUM 200
+#define ENET_RX_BDS_NUM 200
+#define ENET_RX_BDS_NUM_MAX 8192
+
+#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \
+ ENET_DMA_CH_CFG_INT_NO_DESC | \
+ ENET_DMA_CH_CFG_INT_BUFF_DONE)
+#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */
+
+#define ENET_MTU_MIN 60
+#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */
+#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */
+
+struct bcm4908enet_dma_ring_bd {
+ __le32 ctl;
+ __le32 addr;
+} __packed;
+
+struct bcm4908enet_dma_ring_slot {
+ struct sk_buff *skb;
+ unsigned int len;
+ dma_addr_t dma_addr;
+};
+
+struct bcm4908enet_dma_ring {
+ int is_tx;
+ int read_idx;
+ int write_idx;
+ int length;
+ u16 cfg_block;
+ u16 st_ram_block;
+
+ union {
+ void *cpu_addr;
+ struct bcm4908enet_dma_ring_bd *buf_desc;
+ };
+ dma_addr_t dma_addr;
+
+ struct bcm4908enet_dma_ring_slot *slots;
+};
+
+struct bcm4908enet {
+ struct device *dev;
+ struct net_device *netdev;
+ struct napi_struct napi;
+ void __iomem *base;
+
+ struct bcm4908enet_dma_ring tx_ring;
+ struct bcm4908enet_dma_ring rx_ring;
+};
+
+/***
+ * R/W ops
+ */
+
+static inline u32 enet_read(struct bcm4908enet *enet, u16 offset)
+{
+ return readl(enet->base + offset);
+}
+
+static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value)
+{
+ writel(value, enet->base + offset);
+}
+
+static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set)
+{
+ u32 val;
+
+ WARN_ON(set & ~mask);
+
+ val = enet_read(enet, offset);
+ val = (val & ~mask) | (set & mask);
+ enet_write(enet, offset, val);
+}
+
+static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set)
+{
+ enet_maskset(enet, offset, set, set);
+}
+
+static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset)
+{
+ return enet_read(enet, ENET_UNIMAC + offset);
+}
+
+static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value)
+{
+ enet_write(enet, ENET_UNIMAC + offset, value);
+}
+
+static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set)
+{
+ enet_maskset(enet, ENET_UNIMAC + offset, mask, set);
+}
+
+static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set)
+{
+ enet_set(enet, ENET_UNIMAC + offset, set);
+}
+
+/***
+ * Helpers
+ */
+
+static void bcm4908enet_intrs_on(struct bcm4908enet *enet)
+{
+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);
+}
+
+static void bcm4908enet_intrs_off(struct bcm4908enet *enet)
+{
+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0);
+}
+
+static void bcm4908enet_intrs_ack(struct bcm4908enet *enet)
+{
+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);
+}
+
+/***
+ * DMA
+ */
+
+static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring)
+{
+ int size = ring->length * sizeof(struct bcm4908enet_dma_ring_bd);
+ struct device *dev = enet->dev;
+
+ ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL);
+ if (!ring->cpu_addr)
+ return -ENOMEM;
+
+ if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) {
+ dev_err(dev, "Invalid DMA ring alignment\n");
+ goto err_free_buf_descs;
+ }
+
+ ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL);
+ if (!ring->slots)
+ goto err_free_buf_descs;
+
+ memset(ring->cpu_addr, 0, size);
+
+ ring->read_idx = 0;
+ ring->write_idx = 0;
+
+ return 0;
+
+err_free_buf_descs:
+ dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr);
+ return -ENOMEM;
+}
+
+static void bcm4908enet_dma_free(struct bcm4908enet *enet)
+{
+ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring;
+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring;
+ struct device *dev = enet->dev;
+ int size;
+
+ size = rx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd);
+ if (rx_ring->cpu_addr)
+ dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr);
+ kfree(rx_ring->slots);
+
+ size = tx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd);
+ if (tx_ring->cpu_addr)
+ dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr);
+ kfree(tx_ring->slots);
+}
+
+static int bcm4908enet_dma_alloc(struct bcm4908enet *enet)
+{
+ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring;
+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring;
+ struct device *dev = enet->dev;
+ int err;
+
+ tx_ring->length = ENET_TX_BDS_NUM;
+ tx_ring->is_tx = 1;
+ tx_ring->cfg_block = ENET_DMA_CH_TX_CFG;
+ tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM;
+ err = bcm4908_dma_alloc_buf_descs(enet, tx_ring);
+ if (err) {
+ dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err);
+ return err;
+ }
+
+ rx_ring->length = ENET_RX_BDS_NUM;
+ rx_ring->is_tx = 0;
+ rx_ring->cfg_block = ENET_DMA_CH_RX_CFG;
+ rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM;
+ err = bcm4908_dma_alloc_buf_descs(enet, rx_ring);
+ if (err) {
+ dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err);
+ bcm4908enet_dma_free(enet);
+ return err;
+ }
+
+ return 0;
+}
+
+static void bcm4908enet_dma_reset(struct bcm4908enet *enet)
+{
+ struct bcm4908enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring };
+ int i;
+
+ /* Disable the DMA controller and channel */
+ for (i = 0; i < ARRAY_SIZE(rings); i++)
+ enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0);
+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0);
+
+ /* Reset channels state */
+ for (i = 0; i < ARRAY_SIZE(rings); i++) {
+ struct bcm4908enet_dma_ring *ring = rings[i];
+
+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0);
+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0);
+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0);
+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0);
+ }
+}
+
+static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx)
+{
+ struct bcm4908enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx];
+ struct bcm4908enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx];
+ struct device *dev = enet->dev;
+ u32 tmp;
+ int err;
+
+ slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE;
+
+ slot->skb = netdev_alloc_skb(enet->netdev, slot->len);
+ if (!slot->skb)
+ return -ENOMEM;
+
+ slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE);
+ err = dma_mapping_error(dev, slot->dma_addr);
+ if (err) {
+ dev_err(dev, "Failed to map DMA buffer: %d\n", err);
+ kfree_skb(slot->skb);
+ slot->skb = NULL;
+ return err;
+ }
+
+ tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
+ tmp |= DMA_CTL_STATUS_OWN;
+ if (idx == enet->rx_ring.length - 1)
+ tmp |= DMA_CTL_STATUS_WRAP;
+ buf_desc->ctl = cpu_to_le32(tmp);
+ buf_desc->addr = cpu_to_le32(slot->dma_addr);
+
+ return 0;
+}
+
+static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet,
+ struct bcm4908enet_dma_ring *ring)
+{
+ int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */
+ int reset_subch = ring->is_tx ? 1 : 0;
+
+ /* Reset the DMA channel */
+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch));
+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0);
+
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN);
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);
+
+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR,
+ (uint32_t)ring->dma_addr);
+}
+
+static void bcm4908enet_dma_uninit(struct bcm4908enet *enet)
+{
+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring;
+ struct bcm4908enet_dma_ring_slot *slot;
+ struct device *dev = enet->dev;
+ int i;
+
+ for (i = rx_ring->length - 1; i >= 0; i--) {
+ slot = &rx_ring->slots[i];
+ if (!slot->skb)
+ continue;
+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE);
+ kfree_skb(slot->skb);
+ slot->skb = NULL;
+ }
+}
+
+static int bcm4908enet_dma_init(struct bcm4908enet *enet)
+{
+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring;
+ struct device *dev = enet->dev;
+ int err;
+ int i;
+
+ for (i = 0; i < rx_ring->length; i++) {
+ err = bcm4908enet_dma_alloc_rx_buf(enet, i);
+ if (err) {
+ dev_err(dev, "Failed to alloc RX buffer: %d\n", err);
+ bcm4908enet_dma_uninit(enet);
+ return err;
+ }
+ }
+
+ bcm4908enet_dma_ring_init(enet, &enet->tx_ring);
+ bcm4908enet_dma_ring_init(enet, &enet->rx_ring);
+
+ return 0;
+}
+
+static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet,
+ struct bcm4908enet_dma_ring *ring)
+{
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);
+}
+
+static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet,
+ struct bcm4908enet_dma_ring *ring)
+{
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);
+}
+
+static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet,
+ struct bcm4908enet_dma_ring *ring)
+{
+ enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);
+}
+
+static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet,
+ struct bcm4908enet_dma_ring *ring)
+{
+ unsigned long deadline;
+ u32 tmp;
+
+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);
+
+ deadline = jiffies + usecs_to_jiffies(2000);
+ do {
+ tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG);
+ if (!(tmp & ENET_DMA_CH_CFG_ENABLE))
+ return;
+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);
+ usleep_range(10, 30);
+ } while (!time_after_eq(jiffies, deadline));
+
+ dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n");
+}
+
+/***
+ * Ethernet driver
+ */
+
+static void bcm4908enet_gmac_init(struct bcm4908enet *enet)
+{
+ u32 cmd;
+
+ cmd = enet_umac_read(enet, UMAC_CMD);
+ enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET);
+ enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET);
+
+ enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH);
+ enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0);
+
+ enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB);
+ enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0);
+
+ cmd = enet_umac_read(enet, UMAC_CMD);
+ cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT);
+ cmd &= ~CMD_TX_EN;
+ cmd &= ~CMD_RX_EN;
+ cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT;
+ enet_umac_write(enet, UMAC_CMD, cmd);
+
+ enet_maskset(enet, ENET_GMAC_STATUS,
+ ENET_GMAC_STATUS_ETH_SPEED_MASK |
+ ENET_GMAC_STATUS_HD |
+ ENET_GMAC_STATUS_AUTO_CFG_EN |
+ ENET_GMAC_STATUS_LINK_UP,
+ ENET_GMAC_STATUS_ETH_SPEED_1000 |
+ ENET_GMAC_STATUS_AUTO_CFG_EN |
+ ENET_GMAC_STATUS_LINK_UP);
+}
+
+static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id)
+{
+ struct bcm4908enet *enet = dev_id;
+
+ bcm4908enet_intrs_off(enet);
+ bcm4908enet_intrs_ack(enet);
+
+ napi_schedule(&enet->napi);
+
+ return IRQ_HANDLED;
+}
+
+static int bcm4908enet_open(struct net_device *netdev)
+{
+ struct bcm4908enet *enet = netdev_priv(netdev);
+ struct device *dev = enet->dev;
+ int err;
+
+ err = request_irq(netdev->irq, bcm4908enet_irq_handler, 0, "enet", enet);
+ if (err) {
+ dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err);
+ return err;
+ }
+
+ bcm4908enet_gmac_init(enet);
+ bcm4908enet_dma_reset(enet);
+ bcm4908enet_dma_init(enet);
+
+ enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN);
+
+ enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN);
+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0);
+ bcm4908enet_dma_rx_ring_enable(enet, &enet->rx_ring);
+
+ napi_enable(&enet->napi);
+ netif_carrier_on(netdev);
+ netif_start_queue(netdev);
+
+ bcm4908enet_intrs_ack(enet);
+ bcm4908enet_intrs_on(enet);
+
+ return 0;
+}
+
+static int bcm4908enet_stop(struct net_device *netdev)
+{
+ struct bcm4908enet *enet = netdev_priv(netdev);
+
+ netif_stop_queue(netdev);
+ netif_carrier_off(netdev);
+ napi_disable(&enet->napi);
+
+ bcm4908enet_dma_rx_ring_disable(enet, &enet->rx_ring);
+ bcm4908enet_dma_tx_ring_disable(enet, &enet->tx_ring);
+
+ bcm4908enet_dma_uninit(enet);
+
+ free_irq(enet->netdev->irq, enet);
+
+ return 0;
+}
+
+static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+ struct bcm4908enet *enet = netdev_priv(netdev);
+ struct bcm4908enet_dma_ring *ring = &enet->tx_ring;
+ struct bcm4908enet_dma_ring_slot *slot;
+ struct device *dev = enet->dev;
+ struct bcm4908enet_dma_ring_bd *buf_desc;
+ int free_buf_descs;
+ u32 tmp;
+
+ /* Free transmitted skbs */
+ while (ring->read_idx != ring->write_idx) {
+ buf_desc = &ring->buf_desc[ring->read_idx];
+ if (buf_desc->ctl & DMA_CTL_STATUS_OWN)
+ break;
+ slot = &ring->slots[ring->read_idx];
+
+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE);
+ dev_kfree_skb(slot->skb);
+ if (++ring->read_idx == ring->length)
+ ring->read_idx = 0;
+ }
+
+ /* Don't use the last empty buf descriptor */
+ if (ring->read_idx <= ring->write_idx)
+ free_buf_descs = ring->read_idx - ring->write_idx + ring->length;
+ else
+ free_buf_descs = ring->read_idx - ring->write_idx;
+ if (free_buf_descs < 2)
+ return NETDEV_TX_BUSY;
+
+ /* Hardware removes OWN bit after sending data */
+ buf_desc = &ring->buf_desc[ring->write_idx];
+ if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) {
+ netif_stop_queue(netdev);
+ return NETDEV_TX_BUSY;
+ }
+
+ slot = &ring->slots[ring->write_idx];
+ slot->skb = skb;
+ slot->len = skb->len;
+ slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
+ if (unlikely(dma_mapping_error(dev, slot->dma_addr)))
+ return NETDEV_TX_BUSY;
+
+ tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
+ tmp |= DMA_CTL_STATUS_OWN;
+ tmp |= DMA_CTL_STATUS_SOP;
+ tmp |= DMA_CTL_STATUS_EOP;
+ tmp |= DMA_CTL_STATUS_APPEND_CRC;
+ if (ring->write_idx + 1 == ring->length - 1)
+ tmp |= DMA_CTL_STATUS_WRAP;
+
+ buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr);
+ buf_desc->ctl = cpu_to_le32(tmp);
+
+ bcm4908enet_dma_tx_ring_ensable(enet, &enet->tx_ring);
+
+ if (++ring->write_idx == ring->length - 1)
+ ring->write_idx = 0;
+ enet->netdev->stats.tx_bytes += skb->len;
+ enet->netdev->stats.tx_packets++;
+
+ return NETDEV_TX_OK;
+}
+
+static int bcm4908enet_poll(struct napi_struct *napi, int weight)
+{
+ struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi);
+ struct device *dev = enet->dev;
+ int handled = 0;
+
+ while (handled < weight) {
+ struct bcm4908enet_dma_ring_bd *buf_desc;
+ struct bcm4908enet_dma_ring_slot slot;
+ u32 ctl;
+ int len;
+ int err;
+
+ buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx];
+ ctl = le32_to_cpu(buf_desc->ctl);
+ if (ctl & DMA_CTL_STATUS_OWN)
+ break;
+
+ slot = enet->rx_ring.slots[enet->rx_ring.read_idx];
+
+ /* Provide new buffer before unpinning the old one */
+ err = bcm4908enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx);
+ if (err)
+ break;
+
+ if (++enet->rx_ring.read_idx == enet->rx_ring.length)
+ enet->rx_ring.read_idx = 0;
+
+ len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
+
+ if (len < ENET_MTU_MIN ||
+ (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {
+ enet->netdev->stats.rx_dropped++;
+ break;
+ }
+
+ dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE);
+
+ skb_put(slot.skb, len - 4 + 2);
+ slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev);
+ netif_receive_skb(slot.skb);
+
+ enet->netdev->stats.rx_packets++;
+ enet->netdev->stats.rx_bytes += len;
+ }
+
+ if (handled < weight) {
+ napi_complete_done(napi, handled);
+ bcm4908enet_intrs_on(enet);
+ }
+
+ return handled;
+}
+
+static const struct net_device_ops bcm96xx_netdev_ops = {
+ .ndo_open = bcm4908enet_open,
+ .ndo_stop = bcm4908enet_stop,
+ .ndo_start_xmit = bcm4908enet_start_xmit,
+ .ndo_set_mac_address = eth_mac_addr,
+};
+
+static int bcm4908enet_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *netdev;
+ struct bcm4908enet *enet;
+ int err;
+
+ netdev = devm_alloc_etherdev(dev, sizeof(*enet));
+ if (!netdev)
+ return -ENOMEM;
+
+ enet = netdev_priv(netdev);
+ enet->dev = dev;
+ enet->netdev = netdev;
+
+ enet->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(enet->base)) {
+ dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base));
+ return PTR_ERR(enet->base);
+ }
+
+ netdev->irq = platform_get_irq_byname(pdev, "rx");
+ if (netdev->irq < 0)
+ return netdev->irq;
+
+ dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
+
+ err = bcm4908enet_dma_alloc(enet);
+ if (err)
+ return err;
+
+ SET_NETDEV_DEV(netdev, &pdev->dev);
+ eth_hw_addr_random(netdev);
+ netdev->netdev_ops = &bcm96xx_netdev_ops;
+ netdev->min_mtu = ETH_ZLEN;
+ netdev->mtu = ENET_MTU_MAX;
+ netdev->max_mtu = ENET_MTU_MAX;
+ netif_napi_add(netdev, &enet->napi, bcm4908enet_poll, 64);
+
+ err = register_netdev(netdev);
+ if (err) {
+ bcm4908enet_dma_free(enet);
+ return err;
+ }
+
+ platform_set_drvdata(pdev, enet);
+
+ return 0;
+}
+
+static int bcm4908enet_remove(struct platform_device *pdev)
+{
+ struct bcm4908enet *enet = platform_get_drvdata(pdev);
+
+ unregister_netdev(enet->netdev);
+ netif_napi_del(&enet->napi);
+ bcm4908enet_dma_free(enet);
+
+ return 0;
+}
+
+static const struct of_device_id bcm4908enet_of_match[] = {
+ { .compatible = "brcm,bcm4908enet"},
+ {},
+};
+
+static struct platform_driver bcm4908enet_driver = {
+ .driver = {
+ .name = "bcm4908enet",
+ .of_match_table = bcm4908enet_of_match,
+ },
+ .probe = bcm4908enet_probe,
+ .remove = bcm4908enet_remove,
+};
+module_platform_driver(bcm4908enet_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, bcm4908enet_of_match);
--- /dev/null
+++ b/drivers/net/ethernet/broadcom/bcm4908enet.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __BCM4908ENET_H
+#define __BCM4908ENET_H
+
+#define ENET_CONTROL 0x000
+#define ENET_MIB_CTRL 0x004
+#define ENET_MIB_CTRL_CLR_MIB 0x00000001
+#define ENET_RX_ERR_MASK 0x008
+#define ENET_MIB_MAX_PKT_SIZE 0x00C
+#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff
+#define ENET_DIAG_OUT 0x01c
+#define ENET_ENABLE_DROP_PKT 0x020
+#define ENET_IRQ_ENABLE 0x024
+#define ENET_IRQ_ENABLE_OVFL 0x00000001
+#define ENET_GMAC_STATUS 0x028
+#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003
+#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000
+#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001
+#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002
+#define ENET_GMAC_STATUS_HD 0x00000004
+#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008
+#define ENET_GMAC_STATUS_LINK_UP 0x00000010
+#define ENET_IRQ_STATUS 0x02c
+#define ENET_IRQ_STATUS_OVFL 0x00000001
+#define ENET_OVERFLOW_COUNTER 0x030
+#define ENET_FLUSH 0x034
+#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001
+#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002
+#define ENET_RSV_SELECT 0x038
+#define ENET_BP_FORCE 0x03c
+#define ENET_BP_FORCE_FORCE 0x00000001
+#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040
+#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f
+#define ENET_TX_CRC_CTRL 0x044
+#define ENET_MIB 0x200
+#define ENET_UNIMAC 0x400
+#define ENET_DMA 0x800
+#define ENET_DMA_CONTROLLER_CFG 0x800
+#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001
+#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002
+#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004
+#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804
+#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808
+#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c
+#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000
+#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810
+#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814
+#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818
+#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C
+#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820
+#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824
+#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828
+#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C
+#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830
+#define ENET_DMA_CTRL_CHANNEL_RESET 0x834
+#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838
+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840
+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844
+#define ENET_DMA_CH0_CFG 0xa00 /* RX */
+#define ENET_DMA_CH1_CFG 0xa10 /* TX */
+#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */
+#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */
+
+#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */
+#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */
+#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */
+#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */
+#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */
+#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */
+#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */
+#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */
+#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */
+#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */
+#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */
+#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */
+#define ENET_DMA_CH_CFG_SIZE 0x10
+
+#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */
+#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */
+#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */
+#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */
+#define ENET_DMA_CH_STATE_RAM_SIZE 0x10
+
+#define DMA_CTL_STATUS_APPEND_CRC 0x00000100
+#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200
+#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */
+#define DMA_CTL_STATUS_WRAP 0x00001000 /* */
+#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */
+#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */
+#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */
+#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000
+#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16
+#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000
+#define DMA_CTL_LEN_DESC_USEFPM 0x80000000
+
+#endif

128
target/linux/bcm4908/patches-5.4/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch
View File

@ -1,128 +0,0 @@
From 6710c5b0674f8811f7d8fbfc526684e7ed77f765 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:32 +0100
Subject: [PATCH] dt-bindings: net: rename BCM4908 Ethernet binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Rob pointed out that a normal convention is "brcm,bcm4908-enet" so
update whole binding to match it.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} | 6 +++---
MAINTAINERS | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
rename Documentation/devicetree/bindings/net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} (85%)
--- a/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml
+++ /dev/null
@@ -1,45 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Broadcom BCM4908 Ethernet controller
-
-description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs
-
-maintainers:
- - Rafał Miłecki <rafal@milecki.pl>
-
-properties:
- compatible:
- const: brcm,bcm4908enet
-
- reg:
- maxItems: 1
-
- interrupts:
- description: RX interrupt
-
- interrupt-names:
- const: rx
-
-required:
- - reg
- - interrupts
- - interrupt-names
-
-additionalProperties: false
-
-examples:
- - |
- #include <dt-bindings/interrupt-controller/irq.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
-
- ethernet@80002000 {
- compatible = "brcm,bcm4908enet";
- reg = <0x80002000 0x1000>;
-
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "rx";
- };
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/brcm,bcm4908-enet.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM4908 Ethernet controller
+
+description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+properties:
+ compatible:
+ const: brcm,bcm4908-enet
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: RX interrupt
+
+ interrupt-names:
+ const: rx
+
+required:
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ethernet@80002000 {
+ compatible = "brcm,bcm4908-enet";
+ reg = <0x80002000 0x1000>;
+
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rx";
+ };
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3213,7 +3213,7 @@ M: Rafał Miłecki <rafal@milecki.pl>
M: bcm-kernel-feedback-list@broadcom.com
L: netdev@vger.kernel.org
S: Maintained
-F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml
+F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
F: drivers/net/ethernet/broadcom/bcm4908enet.*
F: drivers/net/ethernet/broadcom/unimac.h

32
target/linux/bcm4908/patches-5.4/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch
View File

@ -1,32 +0,0 @@
From f08b5cf1eb1f2aefc6fe4a89c8c757ba94721d0b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:33 +0100
Subject: [PATCH] dt-bindings: net: bcm4908-enet: include
ethernet-controller.yaml
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It should be /included/ by every Ethernet controller binding. It adds
support for various generic properties.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml | 3 +++
1 file changed, 3 insertions(+)
--- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
@@ -11,6 +11,9 @@ description: Broadcom's Ethernet control
maintainers:
- Rafał Miłecki <rafal@milecki.pl>
+allOf:
+ - $ref: ethernet-controller.yaml#
+
properties:
compatible:
const: brcm,bcm4908-enet

1614
target/linux/bcm4908/patches-5.4/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch
View File

File diff suppressed because it is too large Load Diff

30
target/linux/bcm4908/patches-5.4/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch
View File

@ -1,30 +0,0 @@
From af263af64683f018be9ce3c309edfa9903f5109a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:35 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: drop unneeded memset()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
dma_alloc_coherent takes care of zeroing allocated memory
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 --
1 file changed, 2 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -163,8 +163,6 @@ static int bcm4908_dma_alloc_buf_descs(s
if (!ring->slots)
goto err_free_buf_descs;
- memset(ring->cpu_addr, 0, size);
-
ring->read_idx = 0;
ring->write_idx = 0;

75
target/linux/bcm4908/patches-5.4/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch
View File

@ -1,75 +0,0 @@
From 7b778ae4eb9cd6e1518e4e47902a104b13ae8929 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:36 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: drop "inline" from C functions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It seems preferred to let compiler optimize code if applicable.
While at it drop unused enet_umac_maskset().
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -75,17 +75,17 @@ struct bcm4908_enet {
* R/W ops
*/
-static inline u32 enet_read(struct bcm4908_enet *enet, u16 offset)
+static u32 enet_read(struct bcm4908_enet *enet, u16 offset)
{
return readl(enet->base + offset);
}
-static inline void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value)
+static void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value)
{
writel(value, enet->base + offset);
}
-static inline void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set)
+static void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set)
{
u32 val;
@@ -96,27 +96,22 @@ static inline void enet_maskset(struct b
enet_write(enet, offset, val);
}
-static inline void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set)
+static void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set)
{
enet_maskset(enet, offset, set, set);
}
-static inline u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset)
+static u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset)
{
return enet_read(enet, ENET_UNIMAC + offset);
}
-static inline void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value)
+static void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value)
{
enet_write(enet, ENET_UNIMAC + offset, value);
}
-static inline void enet_umac_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set)
-{
- enet_maskset(enet, ENET_UNIMAC + offset, mask, set);
-}
-
-static inline void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set)
+static void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set)
{
enet_set(enet, ENET_UNIMAC + offset, set);
}

60
target/linux/bcm4908/patches-5.4/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch
View File

@ -1,60 +0,0 @@
From e3948811720341f99cd5cb4a8a650473400ec4f8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:37 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: fix minor typos
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
1. Fix "ensable" typo noticed by Andrew
2. Fix chipset name in the struct net_device_ops variable
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -328,8 +328,8 @@ static int bcm4908_enet_dma_init(struct
return 0;
}
-static void bcm4908_enet_dma_tx_ring_ensable(struct bcm4908_enet *enet,
- struct bcm4908_enet_dma_ring *ring)
+static void bcm4908_enet_dma_tx_ring_enable(struct bcm4908_enet *enet,
+ struct bcm4908_enet_dma_ring *ring)
{
enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);
}
@@ -519,7 +519,7 @@ static int bcm4908_enet_start_xmit(struc
buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr);
buf_desc->ctl = cpu_to_le32(tmp);
- bcm4908_enet_dma_tx_ring_ensable(enet, &enet->tx_ring);
+ bcm4908_enet_dma_tx_ring_enable(enet, &enet->tx_ring);
if (++ring->write_idx == ring->length - 1)
ring->write_idx = 0;
@@ -583,7 +583,7 @@ static int bcm4908_enet_poll(struct napi
return handled;
}
-static const struct net_device_ops bcm96xx_netdev_ops = {
+static const struct net_device_ops bcm4908_enet_netdev_ops = {
.ndo_open = bcm4908_enet_open,
.ndo_stop = bcm4908_enet_stop,
.ndo_start_xmit = bcm4908_enet_start_xmit,
@@ -623,7 +623,7 @@ static int bcm4908_enet_probe(struct pla
SET_NETDEV_DEV(netdev, &pdev->dev);
eth_hw_addr_random(netdev);
- netdev->netdev_ops = &bcm96xx_netdev_ops;
+ netdev->netdev_ops = &bcm4908_enet_netdev_ops;
netdev->min_mtu = ETH_ZLEN;
netdev->mtu = ENET_MTU_MAX;
netdev->max_mtu = ENET_MTU_MAX;

28
target/linux/bcm4908/patches-5.4/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch
View File

@ -1,28 +0,0 @@
From 195e2d9febfbeef1d09701c387925e5c2f5cb038 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:38 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: fix received skb length
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Use ETH_FCS_LEN instead of magic value and drop incorrect + 2
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -567,7 +567,7 @@ static int bcm4908_enet_poll(struct napi
dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE);
- skb_put(slot.skb, len - 4 + 2);
+ skb_put(slot.skb, len - ETH_FCS_LEN);
slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev);
netif_receive_skb(slot.skb);

28
target/linux/bcm4908/patches-5.4/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch
View File

@ -1,28 +0,0 @@
From bdd70b997799099597fc0952fb0ec1bd80505bc4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Feb 2021 13:12:39 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: fix endianness in xmit code
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Use le32_to_cpu() for reading __le32 struct field filled by hw.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -476,7 +476,7 @@ static int bcm4908_enet_start_xmit(struc
/* Free transmitted skbs */
while (ring->read_idx != ring->write_idx) {
buf_desc = &ring->buf_desc[ring->read_idx];
- if (buf_desc->ctl & DMA_CTL_STATUS_OWN)
+ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)
break;
slot = &ring->slots[ring->read_idx];

119
target/linux/bcm4908/patches-5.4/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch
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@ -1,119 +0,0 @@
From 14b3b46a67f78ade99eafcbf320105615e948569 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Feb 2021 16:21:35 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: set MTU on open & on request
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Hardware comes up with default max frame size set to 1518. When using it
with switch it results in actual Ethernet MTU 1492:
1518 - 14 (Ethernet header) - 4 (Broadcom's tag) - 4 (802.1q) - 4 (FCS)
Above means hardware in its default state can't handle standard Ethernet
traffic (MTU 1500).
Define maximum possible Ethernet overhead and always set MAC max frame
length accordingly. This change fixes handling Ethernet frames of length
1506 - 1514.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 31 ++++++++++++++++----
1 file changed, 25 insertions(+), 6 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -5,6 +5,7 @@
#include <linux/delay.h>
#include <linux/etherdevice.h>
+#include <linux/if_vlan.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -29,9 +30,10 @@
ENET_DMA_CH_CFG_INT_BUFF_DONE)
#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */
-#define ENET_MTU_MIN 60
-#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */
-#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */
+#define ENET_MTU_MAX ETH_DATA_LEN /* Is it possible to support 2044? */
+#define BRCM_MAX_TAG_LEN 6
+#define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \
+ ETH_FCS_LEN + 4) /* 32 */
struct bcm4908_enet_dma_ring_bd {
__le32 ctl;
@@ -135,6 +137,11 @@ static void bcm4908_enet_intrs_ack(struc
enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);
}
+static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu)
+{
+ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD);
+}
+
/***
* DMA
*/
@@ -246,7 +253,7 @@ static int bcm4908_enet_dma_alloc_rx_buf
u32 tmp;
int err;
- slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE;
+ slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD;
slot->skb = netdev_alloc_skb(enet->netdev, slot->len);
if (!slot->skb)
@@ -374,6 +381,8 @@ static void bcm4908_enet_gmac_init(struc
{
u32 cmd;
+ bcm4908_enet_set_mtu(enet, enet->netdev->mtu);
+
cmd = enet_umac_read(enet, UMAC_CMD);
enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET);
enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET);
@@ -559,7 +568,7 @@ static int bcm4908_enet_poll(struct napi
len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
- if (len < ENET_MTU_MIN ||
+ if (len < ETH_ZLEN ||
(ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {
enet->netdev->stats.rx_dropped++;
break;
@@ -583,11 +592,21 @@ static int bcm4908_enet_poll(struct napi
return handled;
}
+static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu)
+{
+ struct bcm4908_enet *enet = netdev_priv(netdev);
+
+ bcm4908_enet_set_mtu(enet, new_mtu);
+
+ return 0;
+}
+
static const struct net_device_ops bcm4908_enet_netdev_ops = {
.ndo_open = bcm4908_enet_open,
.ndo_stop = bcm4908_enet_stop,
.ndo_start_xmit = bcm4908_enet_start_xmit,
.ndo_set_mac_address = eth_mac_addr,
+ .ndo_change_mtu = bcm4908_enet_change_mtu,
};
static int bcm4908_enet_probe(struct platform_device *pdev)
@@ -625,7 +644,7 @@ static int bcm4908_enet_probe(struct pla
eth_hw_addr_random(netdev);
netdev->netdev_ops = &bcm4908_enet_netdev_ops;
netdev->min_mtu = ETH_ZLEN;
- netdev->mtu = ENET_MTU_MAX;
+ netdev->mtu = ETH_DATA_LEN;
netdev->max_mtu = ENET_MTU_MAX;
netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64);

30
target/linux/bcm4908/patches-5.4/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch
View File

@ -1,30 +0,0 @@
From 4dc7f09b8becfa35a55430a49d95acf19f996e6b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 24 Feb 2021 16:18:41 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: fix RX path possible mem leak
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
After filling RX ring slot with new skb it's required to free old skb.
Immediately on error or later in the net subsystem.
Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210224151842.2419-1-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -570,6 +570,7 @@ static int bcm4908_enet_poll(struct napi
if (len < ETH_ZLEN ||
(ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {
+ kfree_skb(slot.skb);
enet->netdev->stats.rx_dropped++;
break;
}

31
target/linux/bcm4908/patches-5.4/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch
View File

@ -1,31 +0,0 @@
From 4d9274cee40b6a20dd6148c6c81c6733c2678cbc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 24 Feb 2021 16:18:42 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: fix NAPI poll returned value
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Missing increment was resulting in poll function always returning 0
instead of amount of processed packets.
Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210224151842.2419-2-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -583,6 +583,8 @@ static int bcm4908_enet_poll(struct napi
enet->netdev->stats.rx_packets++;
enet->netdev->stats.rx_bytes += len;
+
+ handled++;
}
if (handled < weight) {

34
target/linux/bcm4908/patches-5.4/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch
View File

@ -1,34 +0,0 @@
From d313d16bbaea0f11a2e98f04a6c678b43c208915 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 26 Feb 2021 14:20:38 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: enable RX after processing
packets
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
When receiving a lot of packets hardware may run out of free
descriptiors and stop RX ring. Enable it every time after handling
received packets.
Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210226132038.29849-1-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -592,6 +592,9 @@ static int bcm4908_enet_poll(struct napi
bcm4908_enet_intrs_on(enet);
}
+ /* Hardware could disable ring if it run out of descriptors */
+ bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring);
+
return handled;
}

33
target/linux/bcm4908/patches-5.4/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch
View File

@ -1,33 +0,0 @@
From a3bc483216650a7232559bf0a1debfbabff3e12c Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Tue, 16 Mar 2021 15:03:41 +0100
Subject: [PATCH] net: broadcom: BCM4908_ENET should not default to y,
unconditionally
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Merely enabling compile-testing should not enable additional code.
To fix this, restrict the automatic enabling of BCM4908_ENET to
ARCH_BCM4908.
Fixes: 4feffeadbcb2e5b1 ("net: broadcom: bcm4908enet: add BCM4908 controller driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/Kconfig
+++ b/drivers/net/ethernet/broadcom/Kconfig
@@ -54,7 +54,7 @@ config B44_PCI
config BCM4908_ENET
tristate "Broadcom BCM4908 internal mac support"
depends on ARCH_BCM4908 || COMPILE_TEST
- default y
+ default y if ARCH_BCM4908
help
This driver supports Ethernet controller integrated into Broadcom
BCM4908 family SoCs.

38
target/linux/bcm4908/patches-5.4/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch
View File

@ -1,38 +0,0 @@
From 3559c1ea4336636c886002996d50805365d3055c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 10 Mar 2021 09:48:13 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: read MAC from OF
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 devices have MAC address accessible using NVMEM so it's needed
to use OF helper for reading it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -9,6 +9,7 @@
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_net.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/string.h>
@@ -647,7 +648,9 @@ static int bcm4908_enet_probe(struct pla
return err;
SET_NETDEV_DEV(netdev, &pdev->dev);
- eth_hw_addr_random(netdev);
+ of_get_mac_address(dev->of_node, netdev->dev_addr);
+ if (!is_valid_ether_addr(netdev->dev_addr))
+ eth_hw_addr_random(netdev);
netdev->netdev_ops = &bcm4908_enet_netdev_ops;
netdev->min_mtu = ETH_ZLEN;
netdev->mtu = ETH_DATA_LEN;

50
target/linux/bcm4908/patches-5.4/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch
View File

@ -1,50 +0,0 @@
From ab4dda7a8cb7e55ea3d92fd5e249cf6f5396028c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Mar 2021 13:35:20 +0100
Subject: [PATCH] dt-bindings: net: bcm4908-enet: add optional TX interrupt
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
I discovered that hardware actually supports two interrupts, one per DMA
channel (RX and TX).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../bindings/net/brcm,bcm4908-enet.yaml | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
--- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
@@ -22,10 +22,18 @@ properties:
maxItems: 1
interrupts:
- description: RX interrupt
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: RX interrupt
+ - description: TX interrupt
interrupt-names:
- const: rx
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: rx
+ - const: tx
required:
- reg
@@ -43,6 +51,7 @@ examples:
compatible = "brcm,bcm4908-enet";
reg = <0x80002000 0x1000>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "rx";
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rx", "tx";
};

300
target/linux/bcm4908/patches-5.4/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch
View File

@ -1,300 +0,0 @@
From 12bb508bfe5a564c36864b12253db23cac83bfa1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Mar 2021 13:35:21 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: support TX interrupt
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It appears that each DMA channel has its own interrupt and both rings
can be configured (the same way) to handle interrupts.
1. Make ring interrupts code generic (make it operate on given ring)
2. Move napi to ring (so each has its own)
3. Make IRQ handler generic (match ring against received IRQ number)
4. Add (optional) support for TX interrupt
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 138 ++++++++++++++-----
1 file changed, 103 insertions(+), 35 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -54,6 +54,7 @@ struct bcm4908_enet_dma_ring {
int length;
u16 cfg_block;
u16 st_ram_block;
+ struct napi_struct napi;
union {
void *cpu_addr;
@@ -67,8 +68,8 @@ struct bcm4908_enet_dma_ring {
struct bcm4908_enet {
struct device *dev;
struct net_device *netdev;
- struct napi_struct napi;
void __iomem *base;
+ int irq_tx;
struct bcm4908_enet_dma_ring tx_ring;
struct bcm4908_enet_dma_ring rx_ring;
@@ -123,24 +124,31 @@ static void enet_umac_set(struct bcm4908
* Helpers
*/
-static void bcm4908_enet_intrs_on(struct bcm4908_enet *enet)
+static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu)
{
- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);
+ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD);
}
-static void bcm4908_enet_intrs_off(struct bcm4908_enet *enet)
+/***
+ * DMA ring ops
+ */
+
+static void bcm4908_enet_dma_ring_intrs_on(struct bcm4908_enet *enet,
+ struct bcm4908_enet_dma_ring *ring)
{
- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0);
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);
}
-static void bcm4908_enet_intrs_ack(struct bcm4908_enet *enet)
+static void bcm4908_enet_dma_ring_intrs_off(struct bcm4908_enet *enet,
+ struct bcm4908_enet_dma_ring *ring)
{
- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);
}
-static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu)
+static void bcm4908_enet_dma_ring_intrs_ack(struct bcm4908_enet *enet,
+ struct bcm4908_enet_dma_ring *ring)
{
- enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD);
+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);
}
/***
@@ -414,11 +422,14 @@ static void bcm4908_enet_gmac_init(struc
static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id)
{
struct bcm4908_enet *enet = dev_id;
+ struct bcm4908_enet_dma_ring *ring;
- bcm4908_enet_intrs_off(enet);
- bcm4908_enet_intrs_ack(enet);
+ ring = (irq == enet->irq_tx) ? &enet->tx_ring : &enet->rx_ring;
- napi_schedule(&enet->napi);
+ bcm4908_enet_dma_ring_intrs_off(enet, ring);
+ bcm4908_enet_dma_ring_intrs_ack(enet, ring);
+
+ napi_schedule(&ring->napi);
return IRQ_HANDLED;
}
@@ -426,6 +437,8 @@ static irqreturn_t bcm4908_enet_irq_hand
static int bcm4908_enet_open(struct net_device *netdev)
{
struct bcm4908_enet *enet = netdev_priv(netdev);
+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
struct device *dev = enet->dev;
int err;
@@ -435,6 +448,17 @@ static int bcm4908_enet_open(struct net_
return err;
}
+ if (enet->irq_tx > 0) {
+ err = request_irq(enet->irq_tx, bcm4908_enet_irq_handler, 0,
+ "tx", enet);
+ if (err) {
+ dev_err(dev, "Failed to request IRQ %d: %d\n",
+ enet->irq_tx, err);
+ free_irq(netdev->irq, enet);
+ return err;
+ }
+ }
+
bcm4908_enet_gmac_init(enet);
bcm4908_enet_dma_reset(enet);
bcm4908_enet_dma_init(enet);
@@ -443,14 +467,19 @@ static int bcm4908_enet_open(struct net_
enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN);
enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0);
- bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring);
- napi_enable(&enet->napi);
+ if (enet->irq_tx > 0) {
+ napi_enable(&tx_ring->napi);
+ bcm4908_enet_dma_ring_intrs_ack(enet, tx_ring);
+ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring);
+ }
+
+ bcm4908_enet_dma_rx_ring_enable(enet, rx_ring);
+ napi_enable(&rx_ring->napi);
netif_carrier_on(netdev);
netif_start_queue(netdev);
-
- bcm4908_enet_intrs_ack(enet);
- bcm4908_enet_intrs_on(enet);
+ bcm4908_enet_dma_ring_intrs_ack(enet, rx_ring);
+ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring);
return 0;
}
@@ -458,16 +487,20 @@ static int bcm4908_enet_open(struct net_
static int bcm4908_enet_stop(struct net_device *netdev)
{
struct bcm4908_enet *enet = netdev_priv(netdev);
+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
netif_stop_queue(netdev);
netif_carrier_off(netdev);
- napi_disable(&enet->napi);
+ napi_disable(&rx_ring->napi);
+ napi_disable(&tx_ring->napi);
bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring);
bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring);
bcm4908_enet_dma_uninit(enet);
+ free_irq(enet->irq_tx, enet);
free_irq(enet->netdev->irq, enet);
return 0;
@@ -484,25 +517,19 @@ static int bcm4908_enet_start_xmit(struc
u32 tmp;
/* Free transmitted skbs */
- while (ring->read_idx != ring->write_idx) {
- buf_desc = &ring->buf_desc[ring->read_idx];
- if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)
- break;
- slot = &ring->slots[ring->read_idx];
-
- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE);
- dev_kfree_skb(slot->skb);
- if (++ring->read_idx == ring->length)
- ring->read_idx = 0;
- }
+ if (enet->irq_tx < 0 &&
+ !(le32_to_cpu(ring->buf_desc[ring->read_idx].ctl) & DMA_CTL_STATUS_OWN))
+ napi_schedule(&enet->tx_ring.napi);
/* Don't use the last empty buf descriptor */
if (ring->read_idx <= ring->write_idx)
free_buf_descs = ring->read_idx - ring->write_idx + ring->length;
else
free_buf_descs = ring->read_idx - ring->write_idx;
- if (free_buf_descs < 2)
+ if (free_buf_descs < 2) {
+ netif_stop_queue(netdev);
return NETDEV_TX_BUSY;
+ }
/* Hardware removes OWN bit after sending data */
buf_desc = &ring->buf_desc[ring->write_idx];
@@ -539,9 +566,10 @@ static int bcm4908_enet_start_xmit(struc
return NETDEV_TX_OK;
}
-static int bcm4908_enet_poll(struct napi_struct *napi, int weight)
+static int bcm4908_enet_poll_rx(struct napi_struct *napi, int weight)
{
- struct bcm4908_enet *enet = container_of(napi, struct bcm4908_enet, napi);
+ struct bcm4908_enet_dma_ring *rx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi);
+ struct bcm4908_enet *enet = container_of(rx_ring, struct bcm4908_enet, rx_ring);
struct device *dev = enet->dev;
int handled = 0;
@@ -590,7 +618,7 @@ static int bcm4908_enet_poll(struct napi
if (handled < weight) {
napi_complete_done(napi, handled);
- bcm4908_enet_intrs_on(enet);
+ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring);
}
/* Hardware could disable ring if it run out of descriptors */
@@ -599,6 +627,42 @@ static int bcm4908_enet_poll(struct napi
return handled;
}
+static int bcm4908_enet_poll_tx(struct napi_struct *napi, int weight)
+{
+ struct bcm4908_enet_dma_ring *tx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi);
+ struct bcm4908_enet *enet = container_of(tx_ring, struct bcm4908_enet, tx_ring);
+ struct bcm4908_enet_dma_ring_bd *buf_desc;
+ struct bcm4908_enet_dma_ring_slot *slot;
+ struct device *dev = enet->dev;
+ unsigned int bytes = 0;
+ int handled = 0;
+
+ while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) {
+ buf_desc = &tx_ring->buf_desc[tx_ring->read_idx];
+ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)
+ break;
+ slot = &tx_ring->slots[tx_ring->read_idx];
+
+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE);
+ dev_kfree_skb(slot->skb);
+ bytes += slot->len;
+ if (++tx_ring->read_idx == tx_ring->length)
+ tx_ring->read_idx = 0;
+
+ handled++;
+ }
+
+ if (handled < weight) {
+ napi_complete_done(napi, handled);
+ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring);
+ }
+
+ if (netif_queue_stopped(enet->netdev))
+ netif_wake_queue(enet->netdev);
+
+ return handled;
+}
+
static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu)
{
struct bcm4908_enet *enet = netdev_priv(netdev);
@@ -641,6 +705,8 @@ static int bcm4908_enet_probe(struct pla
if (netdev->irq < 0)
return netdev->irq;
+ enet->irq_tx = platform_get_irq_byname(pdev, "tx");
+
dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
err = bcm4908_enet_dma_alloc(enet);
@@ -655,7 +721,8 @@ static int bcm4908_enet_probe(struct pla
netdev->min_mtu = ETH_ZLEN;
netdev->mtu = ETH_DATA_LEN;
netdev->max_mtu = ENET_MTU_MAX;
- netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64);
+ netif_tx_napi_add(netdev, &enet->tx_ring.napi, bcm4908_enet_poll_tx, NAPI_POLL_WEIGHT);
+ netif_napi_add(netdev, &enet->rx_ring.napi, bcm4908_enet_poll_rx, NAPI_POLL_WEIGHT);
err = register_netdev(netdev);
if (err) {
@@ -673,7 +740,8 @@ static int bcm4908_enet_remove(struct pl
struct bcm4908_enet *enet = platform_get_drvdata(pdev);
unregister_netdev(enet->netdev);
- netif_napi_del(&enet->napi);
+ netif_napi_del(&enet->rx_ring.napi);
+ netif_napi_del(&enet->tx_ring.napi);
bcm4908_enet_dma_free(enet);
return 0;

72
target/linux/bcm4908/patches-5.4/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch
View File

@ -1,72 +0,0 @@
From 01488a0ccd9abe15565bed50a45afcddbb0fe199 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Mar 2021 11:41:07 +0100
Subject: [PATCH] net: dsa: bcm_sf2: store PHY interface/mode in port structure
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's needed later for proper switch / crossbar setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 16 ++++++++++++----
drivers/net/dsa/bcm_sf2.h | 1 +
2 files changed, 13 insertions(+), 4 deletions(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -380,8 +380,9 @@ static void bcm_sf2_intr_disable(struct
static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv,
struct device_node *dn)
{
+ struct device *dev = priv->dev->ds->dev;
+ struct bcm_sf2_port_status *port_st;
struct device_node *port;
- int mode;
unsigned int port_num;
priv->moca_port = -1;
@@ -390,19 +391,26 @@ static void bcm_sf2_identify_ports(struc
if (of_property_read_u32(port, "reg", &port_num))
continue;
+ if (port_num >= DSA_MAX_PORTS) {
+ dev_err(dev, "Invalid port number %d\n", port_num);
+ continue;
+ }
+
+ port_st = &priv->port_sts[port_num];
+
/* Internal PHYs get assigned a specific 'phy-mode' property
* value: "internal" to help flag them before MDIO probing
* has completed, since they might be turned off at that
* time
*/
- mode = of_get_phy_mode(port);
- if (mode < 0)
+ port_st->mode = of_get_phy_mode(port);
+ if (port_st->mode < 0)
continue;
- if (mode == PHY_INTERFACE_MODE_INTERNAL)
+ if (port_st->mode == PHY_INTERFACE_MODE_INTERNAL)
priv->int_phy_mask |= 1 << port_num;
- if (mode == PHY_INTERFACE_MODE_MOCA)
+ if (port_st->mode == PHY_INTERFACE_MODE_MOCA)
priv->moca_port = port_num;
if (of_property_read_bool(port, "brcm,use-bcm-hdr"))
--- a/drivers/net/dsa/bcm_sf2.h
+++ b/drivers/net/dsa/bcm_sf2.h
@@ -43,6 +43,7 @@ struct bcm_sf2_hw_params {
#define BCM_SF2_REGS_NUM 6
struct bcm_sf2_port_status {
+ int mode;
unsigned int link;
};

152
target/linux/bcm4908/patches-5.4/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch
View File

@ -1,152 +0,0 @@
From a9349f08ec6c1251d41ef167d27a15cc39bc5b97 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Mar 2021 11:41:08 +0100
Subject: [PATCH] net: dsa: bcm_sf2: setup BCM4908 internal crossbar
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
On some SoCs (e.g. BCM4908, BCM631[345]8) SF2 has an integrated
crossbar. It allows connecting its selected external ports to internal
ports. It's used by vendors to handle custom Ethernet setups.
BCM4908 has following 3x2 crossbar. On Asus GT-AC5300 rgmii is used for
connecting external BCM53134S switch. GPHY4 is usually used for WAN
port. More fancy devices use SerDes for 2.5 Gbps Ethernet.
┌──────────┐
SerDes ─── 0 ─┤ │
│ 3x2 ├─ 0 ─── switch port 7
GPHY4 ─── 1 ─┤ │
│ crossbar ├─ 1 ─── runner (accelerator)
rgmii ─── 2 ─┤ │
└──────────┘
Use setup data based on DT info to configure BCM4908's switch port 7.
Right now only GPHY and rgmii variants are supported. Handling SerDes
can be implemented later.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 45 ++++++++++++++++++++++++++++++++++
drivers/net/dsa/bcm_sf2.h | 1 +
drivers/net/dsa/bcm_sf2_regs.h | 7 ++++++
3 files changed, 53 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -369,6 +369,44 @@ static int bcm_sf2_sw_rst(struct bcm_sf2
return 0;
}
+static void bcm_sf2_crossbar_setup(struct bcm_sf2_priv *priv)
+{
+ struct device *dev = priv->dev->ds->dev;
+ int shift;
+ u32 mask;
+ u32 reg;
+ int i;
+
+ mask = BIT(priv->num_crossbar_int_ports) - 1;
+
+ reg = reg_readl(priv, REG_CROSSBAR);
+ switch (priv->type) {
+ case BCM4908_DEVICE_ID:
+ shift = CROSSBAR_BCM4908_INT_P7 * priv->num_crossbar_int_ports;
+ reg &= ~(mask << shift);
+ if (0) /* FIXME */
+ reg |= CROSSBAR_BCM4908_EXT_SERDES << shift;
+ else if (priv->int_phy_mask & BIT(7))
+ reg |= CROSSBAR_BCM4908_EXT_GPHY4 << shift;
+ else if (phy_interface_mode_is_rgmii(priv->port_sts[7].mode))
+ reg |= CROSSBAR_BCM4908_EXT_RGMII << shift;
+ else if (WARN(1, "Invalid port mode\n"))
+ return;
+ break;
+ default:
+ return;
+ }
+ reg_writel(priv, reg, REG_CROSSBAR);
+
+ reg = reg_readl(priv, REG_CROSSBAR);
+ for (i = 0; i < priv->num_crossbar_int_ports; i++) {
+ shift = i * priv->num_crossbar_int_ports;
+
+ dev_dbg(dev, "crossbar int port #%d - ext port #%d\n", i,
+ (reg >> shift) & mask);
+ }
+}
+
static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv)
{
intrl2_0_mask_set(priv, 0xffffffff);
@@ -734,6 +772,8 @@ static int bcm_sf2_sw_resume(struct dsa_
return ret;
}
+ bcm_sf2_crossbar_setup(priv);
+
ret = bcm_sf2_cfp_resume(ds);
if (ret)
return ret;
@@ -996,6 +1036,7 @@ struct bcm_sf2_of_data {
const u16 *reg_offsets;
unsigned int core_reg_align;
unsigned int num_cfp_rules;
+ unsigned int num_crossbar_int_ports;
};
static const u16 bcm_sf2_4908_reg_offsets[] = {
@@ -1020,6 +1061,7 @@ static const struct bcm_sf2_of_data bcm_
.core_reg_align = 0,
.reg_offsets = bcm_sf2_4908_reg_offsets,
.num_cfp_rules = 0, /* FIXME */
+ .num_crossbar_int_ports = 2,
};
/* Register offsets for the SWITCH_REG_* block */
@@ -1130,6 +1172,7 @@ static int bcm_sf2_sw_probe(struct platf
priv->reg_offsets = data->reg_offsets;
priv->core_reg_align = data->core_reg_align;
priv->num_cfp_rules = data->num_cfp_rules;
+ priv->num_crossbar_int_ports = data->num_crossbar_int_ports;
/* Auto-detection using standard registers will not work, so
* provide an indication of what kind of device we are for
@@ -1184,6 +1227,8 @@ static int bcm_sf2_sw_probe(struct platf
return ret;
}
+ bcm_sf2_crossbar_setup(priv);
+
bcm_sf2_gphy_enable_set(priv->dev->ds, true);
ret = bcm_sf2_mdio_register(ds);
--- a/drivers/net/dsa/bcm_sf2.h
+++ b/drivers/net/dsa/bcm_sf2.h
@@ -70,6 +70,7 @@ struct bcm_sf2_priv {
const u16 *reg_offsets;
unsigned int core_reg_align;
unsigned int num_cfp_rules;
+ unsigned int num_crossbar_int_ports;
/* spinlock protecting access to the indirect registers */
spinlock_t indir_lock;
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -48,6 +48,13 @@ enum bcm_sf2_reg_offs {
#define PHY_PHYAD_SHIFT 8
#define PHY_PHYAD_MASK 0x1F
+/* Relative to REG_CROSSBAR */
+#define CROSSBAR_BCM4908_INT_P7 0
+#define CROSSBAR_BCM4908_INT_RUNNER 1
+#define CROSSBAR_BCM4908_EXT_SERDES 0
+#define CROSSBAR_BCM4908_EXT_GPHY4 1
+#define CROSSBAR_BCM4908_EXT_RGMII 2
+
#define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x))
/* Relative to REG_RGMII_CNTRL */

25
target/linux/bcm4908/patches-5.4/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch
View File

@ -1,25 +0,0 @@
From f4e6d7cdbfae502788bc468295b232dec76ee57e Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Fri, 12 Mar 2021 13:11:01 -0800
Subject: [PATCH] net: dsa: bcm_sf2: Fill in BCM4908 CFP entries
The BCM4908 switch has 256 CFP entrie, update that setting so CFP can be
used.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1060,7 +1060,7 @@ static const struct bcm_sf2_of_data bcm_
.type = BCM4908_DEVICE_ID,
.core_reg_align = 0,
.reg_offsets = bcm_sf2_4908_reg_offsets,
- .num_cfp_rules = 0, /* FIXME */
+ .num_cfp_rules = 256,
.num_crossbar_int_ports = 2,
};

127
target/linux/bcm4908/patches-5.4/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch
View File

@ -1,127 +0,0 @@
From 55cfeb396965c3906a84d09a9c487d065e37773b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 18 Mar 2021 09:01:42 +0100
Subject: [PATCH 1/2] net: dsa: bcm_sf2: add function finding RGMII register
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Simple macro like REG_RGMII_CNTRL_P() is insufficient as:
1. It doesn't validate port argument
2. It doesn't support chipsets with non-lineral RGMII regs layout
Missing port validation could result in getting register offset from out
of array. Random memory -> random offset -> random reads/writes. It
affected e.g. BCM4908 for REG_RGMII_CNTRL_P(7).
Fixes: a78e86ed586d ("net: dsa: bcm_sf2: Prepare for different register layouts")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 49 +++++++++++++++++++++++++++++-----
drivers/net/dsa/bcm_sf2_regs.h | 2 --
2 files changed, 42 insertions(+), 9 deletions(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -31,6 +31,31 @@
#include "b53/b53_priv.h"
#include "b53/b53_regs.h"
+static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port)
+{
+ switch (priv->type) {
+ case BCM4908_DEVICE_ID:
+ /* TODO */
+ break;
+ default:
+ switch (port) {
+ case 0:
+ return REG_RGMII_0_CNTRL;
+ case 1:
+ return REG_RGMII_1_CNTRL;
+ case 2:
+ return REG_RGMII_2_CNTRL;
+ default:
+ break;
+ }
+ }
+
+ WARN_ONCE(1, "Unsupported port %d\n", port);
+
+ /* RO fallback reg */
+ return REG_SWITCH_STATUS;
+}
+
static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
@@ -588,6 +613,7 @@ static void bcm_sf2_sw_mac_config(struct
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
u32 id_mode_dis = 0, port_mode;
+ u32 reg_rgmii_ctrl;
u32 reg, offset;
if (port == core_readl(priv, CORE_IMP0_PRT_ID))
@@ -617,10 +643,12 @@ static void bcm_sf2_sw_mac_config(struct
goto force_link;
}
+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
+
/* Clear id_mode_dis bit, and the existing port mode, let
* RGMII_MODE_EN bet set by mac_link_{up,down}
*/
- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
+ reg = reg_readl(priv, reg_rgmii_ctrl);
reg &= ~ID_MODE_DIS;
reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT);
reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN);
@@ -635,7 +663,7 @@ static void bcm_sf2_sw_mac_config(struct
reg |= RX_PAUSE_EN;
}
- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
+ reg_writel(priv, reg, reg_rgmii_ctrl);
force_link:
/* Force link settings detected from the PHY */
@@ -661,6 +689,7 @@ static void bcm_sf2_sw_mac_link_set(stru
phy_interface_t interface, bool link)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
+ u32 reg_rgmii_ctrl;
u32 reg;
if (!phy_interface_mode_is_rgmii(interface) &&
@@ -668,13 +697,15 @@ static void bcm_sf2_sw_mac_link_set(stru
interface != PHY_INTERFACE_MODE_REVMII)
return;
+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
+
/* If the link is down, just disable the interface to conserve power */
- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
+ reg = reg_readl(priv, reg_rgmii_ctrl);
if (link)
reg |= RGMII_MODE_EN;
else
reg &= ~RGMII_MODE_EN;
- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
+ reg_writel(priv, reg, reg_rgmii_ctrl);
}
static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port,
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -55,8 +55,6 @@ enum bcm_sf2_reg_offs {
#define CROSSBAR_BCM4908_EXT_GPHY4 1
#define CROSSBAR_BCM4908_EXT_RGMII 2
-#define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x))
-
/* Relative to REG_RGMII_CNTRL */
#define RGMII_MODE_EN (1 << 0)
#define ID_MODE_DIS (1 << 1)

56
target/linux/bcm4908/patches-5.4/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch
View File

@ -1,56 +0,0 @@
From 6859d91549341c2ad769d482de58129f080c0f04 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 18 Mar 2021 09:01:43 +0100
Subject: [PATCH 2/2] net: dsa: bcm_sf2: fix BCM4908 RGMII reg(s)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has only 1 RGMII reg for controlling port 7.
Fixes: 73b7a6047971 ("net: dsa: bcm_sf2: support BCM4908's integrated switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/bcm_sf2.c | 11 +++++++----
drivers/net/dsa/bcm_sf2_regs.h | 1 +
2 files changed, 8 insertions(+), 4 deletions(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -35,7 +35,12 @@ static u16 bcm_sf2_reg_rgmii_cntrl(struc
{
switch (priv->type) {
case BCM4908_DEVICE_ID:
- /* TODO */
+ switch (port) {
+ case 7:
+ return REG_RGMII_11_CNTRL;
+ default:
+ break;
+ }
break;
default:
switch (port) {
@@ -1079,9 +1084,7 @@ static const u16 bcm_sf2_4908_reg_offset
[REG_PHY_REVISION] = 0x14,
[REG_SPHY_CNTRL] = 0x24,
[REG_CROSSBAR] = 0xc8,
- [REG_RGMII_0_CNTRL] = 0xe0,
- [REG_RGMII_1_CNTRL] = 0xec,
- [REG_RGMII_2_CNTRL] = 0xf8,
+ [REG_RGMII_11_CNTRL] = 0x014c,
[REG_LED_0_CNTRL] = 0x40,
[REG_LED_1_CNTRL] = 0x4c,
[REG_LED_2_CNTRL] = 0x58,
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -21,6 +21,7 @@ enum bcm_sf2_reg_offs {
REG_RGMII_0_CNTRL,
REG_RGMII_1_CNTRL,
REG_RGMII_2_CNTRL,
+ REG_RGMII_11_CNTRL,
REG_LED_0_CNTRL,
REG_LED_1_CNTRL,
REG_LED_2_CNTRL,

209
target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch
View File

@ -1,209 +0,0 @@
From af30f8eaa8fe4ff1987280f716309711997bd979 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 29 Dec 2021 18:16:42 +0100
Subject: [PATCH] net: dsa: bcm_sf2: refactor LED regs access
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
1. Define more regs. Some switches (e.g. BCM4908) have up to 6 regs.
2. Add helper for handling non-lineral port <-> reg mappings.
3. Add support for 12 B LED reg blocks on BCM4908 (different layout)
Complete support for LEDs setup will be implemented once Linux receives
a proper design & implementation for "hardware" LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20211229171642.22942-1-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/bcm_sf2.c | 54 ++++++++++++++++++++++++----
drivers/net/dsa/bcm_sf2.h | 10 ++++++
drivers/net/dsa/bcm_sf2_regs.h | 65 +++++++++++++++++++++++++++++++---
3 files changed, 119 insertions(+), 10 deletions(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -31,6 +31,38 @@
#include "b53/b53_priv.h"
#include "b53/b53_regs.h"
+static u16 bcm_sf2_reg_led_base(struct bcm_sf2_priv *priv, int port)
+{
+ switch (port) {
+ case 0:
+ return REG_LED_0_CNTRL;
+ case 1:
+ return REG_LED_1_CNTRL;
+ case 2:
+ return REG_LED_2_CNTRL;
+ }
+
+ switch (priv->type) {
+ case BCM4908_DEVICE_ID:
+ switch (port) {
+ case 3:
+ return REG_LED_3_CNTRL;
+ case 7:
+ return REG_LED_4_CNTRL;
+ default:
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+
+ WARN_ONCE(1, "Unsupported port %d\n", port);
+
+ /* RO fallback reg */
+ return REG_SWITCH_STATUS;
+}
+
static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port)
{
switch (priv->type) {
@@ -141,9 +173,14 @@ static void bcm_sf2_gphy_enable_set(stru
/* Use PHY-driven LED signaling */
if (!enable) {
- reg = reg_readl(priv, REG_LED_CNTRL(0));
- reg |= SPDLNK_SRC_SEL;
- reg_writel(priv, reg, REG_LED_CNTRL(0));
+ u16 led_ctrl = bcm_sf2_reg_led_base(priv, 0);
+
+ if (priv->type == BCM7278_DEVICE_ID ||
+ priv->type == BCM7445_DEVICE_ID) {
+ reg = reg_led_readl(priv, led_ctrl, 0);
+ reg |= LED_CNTRL_SPDLNK_SRC_SEL;
+ reg_led_writel(priv, reg, led_ctrl, 0);
+ }
}
}
@@ -1085,9 +1122,14 @@ static const u16 bcm_sf2_4908_reg_offset
[REG_SPHY_CNTRL] = 0x24,
[REG_CROSSBAR] = 0xc8,
[REG_RGMII_11_CNTRL] = 0x014c,
- [REG_LED_0_CNTRL] = 0x40,
- [REG_LED_1_CNTRL] = 0x4c,
- [REG_LED_2_CNTRL] = 0x58,
+ [REG_LED_0_CNTRL] = 0x40,
+ [REG_LED_1_CNTRL] = 0x4c,
+ [REG_LED_2_CNTRL] = 0x58,
+ [REG_LED_3_CNTRL] = 0x64,
+ [REG_LED_4_CNTRL] = 0x88,
+ [REG_LED_5_CNTRL] = 0xa0,
+ [REG_LED_AGGREGATE_CTRL] = 0xb8,
+
};
static const struct bcm_sf2_of_data bcm_sf2_4908_data = {
--- a/drivers/net/dsa/bcm_sf2.h
+++ b/drivers/net/dsa/bcm_sf2.h
@@ -203,6 +203,16 @@ SF2_IO_MACRO(acb);
SWITCH_INTR_L2(0);
SWITCH_INTR_L2(1);
+static inline u32 reg_led_readl(struct bcm_sf2_priv *priv, u16 off, u16 reg)
+{
+ return readl_relaxed(priv->reg + priv->reg_offsets[off] + reg);
+}
+
+static inline void reg_led_writel(struct bcm_sf2_priv *priv, u32 val, u16 off, u16 reg)
+{
+ writel_relaxed(val, priv->reg + priv->reg_offsets[off] + reg);
+}
+
/* RXNFC */
int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
struct ethtool_rxnfc *nfc, u32 *rule_locs);
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -25,6 +25,10 @@ enum bcm_sf2_reg_offs {
REG_LED_0_CNTRL,
REG_LED_1_CNTRL,
REG_LED_2_CNTRL,
+ REG_LED_3_CNTRL,
+ REG_LED_4_CNTRL,
+ REG_LED_5_CNTRL,
+ REG_LED_AGGREGATE_CTRL,
REG_SWITCH_REG_MAX,
};
@@ -56,6 +60,63 @@ enum bcm_sf2_reg_offs {
#define CROSSBAR_BCM4908_EXT_GPHY4 1
#define CROSSBAR_BCM4908_EXT_RGMII 2
+/* Relative to REG_LED_*_CNTRL (BCM7278, BCM7445) */
+#define LED_CNTRL_NO_LINK_ENCODE_SHIFT 0
+#define LED_CNTRL_M10_ENCODE_SHIFT 2
+#define LED_CNTRL_M100_ENCODE_SHIFT 4
+#define LED_CNTRL_M1000_ENCODE_SHIFT 6
+#define LED_CNTRL_SEL_NO_LINK_ENCODE_SHIFT 8
+#define LED_CNTRL_SEL_10M_ENCODE_SHIFT 10
+#define LED_CNTRL_SEL_100M_ENCODE_SHIFT 12
+#define LED_CNTRL_SEL_1000M_ENCODE_SHIFT 14
+#define LED_CNTRL_RX_DV_EN (1 << 16)
+#define LED_CNTRL_TX_EN_EN (1 << 17)
+#define LED_CNTRL_SPDLNK_LED0_ACT_SEL_SHIFT 18
+#define LED_CNTRL_SPDLNK_LED1_ACT_SEL_SHIFT 20
+#define LED_CNTRL_ACT_LED_ACT_SEL_SHIFT 22
+#define LED_CNTRL_SPDLNK_SRC_SEL (1 << 24)
+#define LED_CNTRL_SPDLNK_LED0_ACT_POL_SEL (1 << 25)
+#define LED_CNTRL_SPDLNK_LED1_ACT_POL_SEL (1 << 26)
+#define LED_CNTRL_ACT_LED_POL_SEL (1 << 27)
+#define LED_CNTRL_MASK 0x3
+
+/* Register relative to REG_LED_*_CNTRL (BCM4908) */
+#define REG_LED_CTRL 0x0
+#define LED_CTRL_RX_ACT_EN 0x00000001
+#define LED_CTRL_TX_ACT_EN 0x00000002
+#define LED_CTRL_SPDLNK_LED0_ACT_SEL 0x00000004
+#define LED_CTRL_SPDLNK_LED1_ACT_SEL 0x00000008
+#define LED_CTRL_SPDLNK_LED2_ACT_SEL 0x00000010
+#define LED_CTRL_ACT_LED_ACT_SEL 0x00000020
+#define LED_CTRL_SPDLNK_LED0_ACT_POL_SEL 0x00000040
+#define LED_CTRL_SPDLNK_LED1_ACT_POL_SEL 0x00000080
+#define LED_CTRL_SPDLNK_LED2_ACT_POL_SEL 0x00000100
+#define LED_CTRL_ACT_LED_POL_SEL 0x00000200
+#define LED_CTRL_LED_SPD_OVRD 0x00001c00
+#define LED_CTRL_LNK_STATUS_OVRD 0x00002000
+#define LED_CTRL_SPD_OVRD_EN 0x00004000
+#define LED_CTRL_LNK_OVRD_EN 0x00008000
+
+/* Register relative to REG_LED_*_CNTRL (BCM4908) */
+#define REG_LED_LINK_SPEED_ENC_SEL 0x4
+#define LED_LINK_SPEED_ENC_SEL_NO_LINK_SHIFT 0
+#define LED_LINK_SPEED_ENC_SEL_10M_SHIFT 3
+#define LED_LINK_SPEED_ENC_SEL_100M_SHIFT 6
+#define LED_LINK_SPEED_ENC_SEL_1000M_SHIFT 9
+#define LED_LINK_SPEED_ENC_SEL_2500M_SHIFT 12
+#define LED_LINK_SPEED_ENC_SEL_10G_SHIFT 15
+#define LED_LINK_SPEED_ENC_SEL_MASK 0x7
+
+/* Register relative to REG_LED_*_CNTRL (BCM4908) */
+#define REG_LED_LINK_SPEED_ENC 0x8
+#define LED_LINK_SPEED_ENC_NO_LINK_SHIFT 0
+#define LED_LINK_SPEED_ENC_M10_SHIFT 3
+#define LED_LINK_SPEED_ENC_M100_SHIFT 6
+#define LED_LINK_SPEED_ENC_M1000_SHIFT 9
+#define LED_LINK_SPEED_ENC_M2500_SHIFT 12
+#define LED_LINK_SPEED_ENC_M10G_SHIFT 15
+#define LED_LINK_SPEED_ENC_MASK 0x7
+
/* Relative to REG_RGMII_CNTRL */
#define RGMII_MODE_EN (1 << 0)
#define ID_MODE_DIS (1 << 1)
@@ -73,10 +134,6 @@ enum bcm_sf2_reg_offs {
#define LPI_COUNT_SHIFT 9
#define LPI_COUNT_MASK 0x3F
-#define REG_LED_CNTRL(x) (REG_LED_0_CNTRL + (x))
-
-#define SPDLNK_SRC_SEL (1 << 24)
-
/* Register set relative to 'INTRL2_0' and 'INTRL2_1' */
#define INTRL2_CPU_STATUS 0x00
#define INTRL2_CPU_SET 0x04

31
target/linux/bcm4908/patches-5.4/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch
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@ -1,31 +0,0 @@
From f35a07f92616700733636c06dd6e5b6cdc807fe4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 25 Nov 2020 10:06:08 +0100
Subject: [PATCH] tty: serial: bcm63xx: lower driver dependencies
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Hardware supported by bcm63xx is also used by BCM4908 SoCs family that
is ARM64. In future more architectures may need it as well. There is
nothing arch specific breaking compilation so just stick to requiring
COMMON_CLK.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20201125090608.28442-1-zajec5@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/tty/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1125,7 +1125,7 @@ config SERIAL_TIMBERDALE
config SERIAL_BCM63XX
tristate "Broadcom BCM63xx/BCM33xx UART support"
select SERIAL_CORE
- depends on MIPS || ARM || COMPILE_TEST
+ depends on COMMON_CLK
help
This enables the driver for the onchip UART core found on
the following chipsets:

40
target/linux/bcm4908/patches-5.4/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch
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@ -1,40 +0,0 @@
From def26913b66fd94e431afecf28e09c08e8c02a35 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 27 Nov 2020 12:14:42 +0100
Subject: [PATCH] reset: simple: add BCM4908 MISC PCIe reset controller support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a trivial reset controller. One register with bit per PCIe core.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/reset/Kconfig | 2 +-
drivers/reset/reset-simple.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -129,7 +129,7 @@ config RESET_SCMI
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
- default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC
+ default ARCH_BCM4908 || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -127,6 +127,8 @@ static const struct of_device_id reset_s
{ .compatible = "aspeed,ast2500-lpc-reset" },
{ .compatible = "bitmain,bm1880-reset",
.data = &reset_simple_active_low },
+ { .compatible = "brcm,bcm4908-misc-pcie-reset",
+ .data = &reset_simple_active_low },
{ .compatible = "snps,dw-high-reset" },
{ .compatible = "snps,dw-low-reset",
.data = &reset_simple_active_low },

90
target/linux/bcm4908/patches-5.4/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch
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@ -1,90 +0,0 @@
From 82853543057f78d8a331272b70bc3f1e8cb0cbf4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 14 Dec 2020 19:07:42 +0100
Subject: [PATCH] dt-bindings: power: document Broadcom's PMB binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom's PMB is power controller used for disabling and enabling SoC
devices.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bindings/power/brcm,bcm-pmb.yaml | 50 +++++++++++++++++++
include/dt-bindings/soc/bcm-pmb.h | 11 ++++
2 files changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml
create mode 100644 include/dt-bindings/soc/bcm-pmb.h
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/brcm,bcm-pmb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom PMB (Power Management Bus) controller
+
+description: This document describes Broadcom's PMB controller. It supports
+ powering various types of connected devices (e.g. PCIe, USB, SATA).
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+properties:
+ compatible:
+ enum:
+ - brcm,bcm4908-pmb
+
+ reg:
+ description: register space of one or more buses
+ maxItems: 1
+
+ big-endian:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Flag to use for block working in big endian mode.
+
+ "#power-domain-cells":
+ description: cell specifies device ID (see bcm-pmb.h)
+ const: 1
+
+required:
+ - reg
+ - "#power-domain-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/soc/bcm-pmb.h>
+
+ pmb: power-controller@802800e0 {
+ compatible = "brcm,bcm4908-pmb";
+ reg = <0x802800e0 0x40>;
+ #power-domain-cells = <1>;
+ };
+
+ foo {
+ power-domains = <&pmb BCM_PMB_PCIE0>;
+ };
--- /dev/null
+++ b/include/dt-bindings/soc/bcm-pmb.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */
+
+#ifndef __DT_BINDINGS_SOC_BCM_PMB_H
+#define __DT_BINDINGS_SOC_BCM_PMB_H
+
+#define BCM_PMB_PCIE0 0x01
+#define BCM_PMB_PCIE1 0x02
+#define BCM_PMB_PCIE2 0x03
+#define BCM_PMB_HOST_USB 0x04
+
+#endif

414
target/linux/bcm4908/patches-5.4/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch
View File

@ -1,414 +0,0 @@
From 8bcac4011ebe0dbdd46fd55b036ee855c95702d3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 14 Dec 2020 19:07:43 +0100
Subject: [PATCH] soc: bcm: add PM driver for Broadcom's PMB
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
PMB originally comes from BCM63138 but can be also found on many other
chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like
PCIe, SATA, USB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
MAINTAINERS | 10 +
drivers/soc/bcm/Makefile | 2 +-
drivers/soc/bcm/bcm63xx/Kconfig | 9 +
drivers/soc/bcm/bcm63xx/Makefile | 1 +
drivers/soc/bcm/bcm63xx/bcm-pmb.c | 333 ++++++++++++++++++++++++++++++
5 files changed, 354 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/bcm/bcm63xx/bcm-pmb.c
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3415,6 +3415,16 @@ L: linux-mips@vger.kernel.org
S: Maintained
F: drivers/firmware/broadcom/*
+BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER
+M: Rafał Miłecki <rafal@milecki.pl>
+M: Florian Fainelli <f.fainelli@gmail.com>
+M: bcm-kernel-feedback-list@broadcom.com
+L: linux-pm@vger.kernel.org
+S: Maintained
+T: git git://github.com/broadcom/stblinux.git
+F: drivers/soc/bcm/bcm-pmb.c
+F: include/dt-bindings/soc/bcm-pmb.h
+
BROADCOM SPECIFIC AMBA DRIVER (BCMA)
M: Rafał Miłecki <zajec5@gmail.com>
L: linux-wireless@vger.kernel.org
--- /dev/null
+++ b/drivers/soc/bcm/bcm63xx/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config BCM_PMB
+ bool "Broadcom PMB (Power Management Bus) driver"
+ depends on ARCH_BCM4908 || (COMPILE_TEST && OF)
+ default ARCH_BCM4908
+ select PM_GENERIC_DOMAINS if PM
+ help
+ This enables support for the Broadcom's PMB (Power Management Bus) that
+ is used for disabling and enabling SoC devices.
--- /dev/null
+++ b/drivers/soc/bcm/bcm63xx/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_BCM_PMB) += bcm-pmb.o
--- /dev/null
+++ b/drivers/soc/bcm/bcm63xx/bcm-pmb.c
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2013 Broadcom
+ * Copyright (C) 2020 Rafał Miłecki <rafal@milecki.pl>
+ */
+
+#include <dt-bindings/soc/bcm-pmb.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/reset/bcm63xx_pmb.h>
+
+#define BPCM_ID_REG 0x00
+#define BPCM_CAPABILITIES 0x04
+#define BPCM_CAP_NUM_ZONES 0x000000ff
+#define BPCM_CAP_SR_REG_BITS 0x0000ff00
+#define BPCM_CAP_PLLTYPE 0x00030000
+#define BPCM_CAP_UBUS 0x00080000
+#define BPCM_CONTROL 0x08
+#define BPCM_STATUS 0x0c
+#define BPCM_ROSC_CONTROL 0x10
+#define BPCM_ROSC_THRESH_H 0x14
+#define BPCM_ROSC_THRESHOLD_BCM6838 0x14
+#define BPCM_ROSC_THRESH_S 0x18
+#define BPCM_ROSC_COUNT_BCM6838 0x18
+#define BPCM_ROSC_COUNT 0x1c
+#define BPCM_PWD_CONTROL_BCM6838 0x1c
+#define BPCM_PWD_CONTROL 0x20
+#define BPCM_SR_CONTROL_BCM6838 0x20
+#define BPCM_PWD_ACCUM_CONTROL 0x24
+#define BPCM_SR_CONTROL 0x28
+#define BPCM_GLOBAL_CONTROL 0x2c
+#define BPCM_MISC_CONTROL 0x30
+#define BPCM_MISC_CONTROL2 0x34
+#define BPCM_SGPHY_CNTL 0x38
+#define BPCM_SGPHY_STATUS 0x3c
+#define BPCM_ZONE0 0x40
+#define BPCM_ZONE_CONTROL 0x00
+#define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001
+#define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002
+#define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */
+#define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */
+#define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030
+#define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040
+#define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080
+#define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100
+#define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200
+#define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400
+#define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800
+#define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000
+#define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000
+#define BPCM_ZONE_CONTROL_RESERVED 0x0007c000
+#define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000
+#define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */
+#define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */
+#define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */
+#define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */
+#define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */
+#define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */
+#define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */
+#define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */
+#define BPCM_ZONE_CONFIG1 0x04
+#define BPCM_ZONE_CONFIG2 0x08
+#define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c
+#define BPCM_ZONE_SIZE 0x10
+
+struct bcm_pmb {
+ struct device *dev;
+ void __iomem *base;
+ spinlock_t lock;
+ bool little_endian;
+ struct genpd_onecell_data genpd_onecell_data;
+};
+
+struct bcm_pmb_pd_data {
+ const char * const name;
+ int id;
+ u8 bus;
+ u8 device;
+};
+
+struct bcm_pmb_pm_domain {
+ struct bcm_pmb *pmb;
+ const struct bcm_pmb_pd_data *data;
+ struct generic_pm_domain genpd;
+};
+
+static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device,
+ int offset, u32 *val)
+{
+ void __iomem *base = pmb->base + bus * 0x20;
+ unsigned long flags;
+ int err;
+
+ spin_lock_irqsave(&pmb->lock, flags);
+ err = bpcm_rd(base, device, offset, val);
+ spin_unlock_irqrestore(&pmb->lock, flags);
+
+ if (!err)
+ *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val);
+
+ return err;
+}
+
+static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device,
+ int offset, u32 val)
+{
+ void __iomem *base = pmb->base + bus * 0x20;
+ unsigned long flags;
+ int err;
+
+ val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val);
+
+ spin_lock_irqsave(&pmb->lock, flags);
+ err = bpcm_wr(base, device, offset, val);
+ spin_unlock_irqrestore(&pmb->lock, flags);
+
+ return err;
+}
+
+static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device,
+ int zone)
+{
+ int offset;
+ u32 val;
+ int err;
+
+ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
+
+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
+ if (err)
+ return err;
+
+ val |= BPCM_ZONE_CONTROL_PWR_DN_REQ;
+ val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ;
+
+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
+
+ return err;
+}
+
+static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device,
+ int zone)
+{
+ int offset;
+ u32 val;
+ int err;
+
+ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
+
+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
+ if (err)
+ return err;
+
+ if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) {
+ val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ;
+ val |= BPCM_ZONE_CONTROL_DPG_CTL_EN;
+ val |= BPCM_ZONE_CONTROL_PWR_UP_REQ;
+ val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN;
+ val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT;
+
+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
+ }
+
+ return err;
+}
+
+static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device)
+{
+ int offset;
+ u32 val;
+ int err;
+
+ /* Entire device can be powered off by powering off the 0th zone */
+ offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL;
+
+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
+ if (err)
+ return err;
+
+ if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) {
+ val = BPCM_ZONE_CONTROL_PWR_DN_REQ;
+
+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
+ }
+
+ return err;
+}
+
+static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device)
+{
+ u32 val;
+ int err;
+ int i;
+
+ err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val);
+ if (err)
+ return err;
+
+ for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) {
+ err = bcm_pmb_power_on_zone(pmb, bus, device, i);
+ if (err)
+ return err;
+ }
+
+ return err;
+}
+
+static int bcm_pmb_power_on(struct generic_pm_domain *genpd)
+{
+ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
+ const struct bcm_pmb_pd_data *data = pd->data;
+ struct bcm_pmb *pmb = pd->pmb;
+
+ switch (data->id) {
+ case BCM_PMB_PCIE0:
+ case BCM_PMB_PCIE1:
+ case BCM_PMB_PCIE2:
+ return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0);
+ case BCM_PMB_HOST_USB:
+ return bcm_pmb_power_on_device(pmb, data->bus, data->device);
+ default:
+ dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
+ return -EINVAL;
+ }
+}
+
+static int bcm_pmb_power_off(struct generic_pm_domain *genpd)
+{
+ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
+ const struct bcm_pmb_pd_data *data = pd->data;
+ struct bcm_pmb *pmb = pd->pmb;
+
+ switch (data->id) {
+ case BCM_PMB_PCIE0:
+ case BCM_PMB_PCIE1:
+ case BCM_PMB_PCIE2:
+ return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0);
+ case BCM_PMB_HOST_USB:
+ return bcm_pmb_power_off_device(pmb, data->bus, data->device);
+ default:
+ dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
+ return -EINVAL;
+ }
+}
+
+static int bcm_pmb_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct bcm_pmb_pd_data *table;
+ const struct bcm_pmb_pd_data *e;
+ struct resource *res;
+ struct bcm_pmb *pmb;
+ int max_id;
+ int err;
+
+ pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL);
+ if (!pmb)
+ return -ENOMEM;
+
+ pmb->dev = dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pmb->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pmb->base))
+ return PTR_ERR(pmb->base);
+
+ spin_lock_init(&pmb->lock);
+
+ pmb->little_endian = !of_device_is_big_endian(dev->of_node);
+
+ table = of_device_get_match_data(dev);
+ if (!table)
+ return -EINVAL;
+
+ max_id = 0;
+ for (e = table; e->name; e++)
+ max_id = max(max_id, e->id);
+
+ pmb->genpd_onecell_data.num_domains = max_id + 1;
+ pmb->genpd_onecell_data.domains =
+ devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains,
+ sizeof(struct generic_pm_domain *), GFP_KERNEL);
+ if (!pmb->genpd_onecell_data.domains)
+ return -ENOMEM;
+
+ for (e = table; e->name; e++) {
+ struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
+
+ pd->pmb = pmb;
+ pd->data = e;
+ pd->genpd.name = e->name;
+ pd->genpd.power_on = bcm_pmb_power_on;
+ pd->genpd.power_off = bcm_pmb_power_off;
+
+ pm_genpd_init(&pd->genpd, NULL, true);
+ pmb->genpd_onecell_data.domains[e->id] = &pd->genpd;
+ }
+
+ err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data);
+ if (err) {
+ dev_err(dev, "failed to add genpd provider: %d\n", err);
+ return err;
+ }
+
+ return 0;
+}
+
+static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = {
+ { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, },
+ { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, },
+ { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, },
+ { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, },
+ { },
+};
+
+static const struct of_device_id bcm_pmb_of_match[] = {
+ { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, },
+ { },
+};
+
+static struct platform_driver bcm_pmb_driver = {
+ .driver = {
+ .name = "bcm-pmb",
+ .of_match_table = bcm_pmb_of_match,
+ },
+ .probe = bcm_pmb_probe,
+};
+
+builtin_platform_driver(bcm_pmb_driver);
--- a/drivers/soc/bcm/Kconfig
+++ b/drivers/soc/bcm/Kconfig
@@ -33,6 +33,7 @@ config SOC_BRCMSTB
If unsure, say N.
+source "drivers/soc/bcm/bcm63xx/Kconfig"
source "drivers/soc/bcm/brcmstb/Kconfig"
endmenu
--- a/drivers/soc/bcm/Makefile
+++ b/drivers/soc/bcm/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o
obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
+obj-y += bcm63xx/
obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/

63
target/linux/bcm4908/patches-5.4/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch
View File

@ -1,63 +0,0 @@
From 149ae80b1d50e7db5ac7df1cdf0820017b70e716 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 14 Jan 2021 11:53:18 +0100
Subject: [PATCH] soc: bcm: brcmstb: add stubs for getting platform IDs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some brcmstb drivers may be shared with other SoC families. E.g. the
same USB PHY block is shared by brcmstb and BCM4908.
To avoid building brcmstb common code on non-brcmstb platforms we need
stubs for:
1. brcmstb_get_family_id()
2. brcmstb_get_product_id()
(to avoid "undefined reference to" errors).
With this change PHY_BRCM_USB will not have to unconditionally select
SOC_BRCMSTB anymore.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
include/linux/soc/brcmstb/brcmstb.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
--- a/include/linux/soc/brcmstb/brcmstb.h
+++ b/include/linux/soc/brcmstb/brcmstb.h
@@ -2,6 +2,8 @@
#ifndef __BRCMSTB_SOC_H
#define __BRCMSTB_SOC_H
+#include <linux/kconfig.h>
+
static inline u32 BRCM_ID(u32 reg)
{
return reg >> 28 ? reg >> 16 : reg >> 8;
@@ -12,6 +14,8 @@ static inline u32 BRCM_REV(u32 reg)
return reg & 0xff;
}
+#if IS_ENABLED(CONFIG_SOC_BRCMSTB)
+
/*
* Helper functions for getting family or product id from the
* SoC driver.
@@ -19,4 +23,16 @@ static inline u32 BRCM_REV(u32 reg)
u32 brcmstb_get_family_id(void);
u32 brcmstb_get_product_id(void);
+#else
+static inline u32 brcmstb_get_family_id(void)
+{
+ return 0;
+}
+
+static inline u32 brcmstb_get_product_id(void)
+{
+ return 0;
+}
+#endif
+
#endif /* __BRCMSTB_SOC_H */

286
target/linux/bcm4908/patches-5.4/083-v5.5-0001-phy-phy-brcm-usb-init-fix-__iomem-annotations.patch
View File

@ -1,286 +0,0 @@
From e4b957d3a7c74749e2ccfb3dedb63b81e84b292c Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@codethink.co.uk>
Date: Tue, 15 Oct 2019 17:03:31 +0100
Subject: [PATCH] phy: phy-brcm-usb-init: fix __iomem annotations
The register address should have __iomem attributes
so fix this to remove the following sparse warnings:
drivers/phy/broadcom/phy-brcm-usb-init.c:459:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:459:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:459:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:459:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:461:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:461:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:461:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:461:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:465:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:465:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:465:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:465:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:469:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:469:30: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:469:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:469:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:478:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:478:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:478:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:478:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:480:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:480:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:480:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:480:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:485:30: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:485:30: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:485:30: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:485:30: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:494:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:494:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:494:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:494:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:495:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:495:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:495:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:495:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:498:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:498:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:498:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:498:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:501:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:501:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:501:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:501:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:613:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:613:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:613:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:613:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:640:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:640:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:640:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:640:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:710:64: warning: Using plain integer as NULL pointer
drivers/phy/broadcom/phy-brcm-usb-init.c:712:32: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:712:32: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:712:32: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:712:32: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:713:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:713:29: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:713:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:713:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:717:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:717:29: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:717:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:717:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:720:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:720:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:720:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:720:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:721:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:721:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:721:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:721:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:794:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:794:29: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:794:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:794:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:813:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:813:29: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:813:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:813:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:829:37: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:829:37: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:829:37: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:829:37: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:843:37: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:843:37: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:843:37: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:843:37: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:847:37: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:847:37: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:847:37: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:847:37: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:878:9: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:878:9: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:878:9: expected void [noderef] <asn:2> *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:878:9: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:880:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:880:29: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:880:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:880:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:896:29: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:896:29: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:896:29: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:896:29: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:901:37: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:901:37: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:901:37: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:901:37: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:905:37: warning: cast removes address space '<asn:2>' of expression
drivers/phy/broadcom/phy-brcm-usb-init.c:905:37: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:905:37: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:905:37: got void *
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:423:52: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: warning: incorrect type in assignment (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: expected void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:434:13: got void [noderef] <asn:2> *
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: warning: incorrect type in argument 1 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:38: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: warning: incorrect type in argument 2 (different address spaces)
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: expected void [noderef] <asn:2> *addr
drivers/phy/broadcom/phy-brcm-usb-init.c:435:51: got void *reg
drivers/phy/broadcom/phy-brcm-usb-init.c:422:13: warning: too many warnings
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -126,8 +126,8 @@ enum {
USB_CTRL_SELECTOR_COUNT,
};
-#define USB_CTRL_REG(base, reg) ((void *)base + USB_CTRL_##reg)
-#define USB_XHCI_EC_REG(base, reg) ((void *)base + USB_XHCI_EC_##reg)
+#define USB_CTRL_REG(base, reg) ((void __iomem *)base + USB_CTRL_##reg)
+#define USB_XHCI_EC_REG(base, reg) ((void __iomem *)base + USB_XHCI_EC_##reg)
#define USB_CTRL_MASK(reg, field) \
USB_CTRL_##reg##_##field##_MASK
#define USB_CTRL_MASK_FAMILY(params, reg, field) \
@@ -416,7 +416,7 @@ void usb_ctrl_unset_family(struct brcm_u
u32 reg_offset, u32 field)
{
u32 mask;
- void *reg;
+ void __iomem *reg;
mask = params->usb_reg_bits_map[field];
reg = params->ctrl_regs + reg_offset;
@@ -428,7 +428,7 @@ void usb_ctrl_set_family(struct brcm_usb
u32 reg_offset, u32 field)
{
u32 mask;
- void *reg;
+ void __iomem *reg;
mask = params->usb_reg_bits_map[field];
reg = params->ctrl_regs + reg_offset;

26
target/linux/bcm4908/patches-5.4/083-v5.5-0002-phy-phy-brcm-usb-init-fix-use-of-integer-as-pointer.patch
View File

@ -1,26 +0,0 @@
From 1025cb924bd517f3c458f36973582d4c2adedd6a Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@codethink.co.uk>
Date: Tue, 15 Oct 2019 17:03:32 +0100
Subject: [PATCH] phy: phy-brcm-usb-init: fix use of integer as pointer
The xhci_ec_base variable is a pointer, so don't compare
it with an integer.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -707,7 +707,7 @@ static void brcmusb_usb3_otp_fix(struct
void __iomem *xhci_ec_base = params->xhci_ec_regs;
u32 val;
- if (params->family_id != 0x74371000 || xhci_ec_base == 0)
+ if (params->family_id != 0x74371000 || !xhci_ec_base)
return;
brcmusb_writel(0xa20c, USB_XHCI_EC_REG(xhci_ec_base, IRAADR));
val = brcmusb_readl(USB_XHCI_EC_REG(xhci_ec_base, IRADAT));

61
target/linux/bcm4908/patches-5.4/084-v5.6-0001-phy-usb-EHCI-DMA-may-lose-a-burst-of-DMA-data-for-72.patch
View File

@ -1,61 +0,0 @@
From dc9aa43c43668481089c48135707ec3f8f5b2e19 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:17:59 -0500
Subject: [PATCH] phy: usb: EHCI DMA may lose a burst of DMA data for 7255xA0
family
When the EHCI controller received a 512 byte USB packet that
had to be broken into 2 256 byte bursts across the SCB bus AND
there was a following 512 byte USB packet, the second burst of
data from the first packet was sometimes being lost. If the
burst size was changed to 128 bytes via the EBR_SCB_SIZE field
in the USB_CTRL_EBRIDGE register we'd see the 4th 128 byte burst
of the first packet being lost. This problem became much worse
if other threads were running that accessed memory, like a memcpy
test. Setting the EBR_SCB_SIZE to 512, which prevents breaking
the EHCI USB packet (max size of 512 bytes) into bursts, fixed
the problem.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -42,6 +42,7 @@
#define USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 /* option */
#define USB_CTRL_EBRIDGE 0x0c
#define USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 /* option */
+#define USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 /* option */
#define USB_CTRL_OBRIDGE 0x10
#define USB_CTRL_OBRIDGE_LS_KEEP_ALIVE_MASK 0x08000000
#define USB_CTRL_MDIO 0x14
@@ -176,6 +177,7 @@ static const struct id_to_type id_to_typ
{ 0x33900000, BRCM_FAMILY_3390A0 },
{ 0x72500010, BRCM_FAMILY_7250B0 },
{ 0x72600000, BRCM_FAMILY_7260A0 },
+ { 0x72550000, BRCM_FAMILY_7260A0 },
{ 0x72680000, BRCM_FAMILY_7271A0 },
{ 0x72710000, BRCM_FAMILY_7271A0 },
{ 0x73640000, BRCM_FAMILY_7364A0 },
@@ -948,6 +950,17 @@ void brcm_usb_init_eohci(struct brcm_usb
if (params->selected_family == BRCM_FAMILY_7271A0)
/* Enable LS keep alive fix for certain keyboards */
USB_CTRL_SET(ctrl, OBRIDGE, LS_KEEP_ALIVE);
+
+ if (params->family_id == 0x72550000) {
+ /*
+ * Make the burst size 512 bytes to fix a hardware bug
+ * on the 7255a0. See HW7255-24.
+ */
+ reg = brcmusb_readl(USB_CTRL_REG(ctrl, EBRIDGE));
+ reg &= ~USB_CTRL_MASK(EBRIDGE, EBR_SCB_SIZE);
+ reg |= 0x800;
+ brcmusb_writel(reg, USB_CTRL_REG(ctrl, EBRIDGE));
+ }
}
void brcm_usb_init_xhci(struct brcm_usb_init_params *params)

102
target/linux/bcm4908/patches-5.4/084-v5.6-0002-phy-usb-Get-all-drivers-that-use-USB-clks-using-corr.patch
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@ -1,102 +0,0 @@
From ece5ffd9e15e9c8471e58b581a098032a679d34e Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:00 -0500
Subject: [PATCH] phy: usb: Get all drivers that use USB clks using correct
enable/disable
The BRCM USB Phy, ohci, ehci and xhci drivers all use the USB clocks
but not all drivers use the clk_prepare_enable/clk_disable_unprepare
versions to enable/disable the clocks. This change gets all drivers
using the prepare version.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -74,8 +74,8 @@ static int brcm_usb_phy_init(struct phy
*/
mutex_lock(&priv->mutex);
if (priv->init_count++ == 0) {
- clk_enable(priv->usb_20_clk);
- clk_enable(priv->usb_30_clk);
+ clk_prepare_enable(priv->usb_20_clk);
+ clk_prepare_enable(priv->usb_30_clk);
brcm_usb_init_common(&priv->ini);
}
mutex_unlock(&priv->mutex);
@@ -106,8 +106,8 @@ static int brcm_usb_phy_exit(struct phy
mutex_lock(&priv->mutex);
if (--priv->init_count == 0) {
brcm_usb_uninit_common(&priv->ini);
- clk_disable(priv->usb_20_clk);
- clk_disable(priv->usb_30_clk);
+ clk_disable_unprepare(priv->usb_20_clk);
+ clk_disable_unprepare(priv->usb_30_clk);
}
mutex_unlock(&priv->mutex);
phy->inited = false;
@@ -360,8 +360,8 @@ static int brcm_usb_phy_probe(struct pla
if (priv->has_eohci)
brcm_usb_uninit_eohci(&priv->ini);
brcm_usb_uninit_common(&priv->ini);
- clk_disable(priv->usb_20_clk);
- clk_disable(priv->usb_30_clk);
+ clk_disable_unprepare(priv->usb_20_clk);
+ clk_disable_unprepare(priv->usb_30_clk);
phy_provider = devm_of_phy_provider_register(dev, brcm_usb_phy_xlate);
@@ -381,8 +381,8 @@ static int brcm_usb_phy_suspend(struct d
struct brcm_usb_phy_data *priv = dev_get_drvdata(dev);
if (priv->init_count) {
- clk_disable(priv->usb_20_clk);
- clk_disable(priv->usb_30_clk);
+ clk_disable_unprepare(priv->usb_20_clk);
+ clk_disable_unprepare(priv->usb_30_clk);
}
return 0;
}
@@ -391,8 +391,8 @@ static int brcm_usb_phy_resume(struct de
{
struct brcm_usb_phy_data *priv = dev_get_drvdata(dev);
- clk_enable(priv->usb_20_clk);
- clk_enable(priv->usb_30_clk);
+ clk_prepare_enable(priv->usb_20_clk);
+ clk_prepare_enable(priv->usb_30_clk);
brcm_usb_init_ipp(&priv->ini);
/*
@@ -405,13 +405,13 @@ static int brcm_usb_phy_resume(struct de
brcm_usb_init_eohci(&priv->ini);
} else if (priv->has_eohci) {
brcm_usb_uninit_eohci(&priv->ini);
- clk_disable(priv->usb_20_clk);
+ clk_disable_unprepare(priv->usb_20_clk);
}
if (priv->phys[BRCM_USB_PHY_3_0].inited) {
brcm_usb_init_xhci(&priv->ini);
} else if (priv->has_xhci) {
brcm_usb_uninit_xhci(&priv->ini);
- clk_disable(priv->usb_30_clk);
+ clk_disable_unprepare(priv->usb_30_clk);
}
} else {
if (priv->has_xhci)
@@ -419,8 +419,8 @@ static int brcm_usb_phy_resume(struct de
if (priv->has_eohci)
brcm_usb_uninit_eohci(&priv->ini);
brcm_usb_uninit_common(&priv->ini);
- clk_disable(priv->usb_20_clk);
- clk_disable(priv->usb_30_clk);
+ clk_disable_unprepare(priv->usb_20_clk);
+ clk_disable_unprepare(priv->usb_30_clk);
}
return 0;

51
target/linux/bcm4908/patches-5.4/084-v5.6-0003-phy-usb-Put-USB-phys-into-IDDQ-on-suspend-to-save-po.patch
View File

@ -1,51 +0,0 @@
From 6597af4e4835ec0709638d48f73c11b5c624790f Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:01 -0500
Subject: [PATCH] phy: usb: Put USB phys into IDDQ on suspend to save power in
S2 mode
Currently the Phy driver will put the USB phys into the max
power saving mode (IDDQ) when there is no corresponding XHCI, EHCI
or OHCI client (through rmmod, unbind or if the driver is not
builtin). This change will also put the Phys into IDDQ mode
on suspend so that S2 will get the additional power savings.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 2 --
drivers/phy/broadcom/phy-brcm-usb.c | 11 +++++++++--
2 files changed, 9 insertions(+), 4 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -1002,8 +1002,6 @@ void brcm_usb_uninit_common(struct brcm_
void brcm_usb_uninit_eohci(struct brcm_usb_init_params *params)
{
- if (USB_CTRL_MASK_FAMILY(params, USB_PM, USB20_HC_RESETB))
- USB_CTRL_UNSET_FAMILY(params, USB_PM, USB20_HC_RESETB);
}
void brcm_usb_uninit_xhci(struct brcm_usb_init_params *params)
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -381,8 +381,15 @@ static int brcm_usb_phy_suspend(struct d
struct brcm_usb_phy_data *priv = dev_get_drvdata(dev);
if (priv->init_count) {
- clk_disable_unprepare(priv->usb_20_clk);
- clk_disable_unprepare(priv->usb_30_clk);
+ if (priv->phys[BRCM_USB_PHY_3_0].inited)
+ brcm_usb_uninit_xhci(&priv->ini);
+ if (priv->phys[BRCM_USB_PHY_2_0].inited)
+ brcm_usb_uninit_eohci(&priv->ini);
+ brcm_usb_uninit_common(&priv->ini);
+ if (priv->phys[BRCM_USB_PHY_3_0].inited)
+ clk_disable_unprepare(priv->usb_30_clk);
+ if (priv->phys[BRCM_USB_PHY_2_0].inited)
+ clk_disable_unprepare(priv->usb_20_clk);
}
return 0;
}

205
target/linux/bcm4908/patches-5.4/084-v5.6-0004-phy-usb-Add-wake-on-functionality.patch
View File

@ -1,205 +0,0 @@
From f1c0db40a3ade1f1a39e5794d728f2953d817322 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:02 -0500
Subject: [PATCH] phy: usb: Add "wake on" functionality
Add the ability to handle USB wake events from USB devices when
in S2 mode. Typically there is some additional configuration
needed to tell the USB device to generate the wake event when
suspended but this varies with the different USB device classes.
For example, on USB Ethernet dongles, ethtool should be used to
enable the magic packet wake functionality in the dongle.
NOTE: This requires that the "power/wakeup" sysfs entry for
the USB device generating the wakeup be set to "enabled".
This functionality requires a special hardware sideband path that
will trigger the AON_PM_L2 interrupt needed to wake the system from
S2 even though the USB host controllers are in IDDQ (low power state)
and most USB related clocks are shut off. For the sideband signaling
to work we need to leave the usbx_freerun clock running, but this
clock consumes very little power by design. There's a bug in the
XHCI wake hardware so only EHCI/OHCI wake is currently supported.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 17 +++++++++
drivers/phy/broadcom/phy-brcm-usb-init.h | 1 +
drivers/phy/broadcom/phy-brcm-usb.c | 48 ++++++++++++++++++++++--
3 files changed, 63 insertions(+), 3 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -58,6 +58,8 @@
#define USB_CTRL_USB_PM_SOFT_RESET_MASK 0x40000000 /* option */
#define USB_CTRL_USB_PM_USB20_HC_RESETB_MASK 0x30000000 /* option */
#define USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK 0x00300000 /* option */
+#define USB_CTRL_USB_PM_RMTWKUP_EN_MASK 0x00000001
+#define USB_CTRL_USB_PM_STATUS 0x38
#define USB_CTRL_USB30_CTL1 0x60
#define USB_CTRL_USB30_CTL1_PHY3_PLL_SEQ_START_MASK 0x00000010
#define USB_CTRL_USB30_CTL1_PHY3_RESETB_MASK 0x00010000
@@ -855,6 +857,10 @@ void brcm_usb_init_common(struct brcm_us
u32 reg;
void __iomem *ctrl = params->ctrl_regs;
+ /* Clear any pending wake conditions */
+ reg = brcmusb_readl(USB_CTRL_REG(ctrl, USB_PM_STATUS));
+ brcmusb_writel(reg, USB_CTRL_REG(ctrl, USB_PM_STATUS));
+
/* Take USB out of power down */
if (USB_CTRL_MASK_FAMILY(params, PLL_CTL, PLL_IDDQ_PWRDN)) {
USB_CTRL_UNSET_FAMILY(params, PLL_CTL, PLL_IDDQ_PWRDN);
@@ -1010,6 +1016,17 @@ void brcm_usb_uninit_xhci(struct brcm_us
USB_CTRL_SET(params->ctrl_regs, USB30_PCTL, PHY3_IDDQ_OVERRIDE);
}
+void brcm_usb_wake_enable(struct brcm_usb_init_params *params,
+ int enable)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+
+ if (enable)
+ USB_CTRL_SET(ctrl, USB_PM, RMTWKUP_EN);
+ else
+ USB_CTRL_UNSET(ctrl, USB_PM, RMTWKUP_EN);
+}
+
void brcm_usb_set_family_map(struct brcm_usb_init_params *params)
{
int fam;
--- a/drivers/phy/broadcom/phy-brcm-usb-init.h
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
@@ -38,5 +38,6 @@ void brcm_usb_init_xhci(struct brcm_usb_
void brcm_usb_uninit_common(struct brcm_usb_init_params *ini);
void brcm_usb_uninit_eohci(struct brcm_usb_init_params *ini);
void brcm_usb_uninit_xhci(struct brcm_usb_init_params *ini);
+void brcm_usb_wake_enable(struct brcm_usb_init_params *params, int enable);
#endif /* _USB_BRCM_COMMON_INIT_H */
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -57,11 +57,22 @@ struct brcm_usb_phy_data {
bool has_xhci;
struct clk *usb_20_clk;
struct clk *usb_30_clk;
+ struct clk *suspend_clk;
struct mutex mutex; /* serialize phy init */
int init_count;
+ int wake_irq;
struct brcm_usb_phy phys[BRCM_USB_PHY_ID_MAX];
};
+static irqreturn_t brcm_usb_phy_wake_isr(int irq, void *dev_id)
+{
+ struct phy *gphy = dev_id;
+
+ pm_wakeup_event(&gphy->dev, 0);
+
+ return IRQ_HANDLED;
+}
+
static int brcm_usb_phy_init(struct phy *gphy)
{
struct brcm_usb_phy *phy = phy_get_drvdata(gphy);
@@ -76,6 +87,7 @@ static int brcm_usb_phy_init(struct phy
if (priv->init_count++ == 0) {
clk_prepare_enable(priv->usb_20_clk);
clk_prepare_enable(priv->usb_30_clk);
+ clk_prepare_enable(priv->suspend_clk);
brcm_usb_init_common(&priv->ini);
}
mutex_unlock(&priv->mutex);
@@ -108,6 +120,7 @@ static int brcm_usb_phy_exit(struct phy
brcm_usb_uninit_common(&priv->ini);
clk_disable_unprepare(priv->usb_20_clk);
clk_disable_unprepare(priv->usb_30_clk);
+ clk_disable_unprepare(priv->suspend_clk);
}
mutex_unlock(&priv->mutex);
phy->inited = false;
@@ -228,11 +241,12 @@ static const struct attribute_group brcm
.attrs = brcm_usb_phy_attrs,
};
-static int brcm_usb_phy_dvr_init(struct device *dev,
+static int brcm_usb_phy_dvr_init(struct platform_device *pdev,
struct brcm_usb_phy_data *priv,
struct device_node *dn)
{
- struct phy *gphy;
+ struct device *dev = &pdev->dev;
+ struct phy *gphy = NULL;
int err;
priv->usb_20_clk = of_clk_get_by_name(dn, "sw_usb");
@@ -275,6 +289,28 @@ static int brcm_usb_phy_dvr_init(struct
if (err)
return err;
}
+
+ priv->suspend_clk = clk_get(dev, "usb0_freerun");
+ if (IS_ERR(priv->suspend_clk)) {
+ dev_err(dev, "Suspend Clock not found in Device Tree\n");
+ priv->suspend_clk = NULL;
+ }
+
+ priv->wake_irq = platform_get_irq_byname(pdev, "wake");
+ if (priv->wake_irq < 0)
+ priv->wake_irq = platform_get_irq_byname(pdev, "wakeup");
+ if (priv->wake_irq >= 0) {
+ err = devm_request_irq(dev, priv->wake_irq,
+ brcm_usb_phy_wake_isr, 0,
+ dev_name(dev), gphy);
+ if (err < 0)
+ return err;
+ device_set_wakeup_capable(dev, 1);
+ } else {
+ dev_info(dev,
+ "Wake interrupt missing, system wake not supported\n");
+ }
+
return 0;
}
@@ -335,7 +371,7 @@ static int brcm_usb_phy_probe(struct pla
if (of_property_read_bool(dn, "brcm,has-eohci"))
priv->has_eohci = true;
- err = brcm_usb_phy_dvr_init(dev, priv, dn);
+ err = brcm_usb_phy_dvr_init(pdev, priv, dn);
if (err)
return err;
@@ -386,10 +422,13 @@ static int brcm_usb_phy_suspend(struct d
if (priv->phys[BRCM_USB_PHY_2_0].inited)
brcm_usb_uninit_eohci(&priv->ini);
brcm_usb_uninit_common(&priv->ini);
+ brcm_usb_wake_enable(&priv->ini, true);
if (priv->phys[BRCM_USB_PHY_3_0].inited)
clk_disable_unprepare(priv->usb_30_clk);
if (priv->phys[BRCM_USB_PHY_2_0].inited)
clk_disable_unprepare(priv->usb_20_clk);
+ if (priv->wake_irq >= 0)
+ enable_irq_wake(priv->wake_irq);
}
return 0;
}
@@ -400,6 +439,7 @@ static int brcm_usb_phy_resume(struct de
clk_prepare_enable(priv->usb_20_clk);
clk_prepare_enable(priv->usb_30_clk);
+ brcm_usb_wake_enable(&priv->ini, false);
brcm_usb_init_ipp(&priv->ini);
/*
@@ -407,6 +447,8 @@ static int brcm_usb_phy_resume(struct de
* Uninitialize anything that wasn't previously initialized.
*/
if (priv->init_count) {
+ if (priv->wake_irq >= 0)
+ disable_irq_wake(priv->wake_irq);
brcm_usb_init_common(&priv->ini);
if (priv->phys[BRCM_USB_PHY_2_0].inited) {
brcm_usb_init_eohci(&priv->ini);

611
target/linux/bcm4908/patches-5.4/084-v5.6-0005-phy-usb-Restructure-in-preparation-for-adding-7216-U.patch
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@ -1,611 +0,0 @@
From 94583a41047eb9489f576344b8ba9370cf4cbfb7 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:03 -0500
Subject: [PATCH] phy: usb: Restructure in preparation for adding 7216 USB
support
The driver is being restructured in preparation for adding support
for the new Synopsys USB conroller on the 7216. Since all the bugs
and work-arounds in previous STB chips are supposed to be fixed,
most of the code in phy-brcm-usb-init.c is not needed. Instead of
adding more complexity to the already complicated phy-brcm-usb-init.c
module, the driver will be restructured to use a vector table to
dispatch into different C modules for the different controllers.
There was also some general cleanup done including some ipp setup
code that was incorrect.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init.c | 191 ++++++++++-------------
drivers/phy/broadcom/phy-brcm-usb-init.h | 140 +++++++++++++++--
drivers/phy/broadcom/phy-brcm-usb.c | 6 +-
3 files changed, 214 insertions(+), 123 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -129,10 +129,6 @@ enum {
USB_CTRL_SELECTOR_COUNT,
};
-#define USB_CTRL_REG(base, reg) ((void __iomem *)base + USB_CTRL_##reg)
-#define USB_XHCI_EC_REG(base, reg) ((void __iomem *)base + USB_XHCI_EC_##reg)
-#define USB_CTRL_MASK(reg, field) \
- USB_CTRL_##reg##_##field##_MASK
#define USB_CTRL_MASK_FAMILY(params, reg, field) \
(params->usb_reg_bits_map[USB_CTRL_##reg##_##field##_SELECTOR])
@@ -143,13 +139,6 @@ enum {
usb_ctrl_unset_family(params, USB_CTRL_##reg, \
USB_CTRL_##reg##_##field##_SELECTOR)
-#define USB_CTRL_SET(base, reg, field) \
- usb_ctrl_set(USB_CTRL_REG(base, reg), \
- USB_CTRL_##reg##_##field##_MASK)
-#define USB_CTRL_UNSET(base, reg, field) \
- usb_ctrl_unset(USB_CTRL_REG(base, reg), \
- USB_CTRL_##reg##_##field##_MASK)
-
#define MDIO_USB2 0
#define MDIO_USB3 BIT(31)
@@ -405,26 +394,14 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT
},
};
-static inline u32 brcmusb_readl(void __iomem *addr)
-{
- return readl(addr);
-}
-
-static inline void brcmusb_writel(u32 val, void __iomem *addr)
-{
- writel(val, addr);
-}
-
static inline
void usb_ctrl_unset_family(struct brcm_usb_init_params *params,
u32 reg_offset, u32 field)
{
u32 mask;
- void __iomem *reg;
mask = params->usb_reg_bits_map[field];
- reg = params->ctrl_regs + reg_offset;
- brcmusb_writel(brcmusb_readl(reg) & ~mask, reg);
+ brcm_usb_ctrl_unset(params->ctrl_regs + reg_offset, mask);
};
static inline
@@ -432,45 +409,27 @@ void usb_ctrl_set_family(struct brcm_usb
u32 reg_offset, u32 field)
{
u32 mask;
- void __iomem *reg;
mask = params->usb_reg_bits_map[field];
- reg = params->ctrl_regs + reg_offset;
- brcmusb_writel(brcmusb_readl(reg) | mask, reg);
+ brcm_usb_ctrl_set(params->ctrl_regs + reg_offset, mask);
};
-static inline void usb_ctrl_set(void __iomem *reg, u32 field)
-{
- u32 value;
-
- value = brcmusb_readl(reg);
- brcmusb_writel(value | field, reg);
-}
-
-static inline void usb_ctrl_unset(void __iomem *reg, u32 field)
-{
- u32 value;
-
- value = brcmusb_readl(reg);
- brcmusb_writel(value & ~field, reg);
-}
-
static u32 brcmusb_usb_mdio_read(void __iomem *ctrl_base, u32 reg, int mode)
{
u32 data;
data = (reg << 16) | mode;
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
data |= (1 << 24);
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
data &= ~(1 << 24);
/* wait for the 60MHz parallel to serial shifter */
usleep_range(10, 20);
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
/* wait for the 60MHz parallel to serial shifter */
usleep_range(10, 20);
- return brcmusb_readl(USB_CTRL_REG(ctrl_base, MDIO2)) & 0xffff;
+ return brcm_usb_readl(USB_CTRL_REG(ctrl_base, MDIO2)) & 0xffff;
}
static void brcmusb_usb_mdio_write(void __iomem *ctrl_base, u32 reg,
@@ -479,14 +438,14 @@ static void brcmusb_usb_mdio_write(void
u32 data;
data = (reg << 16) | val | mode;
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
data |= (1 << 25);
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
data &= ~(1 << 25);
/* wait for the 60MHz parallel to serial shifter */
usleep_range(10, 20);
- brcmusb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
+ brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO));
/* wait for the 60MHz parallel to serial shifter */
usleep_range(10, 20);
}
@@ -713,12 +672,12 @@ static void brcmusb_usb3_otp_fix(struct
if (params->family_id != 0x74371000 || !xhci_ec_base)
return;
- brcmusb_writel(0xa20c, USB_XHCI_EC_REG(xhci_ec_base, IRAADR));
- val = brcmusb_readl(USB_XHCI_EC_REG(xhci_ec_base, IRADAT));
+ brcm_usb_writel(0xa20c, USB_XHCI_EC_REG(xhci_ec_base, IRAADR));
+ val = brcm_usb_readl(USB_XHCI_EC_REG(xhci_ec_base, IRADAT));
/* set cfg_pick_ss_lock */
val |= (1 << 27);
- brcmusb_writel(val, USB_XHCI_EC_REG(xhci_ec_base, IRADAT));
+ brcm_usb_writel(val, USB_XHCI_EC_REG(xhci_ec_base, IRADAT));
/* Reset USB 3.0 PHY for workaround to take effect */
USB_CTRL_UNSET(params->ctrl_regs, USB30_CTL1, PHY3_RESETB);
@@ -751,7 +710,7 @@ static void brcmusb_xhci_soft_reset(stru
* - default chip/rev.
* NOTE: The minor rev is always ignored.
*/
-static enum brcm_family_type brcmusb_get_family_type(
+static enum brcm_family_type get_family_type(
struct brcm_usb_init_params *params)
{
int last_type = -1;
@@ -779,7 +738,7 @@ static enum brcm_family_type brcmusb_get
return last_type;
}
-void brcm_usb_init_ipp(struct brcm_usb_init_params *params)
+static void usb_init_ipp(struct brcm_usb_init_params *params)
{
void __iomem *ctrl = params->ctrl_regs;
u32 reg;
@@ -795,7 +754,7 @@ void brcm_usb_init_ipp(struct brcm_usb_i
USB_CTRL_SET_FAMILY(params, USB30_CTL1, USB3_IPP);
}
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, SETUP));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP));
orig_reg = reg;
if (USB_CTRL_MASK_FAMILY(params, SETUP, STRAP_CC_DRD_MODE_ENABLE_SEL))
/* Never use the strap, it's going away. */
@@ -803,8 +762,8 @@ void brcm_usb_init_ipp(struct brcm_usb_i
SETUP,
STRAP_CC_DRD_MODE_ENABLE_SEL));
if (USB_CTRL_MASK_FAMILY(params, SETUP, STRAP_IPP_SEL))
+ /* override ipp strap pin (if it exits) */
if (params->ipp != 2)
- /* override ipp strap pin (if it exits) */
reg &= ~(USB_CTRL_MASK_FAMILY(params, SETUP,
STRAP_IPP_SEL));
@@ -812,54 +771,26 @@ void brcm_usb_init_ipp(struct brcm_usb_i
reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC));
if (params->ioc)
reg |= USB_CTRL_MASK(SETUP, IOC);
- if (params->ipp == 1 && ((reg & USB_CTRL_MASK(SETUP, IPP)) == 0))
+ if (params->ipp == 1)
reg |= USB_CTRL_MASK(SETUP, IPP);
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
/*
* If we're changing IPP, make sure power is off long enough
* to turn off any connected devices.
*/
- if (reg != orig_reg)
+ if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP))
msleep(50);
}
-int brcm_usb_init_get_dual_select(struct brcm_usb_init_params *params)
-{
- void __iomem *ctrl = params->ctrl_regs;
- u32 reg = 0;
-
- if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
- reg &= USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,
- PORT_MODE);
- }
- return reg;
-}
-
-void brcm_usb_init_set_dual_select(struct brcm_usb_init_params *params,
- int mode)
-{
- void __iomem *ctrl = params->ctrl_regs;
- u32 reg;
-
- if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
- reg &= ~USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,
- PORT_MODE);
- reg |= mode;
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
- }
-}
-
-void brcm_usb_init_common(struct brcm_usb_init_params *params)
+static void usb_init_common(struct brcm_usb_init_params *params)
{
u32 reg;
void __iomem *ctrl = params->ctrl_regs;
/* Clear any pending wake conditions */
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, USB_PM_STATUS));
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, USB_PM_STATUS));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_PM_STATUS));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_PM_STATUS));
/* Take USB out of power down */
if (USB_CTRL_MASK_FAMILY(params, PLL_CTL, PLL_IDDQ_PWRDN)) {
@@ -885,7 +816,7 @@ void brcm_usb_init_common(struct brcm_us
/* Block auto PLL suspend by USB2 PHY (Sasi) */
USB_CTRL_SET(ctrl, PLL_CTL, PLL_SUSPEND_EN);
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, SETUP));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP));
if (params->selected_family == BRCM_FAMILY_7364A0)
/* Suppress overcurrent indication from USB30 ports for A0 */
reg |= USB_CTRL_MASK_FAMILY(params, SETUP, OC3_DISABLE);
@@ -901,16 +832,16 @@ void brcm_usb_init_common(struct brcm_us
reg |= USB_CTRL_MASK_FAMILY(params, SETUP, SCB1_EN);
if (USB_CTRL_MASK_FAMILY(params, SETUP, SCB2_EN))
reg |= USB_CTRL_MASK_FAMILY(params, SETUP, SCB2_EN);
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
brcmusb_memc_fix(params);
if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
reg &= ~USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,
PORT_MODE);
reg |= params->mode;
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
}
if (USB_CTRL_MASK_FAMILY(params, USB_PM, BDC_SOFT_RESETB)) {
switch (params->mode) {
@@ -932,7 +863,7 @@ void brcm_usb_init_common(struct brcm_us
}
}
-void brcm_usb_init_eohci(struct brcm_usb_init_params *params)
+static void usb_init_eohci(struct brcm_usb_init_params *params)
{
u32 reg;
void __iomem *ctrl = params->ctrl_regs;
@@ -948,10 +879,10 @@ void brcm_usb_init_eohci(struct brcm_usb
USB_CTRL_SET(ctrl, EBRIDGE, ESTOP_SCB_REQ);
/* Setup the endian bits */
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, SETUP));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP));
reg &= ~USB_CTRL_SETUP_ENDIAN_BITS;
reg |= USB_CTRL_MASK_FAMILY(params, SETUP, ENDIAN);
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
if (params->selected_family == BRCM_FAMILY_7271A0)
/* Enable LS keep alive fix for certain keyboards */
@@ -962,14 +893,14 @@ void brcm_usb_init_eohci(struct brcm_usb
* Make the burst size 512 bytes to fix a hardware bug
* on the 7255a0. See HW7255-24.
*/
- reg = brcmusb_readl(USB_CTRL_REG(ctrl, EBRIDGE));
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, EBRIDGE));
reg &= ~USB_CTRL_MASK(EBRIDGE, EBR_SCB_SIZE);
reg |= 0x800;
- brcmusb_writel(reg, USB_CTRL_REG(ctrl, EBRIDGE));
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, EBRIDGE));
}
}
-void brcm_usb_init_xhci(struct brcm_usb_init_params *params)
+static void usb_init_xhci(struct brcm_usb_init_params *params)
{
void __iomem *ctrl = params->ctrl_regs;
@@ -997,7 +928,7 @@ void brcm_usb_init_xhci(struct brcm_usb_
brcmusb_usb3_otp_fix(params);
}
-void brcm_usb_uninit_common(struct brcm_usb_init_params *params)
+static void usb_uninit_common(struct brcm_usb_init_params *params)
{
if (USB_CTRL_MASK_FAMILY(params, USB_PM, USB_PWRDN))
USB_CTRL_SET_FAMILY(params, USB_PM, USB_PWRDN);
@@ -1006,17 +937,47 @@ void brcm_usb_uninit_common(struct brcm_
USB_CTRL_SET_FAMILY(params, PLL_CTL, PLL_IDDQ_PWRDN);
}
-void brcm_usb_uninit_eohci(struct brcm_usb_init_params *params)
+static void usb_uninit_eohci(struct brcm_usb_init_params *params)
{
}
-void brcm_usb_uninit_xhci(struct brcm_usb_init_params *params)
+static void usb_uninit_xhci(struct brcm_usb_init_params *params)
{
brcmusb_xhci_soft_reset(params, 1);
USB_CTRL_SET(params->ctrl_regs, USB30_PCTL, PHY3_IDDQ_OVERRIDE);
}
-void brcm_usb_wake_enable(struct brcm_usb_init_params *params,
+static int usb_get_dual_select(struct brcm_usb_init_params *params)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+ u32 reg = 0;
+
+ pr_debug("%s\n", __func__);
+ if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg &= USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,
+ PORT_MODE);
+ }
+ return reg;
+}
+
+static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+ u32 reg;
+
+ pr_debug("%s\n", __func__);
+
+ if (USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1, PORT_MODE)) {
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg &= ~USB_CTRL_MASK_FAMILY(params, USB_DEVICE_CTL1,
+ PORT_MODE);
+ reg |= mode;
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ }
+}
+
+static void usb_wake_enable(struct brcm_usb_init_params *params,
int enable)
{
void __iomem *ctrl = params->ctrl_regs;
@@ -1027,13 +988,29 @@ void brcm_usb_wake_enable(struct brcm_us
USB_CTRL_UNSET(ctrl, USB_PM, RMTWKUP_EN);
}
-void brcm_usb_set_family_map(struct brcm_usb_init_params *params)
+static const struct brcm_usb_init_ops bcm7445_ops = {
+ .init_ipp = usb_init_ipp,
+ .init_common = usb_init_common,
+ .init_eohci = usb_init_eohci,
+ .init_xhci = usb_init_xhci,
+ .uninit_common = usb_uninit_common,
+ .uninit_eohci = usb_uninit_eohci,
+ .uninit_xhci = usb_uninit_xhci,
+ .get_dual_select = usb_get_dual_select,
+ .set_dual_select = usb_set_dual_select,
+ .wake_enable = usb_wake_enable,
+};
+
+void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params)
{
int fam;
- fam = brcmusb_get_family_type(params);
+ pr_debug("%s\n", __func__);
+
+ fam = get_family_type(params);
params->selected_family = fam;
params->usb_reg_bits_map =
&usb_reg_bits_map_table[fam][0];
params->family_name = family_names[fam];
+ params->ops = &bcm7445_ops;
}
--- a/drivers/phy/broadcom/phy-brcm-usb-init.h
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
@@ -13,6 +13,33 @@
struct brcm_usb_init_params;
+#define USB_CTRL_REG(base, reg) ((void __iomem *)base + USB_CTRL_##reg)
+#define USB_XHCI_EC_REG(base, reg) ((void __iomem *)base + USB_XHCI_EC_##reg)
+#define USB_CTRL_MASK(reg, field) \
+ USB_CTRL_##reg##_##field##_MASK
+#define USB_CTRL_SET(base, reg, field) \
+ brcm_usb_ctrl_set(USB_CTRL_REG(base, reg), \
+ USB_CTRL_##reg##_##field##_MASK)
+#define USB_CTRL_UNSET(base, reg, field) \
+ brcm_usb_ctrl_unset(USB_CTRL_REG(base, reg), \
+ USB_CTRL_##reg##_##field##_MASK)
+
+struct brcm_usb_init_params;
+
+struct brcm_usb_init_ops {
+ void (*init_ipp)(struct brcm_usb_init_params *params);
+ void (*init_common)(struct brcm_usb_init_params *params);
+ void (*init_eohci)(struct brcm_usb_init_params *params);
+ void (*init_xhci)(struct brcm_usb_init_params *params);
+ void (*uninit_common)(struct brcm_usb_init_params *params);
+ void (*uninit_eohci)(struct brcm_usb_init_params *params);
+ void (*uninit_xhci)(struct brcm_usb_init_params *params);
+ int (*get_dual_select)(struct brcm_usb_init_params *params);
+ void (*set_dual_select)(struct brcm_usb_init_params *params, int mode);
+ void (*wake_enable)(struct brcm_usb_init_params *params,
+ int enable);
+};
+
struct brcm_usb_init_params {
void __iomem *ctrl_regs;
void __iomem *xhci_ec_regs;
@@ -24,20 +51,107 @@ struct brcm_usb_init_params {
int selected_family;
const char *family_name;
const u32 *usb_reg_bits_map;
+ const struct brcm_usb_init_ops *ops;
};
-void brcm_usb_set_family_map(struct brcm_usb_init_params *params);
-int brcm_usb_init_get_dual_select(struct brcm_usb_init_params *params);
-void brcm_usb_init_set_dual_select(struct brcm_usb_init_params *params,
- int mode);
-
-void brcm_usb_init_ipp(struct brcm_usb_init_params *ini);
-void brcm_usb_init_common(struct brcm_usb_init_params *ini);
-void brcm_usb_init_eohci(struct brcm_usb_init_params *ini);
-void brcm_usb_init_xhci(struct brcm_usb_init_params *ini);
-void brcm_usb_uninit_common(struct brcm_usb_init_params *ini);
-void brcm_usb_uninit_eohci(struct brcm_usb_init_params *ini);
-void brcm_usb_uninit_xhci(struct brcm_usb_init_params *ini);
-void brcm_usb_wake_enable(struct brcm_usb_init_params *params, int enable);
+void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params);
+
+static inline u32 brcm_usb_readl(void __iomem *addr)
+{
+ /*
+ * MIPS endianness is configured by boot strap, which also reverses all
+ * bus endianness (i.e., big-endian CPU + big endian bus ==> native
+ * endian I/O).
+ *
+ * Other architectures (e.g., ARM) either do not support big endian, or
+ * else leave I/O in little endian mode.
+ */
+ if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN))
+ return __raw_readl(addr);
+ else
+ return readl_relaxed(addr);
+}
+
+static inline void brcm_usb_writel(u32 val, void __iomem *addr)
+{
+ /* See brcmnand_readl() comments */
+ if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN))
+ __raw_writel(val, addr);
+ else
+ writel_relaxed(val, addr);
+}
+
+static inline void brcm_usb_ctrl_unset(void __iomem *reg, u32 mask)
+{
+ brcm_usb_writel(brcm_usb_readl(reg) & ~(mask), reg);
+};
+
+static inline void brcm_usb_ctrl_set(void __iomem *reg, u32 mask)
+{
+ brcm_usb_writel(brcm_usb_readl(reg) | (mask), reg);
+};
+
+static inline void brcm_usb_init_ipp(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->init_ipp)
+ ini->ops->init_ipp(ini);
+}
+
+static inline void brcm_usb_init_common(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->init_common)
+ ini->ops->init_common(ini);
+}
+
+static inline void brcm_usb_init_eohci(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->init_eohci)
+ ini->ops->init_eohci(ini);
+}
+
+static inline void brcm_usb_init_xhci(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->init_xhci)
+ ini->ops->init_xhci(ini);
+}
+
+static inline void brcm_usb_uninit_common(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->uninit_common)
+ ini->ops->uninit_common(ini);
+}
+
+static inline void brcm_usb_uninit_eohci(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->uninit_eohci)
+ ini->ops->uninit_eohci(ini);
+}
+
+static inline void brcm_usb_uninit_xhci(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->uninit_xhci)
+ ini->ops->uninit_xhci(ini);
+}
+
+static inline void brcm_usb_wake_enable(struct brcm_usb_init_params *ini,
+ int enable)
+{
+ if (ini->ops->wake_enable)
+ ini->ops->wake_enable(ini, enable);
+}
+
+static inline int brcm_usb_get_dual_select(struct brcm_usb_init_params *ini)
+{
+ if (ini->ops->get_dual_select)
+ return ini->ops->get_dual_select(ini);
+ return 0;
+}
+
+static inline void brcm_usb_set_dual_select(struct brcm_usb_init_params *ini,
+ int mode)
+{
+ if (ini->ops->set_dual_select)
+ ini->ops->set_dual_select(ini, mode);
+}
#endif /* _USB_BRCM_COMMON_INIT_H */
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -207,7 +207,7 @@ static ssize_t dual_select_store(struct
res = name_to_value(&brcm_dual_mode_to_name[0],
ARRAY_SIZE(brcm_dual_mode_to_name), buf, &value);
if (!res) {
- brcm_usb_init_set_dual_select(&priv->ini, value);
+ brcm_usb_set_dual_select(&priv->ini, value);
res = len;
}
mutex_unlock(&sysfs_lock);
@@ -222,7 +222,7 @@ static ssize_t dual_select_show(struct d
int value;
mutex_lock(&sysfs_lock);
- value = brcm_usb_init_get_dual_select(&priv->ini);
+ value = brcm_usb_get_dual_select(&priv->ini);
mutex_unlock(&sysfs_lock);
return sprintf(buf, "%s\n",
value_to_name(&brcm_dual_mode_to_name[0],
@@ -331,7 +331,7 @@ static int brcm_usb_phy_probe(struct pla
priv->ini.family_id = brcmstb_get_family_id();
priv->ini.product_id = brcmstb_get_product_id();
- brcm_usb_set_family_map(&priv->ini);
+ brcm_usb_dvr_init_7445(&priv->ini);
dev_dbg(dev, "Best mapping table is for %s\n",
priv->ini.family_name);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

108
target/linux/bcm4908/patches-5.4/084-v5.6-0006-dt-bindings-Add-Broadcom-STB-USB-PHY-binding-documen.patch
View File

@ -1,108 +0,0 @@
From b11df0c9efbbe2b52c5133ca15030f01b43ec6ef Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:04 -0500
Subject: [PATCH] dt-bindings: Add Broadcom STB USB PHY binding document
Add support for bcm7216 and bcm7211
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../bindings/phy/brcm,brcmstb-usb-phy.txt | 69 +++++++++++++++----
1 file changed, 56 insertions(+), 13 deletions(-)
--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt
@@ -1,30 +1,49 @@
Broadcom STB USB PHY
Required properties:
- - compatible: brcm,brcmstb-usb-phy
- - reg: two offset and length pairs.
- The first pair specifies a manditory set of memory mapped
- registers used for general control of the PHY.
- The second pair specifies optional registers used by some of
- the SoCs that support USB 3.x
- - #phy-cells: Shall be 1 as it expects one argument for setting
- the type of the PHY. Possible values are:
- - PHY_TYPE_USB2 for USB1.1/2.0 PHY
- - PHY_TYPE_USB3 for USB3.x PHY
+- compatible: should be one of
+ "brcm,brcmstb-usb-phy"
+ "brcm,bcm7216-usb-phy"
+ "brcm,bcm7211-usb-phy"
+
+- reg and reg-names properties requirements are specific to the
+ compatible string.
+ "brcm,brcmstb-usb-phy":
+ - reg: 1 or 2 offset and length pairs. One for the base CTRL registers
+ and an optional pair for systems with USB 3.x support
+ - reg-names: not specified
+ "brcm,bcm7216-usb-phy":
+ - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL
+ registers
+ - reg-names: "ctrl", "xhci_ec", "xhci_gbl"
+ "brcm,bcm7211-usb-phy":
+ - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL,
+ USB_PHY and USB_MDIO registers and an optional pair
+ for the BDC registers
+ - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
+
+- #phy-cells: Shall be 1 as it expects one argument for setting
+ the type of the PHY. Possible values are:
+ - PHY_TYPE_USB2 for USB1.1/2.0 PHY
+ - PHY_TYPE_USB3 for USB3.x PHY
Optional Properties:
- clocks : clock phandles.
- clock-names: String, clock name.
+- interrupts: wakeup interrupt
+- interrupt-names: "wakeup"
- brcm,ipp: Boolean, Invert Port Power.
Possible values are: 0 (Don't invert), 1 (Invert)
- brcm,ioc: Boolean, Invert Over Current detection.
Possible values are: 0 (Don't invert), 1 (Invert)
-NOTE: one or both of the following two properties must be set
-- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.
-- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.
- dr_mode: String, PHY Device mode.
Possible values are: "host", "peripheral ", "drd" or "typec-pd"
If this property is not defined, the phy will default to "host" mode.
+- brcm,syscon-piarbctl: phandle to syscon for handling config registers
+NOTE: one or both of the following two properties must be set
+- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.
+- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.
+
Example:
@@ -41,3 +60,27 @@ usbphy_0: usb-phy@f0470200 {
clocks = <&usb20>, <&usb30>;
clock-names = "sw_usb", "sw_usb3";
};
+
+usb-phy@29f0200 {
+ reg = <0x29f0200 0x200>,
+ <0x29c0880 0x30>,
+ <0x29cc100 0x534>,
+ <0x2808000 0x24>,
+ <0x2980080 0x8>;
+ reg-names = "ctrl",
+ "xhci_ec",
+ "xhci_gbl",
+ "usb_phy",
+ "usb_mdio";
+ brcm,ioc = <0x0>;
+ brcm,ipp = <0x0>;
+ compatible = "brcm,bcm7211-usb-phy";
+ interrupts = <0x30>;
+ interrupt-parent = <&vpu_intr1_nosec_intc>;
+ interrupt-names = "wake";
+ #phy-cells = <0x1>;
+ brcm,has-xhci;
+ syscon-piarbctl = <&syscon_piarbctl>;
+ clocks = <&scmi_clk 256>;
+ clock-names = "sw_usb";
+};

358
target/linux/bcm4908/patches-5.4/084-v5.6-0007-phy-usb-Add-support-for-new-Synopsys-USB-controller-.patch
View File

@ -1,358 +0,0 @@
From 4e5b9c9a73b32d28759225a40d30848393a8f1fd Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:05 -0500
Subject: [PATCH] phy: usb: Add support for new Synopsys USB controller on the
7216
The 7216 has the new USB XHCI controller from Synopsys. While
this new controller and the PHY are similar to the STB versions,
the major differences are:
- Many of the registers and fields in the CTRL block have been
removed or changed.
- A new set of Synopsys control registers, BCHP_USB_XHCI_GBL, were
added.
- MDIO functionality has been replaced with direct access registers
in the BCHP_USB_XHCI_GBL block.
- Power up PHY defaults that had to be changed by MDIO in previous
chips will now power up with the correct defaults.
A new init module was created for this new Synopsys USB controller.
A new compatible string was added and the driver will dispatch
into one of two init modules based on it. A "reg-names" field was
added so the driver can more easily get optional registers.
A DT bindings document was also added for this driver.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/Makefile | 2 +-
.../phy/broadcom/phy-brcm-usb-init-synopsys.c | 171 ++++++++++++++++++
drivers/phy/broadcom/phy-brcm-usb-init.h | 2 +
drivers/phy/broadcom/phy-brcm-usb.c | 70 +++++--
4 files changed, 227 insertions(+), 18 deletions(-)
create mode 100644 drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
--- a/drivers/phy/broadcom/Makefile
+++ b/drivers/phy/broadcom/Makefile
@@ -8,7 +8,7 @@ obj-$(CONFIG_PHY_NS2_USB_DRD) += phy-bc
obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
obj-$(CONFIG_PHY_BRCM_USB) += phy-brcm-usb-dvr.o
-phy-brcm-usb-dvr-objs := phy-brcm-usb.o phy-brcm-usb-init.o
+phy-brcm-usb-dvr-objs := phy-brcm-usb.o phy-brcm-usb-init.o phy-brcm-usb-init-synopsys.o
obj-$(CONFIG_PHY_BCM_SR_PCIE) += phy-bcm-sr-pcie.o
obj-$(CONFIG_PHY_BCM_SR_USB) += phy-bcm-sr-usb.o
--- /dev/null
+++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (c) 2018, Broadcom */
+
+/*
+ * This module contains USB PHY initialization for power up and S3 resume
+ * for newer Synopsys based USB hardware first used on the bcm7216.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+
+#include <linux/soc/brcmstb/brcmstb.h>
+#include "phy-brcm-usb-init.h"
+
+/* Register definitions for the USB CTRL block */
+#define USB_CTRL_SETUP 0x00
+#define USB_CTRL_SETUP_STRAP_IPP_SEL_MASK 0x02000000
+#define USB_CTRL_SETUP_SCB2_EN_MASK 0x00008000
+#define USB_CTRL_SETUP_SCB1_EN_MASK 0x00004000
+#define USB_CTRL_SETUP_SOFT_SHUTDOWN_MASK 0x00000200
+#define USB_CTRL_SETUP_IPP_MASK 0x00000020
+#define USB_CTRL_SETUP_IOC_MASK 0x00000010
+#define USB_CTRL_USB_PM 0x04
+#define USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000
+#define USB_CTRL_USB_PM_SOFT_RESET_MASK 0x40000000
+#define USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK 0x00800000
+#define USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK 0x00400000
+#define USB_CTRL_USB_PM_STATUS 0x08
+#define USB_CTRL_USB_DEVICE_CTL1 0x10
+#define USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK 0x00000003
+
+
+static void xhci_soft_reset(struct brcm_usb_init_params *params,
+ int on_off)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+
+ /* Assert reset */
+ if (on_off)
+ USB_CTRL_UNSET(ctrl, USB_PM, XHC_SOFT_RESETB);
+ /* De-assert reset */
+ else
+ USB_CTRL_SET(ctrl, USB_PM, XHC_SOFT_RESETB);
+}
+
+static void usb_init_ipp(struct brcm_usb_init_params *params)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+ u32 reg;
+ u32 orig_reg;
+
+ pr_debug("%s\n", __func__);
+
+ orig_reg = reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP));
+ if (params->ipp != 2)
+ /* override ipp strap pin (if it exits) */
+ reg &= ~(USB_CTRL_MASK(SETUP, STRAP_IPP_SEL));
+
+ /* Override the default OC and PP polarity */
+ reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC));
+ if (params->ioc)
+ reg |= USB_CTRL_MASK(SETUP, IOC);
+ if (params->ipp == 1)
+ reg |= USB_CTRL_MASK(SETUP, IPP);
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
+
+ /*
+ * If we're changing IPP, make sure power is off long enough
+ * to turn off any connected devices.
+ */
+ if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP))
+ msleep(50);
+}
+
+static void usb_init_common(struct brcm_usb_init_params *params)
+{
+ u32 reg;
+ void __iomem *ctrl = params->ctrl_regs;
+
+ pr_debug("%s\n", __func__);
+
+ USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN);
+ /* 1 millisecond - for USB clocks to settle down */
+ usleep_range(1000, 2000);
+
+ if (USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE)) {
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
+ reg |= params->mode;
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ }
+ switch (params->mode) {
+ case USB_CTLR_MODE_HOST:
+ USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB);
+ break;
+ default:
+ USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB);
+ USB_CTRL_SET(ctrl, USB_PM, BDC_SOFT_RESETB);
+ break;
+ }
+}
+
+static void usb_init_xhci(struct brcm_usb_init_params *params)
+{
+ pr_debug("%s\n", __func__);
+
+ xhci_soft_reset(params, 0);
+}
+
+static void usb_uninit_common(struct brcm_usb_init_params *params)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+
+ pr_debug("%s\n", __func__);
+
+ USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN);
+
+}
+
+static void usb_uninit_xhci(struct brcm_usb_init_params *params)
+{
+
+ pr_debug("%s\n", __func__);
+
+ xhci_soft_reset(params, 1);
+}
+
+static int usb_get_dual_select(struct brcm_usb_init_params *params)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+ u32 reg = 0;
+
+ pr_debug("%s\n", __func__);
+
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg &= USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
+ return reg;
+}
+
+static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode)
+{
+ void __iomem *ctrl = params->ctrl_regs;
+ u32 reg;
+
+ pr_debug("%s\n", __func__);
+
+ reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+ reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE);
+ reg |= mode;
+ brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1));
+}
+
+
+static const struct brcm_usb_init_ops bcm7216_ops = {
+ .init_ipp = usb_init_ipp,
+ .init_common = usb_init_common,
+ .init_xhci = usb_init_xhci,
+ .uninit_common = usb_uninit_common,
+ .uninit_xhci = usb_uninit_xhci,
+ .get_dual_select = usb_get_dual_select,
+ .set_dual_select = usb_set_dual_select,
+};
+
+void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
+{
+
+ pr_debug("%s\n", __func__);
+
+ params->family_name = "7216";
+ params->ops = &bcm7216_ops;
+}
--- a/drivers/phy/broadcom/phy-brcm-usb-init.h
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
@@ -43,6 +43,7 @@ struct brcm_usb_init_ops {
struct brcm_usb_init_params {
void __iomem *ctrl_regs;
void __iomem *xhci_ec_regs;
+ void __iomem *xhci_gbl_regs;
int ioc;
int ipp;
int mode;
@@ -55,6 +56,7 @@ struct brcm_usb_init_params {
};
void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params);
+void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params);
static inline u32 brcm_usb_readl(void __iomem *addr)
{
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -241,6 +241,15 @@ static const struct attribute_group brcm
.attrs = brcm_usb_phy_attrs,
};
+static const struct of_device_id brcm_usb_dt_ids[] = {
+ {
+ .compatible = "brcm,bcm7216-usb-phy",
+ .data = &brcm_usb_dvr_init_7216,
+ },
+ { .compatible = "brcm,brcmstb-usb-phy" },
+ { /* sentinel */ }
+};
+
static int brcm_usb_phy_dvr_init(struct platform_device *pdev,
struct brcm_usb_phy_data *priv,
struct device_node *dn)
@@ -316,13 +325,16 @@ static int brcm_usb_phy_dvr_init(struct
static int brcm_usb_phy_probe(struct platform_device *pdev)
{
- struct resource *res;
+ struct resource *res_ctrl;
+ struct resource *res_xhciec = NULL;
+ struct resource *res_xhcigbl = NULL;
struct device *dev = &pdev->dev;
struct brcm_usb_phy_data *priv;
struct phy_provider *phy_provider;
struct device_node *dn = pdev->dev.of_node;
int err;
const char *mode;
+ const struct of_device_id *match;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -331,30 +343,59 @@ static int brcm_usb_phy_probe(struct pla
priv->ini.family_id = brcmstb_get_family_id();
priv->ini.product_id = brcmstb_get_product_id();
- brcm_usb_dvr_init_7445(&priv->ini);
+
+ match = of_match_node(brcm_usb_dt_ids, dev->of_node);
+ if (match && match->data) {
+ void (*dvr_init)(struct brcm_usb_init_params *params);
+
+ dvr_init = match->data;
+ (*dvr_init)(&priv->ini);
+ } else {
+ brcm_usb_dvr_init_7445(&priv->ini);
+ }
+
dev_dbg(dev, "Best mapping table is for %s\n",
priv->ini.family_name);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(dev, "can't get USB_CTRL base address\n");
- return -EINVAL;
+
+ /* Newer DT node has reg-names. xhci_ec and xhci_gbl are optional. */
+ res_ctrl = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
+ if (res_ctrl != NULL) {
+ res_xhciec = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
+ "xhci_ec");
+ res_xhcigbl = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
+ "xhci_gbl");
+ } else {
+ /* Older DT node without reg-names, use index */
+ res_ctrl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res_ctrl == NULL) {
+ dev_err(dev, "can't get CTRL base address\n");
+ return -EINVAL;
+ }
+ res_xhciec = platform_get_resource(pdev, IORESOURCE_MEM, 1);
}
- priv->ini.ctrl_regs = devm_ioremap_resource(dev, res);
+ priv->ini.ctrl_regs = devm_ioremap_resource(dev, res_ctrl);
if (IS_ERR(priv->ini.ctrl_regs)) {
dev_err(dev, "can't map CTRL register space\n");
return -EINVAL;
}
-
- /* The XHCI EC registers are optional */
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (res) {
+ if (res_xhciec) {
priv->ini.xhci_ec_regs =
- devm_ioremap_resource(dev, res);
+ devm_ioremap_resource(dev, res_xhciec);
if (IS_ERR(priv->ini.xhci_ec_regs)) {
dev_err(dev, "can't map XHCI EC register space\n");
return -EINVAL;
}
}
+ if (res_xhcigbl) {
+ priv->ini.xhci_gbl_regs =
+ devm_ioremap_resource(dev, res_xhcigbl);
+ if (IS_ERR(priv->ini.xhci_gbl_regs)) {
+ dev_err(dev, "can't map XHCI Global register space\n");
+ return -EINVAL;
+ }
+ }
of_property_read_u32(dn, "brcm,ipp", &priv->ini.ipp);
of_property_read_u32(dn, "brcm,ioc", &priv->ini.ioc);
@@ -480,11 +521,6 @@ static const struct dev_pm_ops brcm_usb_
SET_LATE_SYSTEM_SLEEP_PM_OPS(brcm_usb_phy_suspend, brcm_usb_phy_resume)
};
-static const struct of_device_id brcm_usb_dt_ids[] = {
- { .compatible = "brcm,brcmstb-usb-phy" },
- { /* sentinel */ }
-};
-
MODULE_DEVICE_TABLE(of, brcm_usb_dt_ids);
static struct platform_driver brcm_usb_driver = {

680
target/linux/bcm4908/patches-5.4/084-v5.6-0008-phy-usb-Add-support-for-new-Synopsys-USB-controller-.patch
View File

@ -1,680 +0,0 @@
From 9d5f51dcdb646c2ed21649d379fbb703994f1ec9 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:06 -0500
Subject: [PATCH] phy: usb: Add support for new Synopsys USB controller on the
7211b0
The 7211b0 has added the STB XHCI Synopsys controller and it
will be used instead of the RPi based DWC USB controller. The new
Synopsys XHCI controller core is the same one that is used on the
7216, but because of the way the STB USB PHY is used on both the A0
and B0, some of the PHY control is different.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../phy/broadcom/phy-brcm-usb-init-synopsys.c | 163 +++++++++++++++++-
drivers/phy/broadcom/phy-brcm-usb-init.c | 31 ++--
drivers/phy/broadcom/phy-brcm-usb-init.h | 17 +-
drivers/phy/broadcom/phy-brcm-usb.c | 162 +++++++++++------
4 files changed, 295 insertions(+), 78 deletions(-)
--- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
@@ -12,10 +12,33 @@
#include <linux/soc/brcmstb/brcmstb.h>
#include "phy-brcm-usb-init.h"
+#define PHY_LOCK_TIMEOUT_MS 200
+
+/* Register definitions for syscon piarbctl registers */
+#define PIARBCTL_CAM 0x00
+#define PIARBCTL_SPLITTER 0x04
+#define PIARBCTL_MISC 0x08
+#define PIARBCTL_MISC_SECURE_MASK 0x80000000
+#define PIARBCTL_MISC_USB_SELECT_MASK 0x40000000
+#define PIARBCTL_MISC_USB_4G_SDRAM_MASK 0x20000000
+#define PIARBCTL_MISC_USB_PRIORITY_MASK 0x000f0000
+#define PIARBCTL_MISC_USB_MEM_PAGE_MASK 0x0000f000
+#define PIARBCTL_MISC_CAM1_MEM_PAGE_MASK 0x00000f00
+#define PIARBCTL_MISC_CAM0_MEM_PAGE_MASK 0x000000f0
+#define PIARBCTL_MISC_SATA_PRIORITY_MASK 0x0000000f
+#define PIARBCTL_USB_M_ASB_CTRL 0x10
+
+#define PIARBCTL_MISC_USB_ONLY_MASK \
+ (PIARBCTL_MISC_USB_SELECT_MASK | \
+ PIARBCTL_MISC_USB_4G_SDRAM_MASK | \
+ PIARBCTL_MISC_USB_PRIORITY_MASK | \
+ PIARBCTL_MISC_USB_MEM_PAGE_MASK)
+
/* Register definitions for the USB CTRL block */
#define USB_CTRL_SETUP 0x00
#define USB_CTRL_SETUP_STRAP_IPP_SEL_MASK 0x02000000
#define USB_CTRL_SETUP_SCB2_EN_MASK 0x00008000
+#define USB_CTRL_SETUP_tca_drv_sel_MASK 0x01000000
#define USB_CTRL_SETUP_SCB1_EN_MASK 0x00004000
#define USB_CTRL_SETUP_SOFT_SHUTDOWN_MASK 0x00000200
#define USB_CTRL_SETUP_IPP_MASK 0x00000020
@@ -29,11 +52,73 @@
#define USB_CTRL_USB_DEVICE_CTL1 0x10
#define USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK 0x00000003
+/* Register definitions for the USB_PHY block in 7211b0 */
+#define USB_PHY_PLL_LDO_CTL 0x08
+#define USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK 0x00000004
+#define USB_PHY_UTMI_CTL_1 0x04
+#define USB_PHY_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c
+#define USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT 2
+#define USB_PHY_STATUS 0x20
+#define USB_PHY_STATUS_pll_lock_MASK 0x00000001
+
+/* Register definitions for the MDIO registers in the DWC2 block of
+ * the 7211b0.
+ * NOTE: The PHY's MDIO registers are only accessible through the
+ * legacy DesignWare USB controller even though it's not being used.
+ */
+#define USB_GMDIOCSR 0
+#define USB_GMDIOGEN 4
+
+
+static void usb_mdio_write_7211b0(struct brcm_usb_init_params *params,
+ uint8_t addr, uint16_t data)
+{
+ void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO];
+
+ addr &= 0x1f; /* 5-bit address */
+ brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+ brcm_usb_writel(0x59020000 | (addr << 18) | data,
+ usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+ brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+}
+
+static uint16_t __maybe_unused usb_mdio_read_7211b0(
+ struct brcm_usb_init_params *params, uint8_t addr)
+{
+ void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO];
+
+ addr &= 0x1f; /* 5-bit address */
+ brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+ brcm_usb_writel(0x69020000 | (addr << 18), usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+ brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN);
+ while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31))
+ ;
+ return brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & 0xffff;
+}
+
+static void usb2_eye_fix_7211b0(struct brcm_usb_init_params *params)
+{
+ /* select bank */
+ usb_mdio_write_7211b0(params, 0x1f, 0x80a0);
+
+ /* Set the eye */
+ usb_mdio_write_7211b0(params, 0x0a, 0xc6a0);
+}
static void xhci_soft_reset(struct brcm_usb_init_params *params,
int on_off)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
/* Assert reset */
if (on_off)
@@ -45,7 +130,7 @@ static void xhci_soft_reset(struct brcm_
static void usb_init_ipp(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg;
u32 orig_reg;
@@ -72,10 +157,18 @@ static void usb_init_ipp(struct brcm_usb
msleep(50);
}
+static void syscon_piarbctl_init(struct regmap *rmap)
+{
+ /* Switch from legacy USB OTG controller to new STB USB controller */
+ regmap_update_bits(rmap, PIARBCTL_MISC, PIARBCTL_MISC_USB_ONLY_MASK,
+ PIARBCTL_MISC_USB_SELECT_MASK |
+ PIARBCTL_MISC_USB_4G_SDRAM_MASK);
+}
+
static void usb_init_common(struct brcm_usb_init_params *params)
{
u32 reg;
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
pr_debug("%s\n", __func__);
@@ -100,6 +193,45 @@ static void usb_init_common(struct brcm_
}
}
+static void usb_init_common_7211b0(struct brcm_usb_init_params *params)
+{
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
+ void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY];
+ int timeout_ms = PHY_LOCK_TIMEOUT_MS;
+ u32 reg;
+
+ if (params->syscon_piarbctl)
+ syscon_piarbctl_init(params->syscon_piarbctl);
+
+ /* Init the PHY */
+ reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_LDO_CTL);
+ reg |= USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK;
+ brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_LDO_CTL);
+
+ /* wait for lock */
+ while (timeout_ms-- > 0) {
+ reg = brcm_usb_readl(usb_phy + USB_PHY_STATUS);
+ if (reg & USB_PHY_STATUS_pll_lock_MASK)
+ break;
+ usleep_range(1000, 2000);
+ }
+
+ /* Set the PHY_MODE */
+ reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1);
+ reg &= ~USB_PHY_UTMI_CTL_1_PHY_MODE_MASK;
+ reg |= params->mode << USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT;
+ brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1);
+
+ /* Fix the incorrect default */
+ reg = brcm_usb_readl(ctrl + USB_CTRL_SETUP);
+ reg &= ~USB_CTRL_SETUP_tca_drv_sel_MASK;
+ brcm_usb_writel(reg, ctrl + USB_CTRL_SETUP);
+
+ usb_init_common(params);
+
+ usb2_eye_fix_7211b0(params);
+}
+
static void usb_init_xhci(struct brcm_usb_init_params *params)
{
pr_debug("%s\n", __func__);
@@ -109,7 +241,7 @@ static void usb_init_xhci(struct brcm_us
static void usb_uninit_common(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
pr_debug("%s\n", __func__);
@@ -127,7 +259,7 @@ static void usb_uninit_xhci(struct brcm_
static int usb_get_dual_select(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg = 0;
pr_debug("%s\n", __func__);
@@ -139,7 +271,7 @@ static int usb_get_dual_select(struct br
static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg;
pr_debug("%s\n", __func__);
@@ -161,6 +293,16 @@ static const struct brcm_usb_init_ops bc
.set_dual_select = usb_set_dual_select,
};
+static const struct brcm_usb_init_ops bcm7211b0_ops = {
+ .init_ipp = usb_init_ipp,
+ .init_common = usb_init_common_7211b0,
+ .init_xhci = usb_init_xhci,
+ .uninit_common = usb_uninit_common,
+ .uninit_xhci = usb_uninit_xhci,
+ .get_dual_select = usb_get_dual_select,
+ .set_dual_select = usb_set_dual_select,
+};
+
void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
{
@@ -169,3 +311,12 @@ void brcm_usb_dvr_init_7216(struct brcm_
params->family_name = "7216";
params->ops = &bcm7216_ops;
}
+
+void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params)
+{
+
+ pr_debug("%s\n", __func__);
+
+ params->family_name = "7211";
+ params->ops = &bcm7211b0_ops;
+}
--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
@@ -401,7 +401,7 @@ void usb_ctrl_unset_family(struct brcm_u
u32 mask;
mask = params->usb_reg_bits_map[field];
- brcm_usb_ctrl_unset(params->ctrl_regs + reg_offset, mask);
+ brcm_usb_ctrl_unset(params->regs[BRCM_REGS_CTRL] + reg_offset, mask);
};
static inline
@@ -411,7 +411,7 @@ void usb_ctrl_set_family(struct brcm_usb
u32 mask;
mask = params->usb_reg_bits_map[field];
- brcm_usb_ctrl_set(params->ctrl_regs + reg_offset, mask);
+ brcm_usb_ctrl_set(params->regs[BRCM_REGS_CTRL] + reg_offset, mask);
};
static u32 brcmusb_usb_mdio_read(void __iomem *ctrl_base, u32 reg, int mode)
@@ -544,7 +544,7 @@ static void brcmusb_usb3_pll_54mhz(struc
{
u32 ofs;
int ii;
- void __iomem *ctrl_base = params->ctrl_regs;
+ void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL];
/*
* On newer B53 based SoC's, the reference clock for the
@@ -625,7 +625,7 @@ static void brcmusb_usb3_ssc_enable(void
static void brcmusb_usb3_phy_workarounds(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl_base = params->ctrl_regs;
+ void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL];
brcmusb_usb3_pll_fix(ctrl_base);
brcmusb_usb3_pll_54mhz(params);
@@ -667,7 +667,7 @@ static void brcmusb_memc_fix(struct brcm
static void brcmusb_usb3_otp_fix(struct brcm_usb_init_params *params)
{
- void __iomem *xhci_ec_base = params->xhci_ec_regs;
+ void __iomem *xhci_ec_base = params->regs[BRCM_REGS_XHCI_EC];
u32 val;
if (params->family_id != 0x74371000 || !xhci_ec_base)
@@ -680,8 +680,8 @@ static void brcmusb_usb3_otp_fix(struct
brcm_usb_writel(val, USB_XHCI_EC_REG(xhci_ec_base, IRADAT));
/* Reset USB 3.0 PHY for workaround to take effect */
- USB_CTRL_UNSET(params->ctrl_regs, USB30_CTL1, PHY3_RESETB);
- USB_CTRL_SET(params->ctrl_regs, USB30_CTL1, PHY3_RESETB);
+ USB_CTRL_UNSET(params->regs[BRCM_REGS_CTRL], USB30_CTL1, PHY3_RESETB);
+ USB_CTRL_SET(params->regs[BRCM_REGS_CTRL], USB30_CTL1, PHY3_RESETB);
}
static void brcmusb_xhci_soft_reset(struct brcm_usb_init_params *params,
@@ -740,7 +740,7 @@ static enum brcm_family_type get_family_
static void usb_init_ipp(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg;
u32 orig_reg;
@@ -786,7 +786,7 @@ static void usb_init_ipp(struct brcm_usb
static void usb_init_common(struct brcm_usb_init_params *params)
{
u32 reg;
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
/* Clear any pending wake conditions */
reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_PM_STATUS));
@@ -866,7 +866,7 @@ static void usb_init_common(struct brcm_
static void usb_init_eohci(struct brcm_usb_init_params *params)
{
u32 reg;
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
if (USB_CTRL_MASK_FAMILY(params, USB_PM, USB20_HC_RESETB))
USB_CTRL_SET_FAMILY(params, USB_PM, USB20_HC_RESETB);
@@ -902,7 +902,7 @@ static void usb_init_eohci(struct brcm_u
static void usb_init_xhci(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
USB_CTRL_UNSET(ctrl, USB30_PCTL, PHY3_IDDQ_OVERRIDE);
/* 1 millisecond - for USB clocks to settle down */
@@ -944,12 +944,13 @@ static void usb_uninit_eohci(struct brcm
static void usb_uninit_xhci(struct brcm_usb_init_params *params)
{
brcmusb_xhci_soft_reset(params, 1);
- USB_CTRL_SET(params->ctrl_regs, USB30_PCTL, PHY3_IDDQ_OVERRIDE);
+ USB_CTRL_SET(params->regs[BRCM_REGS_CTRL], USB30_PCTL,
+ PHY3_IDDQ_OVERRIDE);
}
static int usb_get_dual_select(struct brcm_usb_init_params *params)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg = 0;
pr_debug("%s\n", __func__);
@@ -963,7 +964,7 @@ static int usb_get_dual_select(struct br
static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
u32 reg;
pr_debug("%s\n", __func__);
@@ -980,7 +981,7 @@ static void usb_set_dual_select(struct b
static void usb_wake_enable(struct brcm_usb_init_params *params,
int enable)
{
- void __iomem *ctrl = params->ctrl_regs;
+ void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
if (enable)
USB_CTRL_SET(ctrl, USB_PM, RMTWKUP_EN);
--- a/drivers/phy/broadcom/phy-brcm-usb-init.h
+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
@@ -6,12 +6,21 @@
#ifndef _USB_BRCM_COMMON_INIT_H
#define _USB_BRCM_COMMON_INIT_H
+#include <linux/regmap.h>
+
#define USB_CTLR_MODE_HOST 0
#define USB_CTLR_MODE_DEVICE 1
#define USB_CTLR_MODE_DRD 2
#define USB_CTLR_MODE_TYPEC_PD 3
-struct brcm_usb_init_params;
+enum brcmusb_reg_sel {
+ BRCM_REGS_CTRL = 0,
+ BRCM_REGS_XHCI_EC,
+ BRCM_REGS_XHCI_GBL,
+ BRCM_REGS_USB_PHY,
+ BRCM_REGS_USB_MDIO,
+ BRCM_REGS_MAX
+};
#define USB_CTRL_REG(base, reg) ((void __iomem *)base + USB_CTRL_##reg)
#define USB_XHCI_EC_REG(base, reg) ((void __iomem *)base + USB_XHCI_EC_##reg)
@@ -41,9 +50,7 @@ struct brcm_usb_init_ops {
};
struct brcm_usb_init_params {
- void __iomem *ctrl_regs;
- void __iomem *xhci_ec_regs;
- void __iomem *xhci_gbl_regs;
+ void __iomem *regs[BRCM_REGS_MAX];
int ioc;
int ipp;
int mode;
@@ -53,10 +60,12 @@ struct brcm_usb_init_params {
const char *family_name;
const u32 *usb_reg_bits_map;
const struct brcm_usb_init_ops *ops;
+ struct regmap *syscon_piarbctl;
};
void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params);
void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params);
+void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params);
static inline u32 brcm_usb_readl(void __iomem *addr)
{
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -16,6 +16,7 @@
#include <linux/interrupt.h>
#include <linux/soc/brcmstb/brcmstb.h>
#include <dt-bindings/phy/phy.h>
+#include <linux/mfd/syscon.h>
#include "phy-brcm-usb-init.h"
@@ -32,6 +33,11 @@ struct value_to_name_map {
const char *name;
};
+struct match_chip_info {
+ void *init_func;
+ u8 required_regs[BRCM_REGS_MAX + 1];
+};
+
static struct value_to_name_map brcm_dr_mode_to_name[] = {
{ USB_CTLR_MODE_HOST, "host" },
{ USB_CTLR_MODE_DEVICE, "peripheral" },
@@ -64,6 +70,10 @@ struct brcm_usb_phy_data {
struct brcm_usb_phy phys[BRCM_USB_PHY_ID_MAX];
};
+static s8 *node_reg_names[BRCM_REGS_MAX] = {
+ "crtl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio"
+};
+
static irqreturn_t brcm_usb_phy_wake_isr(int irq, void *dev_id)
{
struct phy *gphy = dev_id;
@@ -241,15 +251,86 @@ static const struct attribute_group brcm
.attrs = brcm_usb_phy_attrs,
};
+static struct match_chip_info chip_info_7216 = {
+ .init_func = &brcm_usb_dvr_init_7216,
+ .required_regs = {
+ BRCM_REGS_CTRL,
+ BRCM_REGS_XHCI_EC,
+ BRCM_REGS_XHCI_GBL,
+ -1,
+ },
+};
+
+static struct match_chip_info chip_info_7211b0 = {
+ .init_func = &brcm_usb_dvr_init_7211b0,
+ .required_regs = {
+ BRCM_REGS_CTRL,
+ BRCM_REGS_XHCI_EC,
+ BRCM_REGS_XHCI_GBL,
+ BRCM_REGS_USB_PHY,
+ BRCM_REGS_USB_MDIO,
+ -1,
+ },
+};
+
+static struct match_chip_info chip_info_7445 = {
+ .init_func = &brcm_usb_dvr_init_7445,
+ .required_regs = {
+ BRCM_REGS_CTRL,
+ BRCM_REGS_XHCI_EC,
+ -1,
+ },
+};
+
static const struct of_device_id brcm_usb_dt_ids[] = {
{
.compatible = "brcm,bcm7216-usb-phy",
- .data = &brcm_usb_dvr_init_7216,
+ .data = &chip_info_7216,
+ },
+ {
+ .compatible = "brcm,bcm7211-usb-phy",
+ .data = &chip_info_7211b0,
+ },
+ {
+ .compatible = "brcm,brcmstb-usb-phy",
+ .data = &chip_info_7445,
},
- { .compatible = "brcm,brcmstb-usb-phy" },
{ /* sentinel */ }
};
+static int brcm_usb_get_regs(struct platform_device *pdev,
+ enum brcmusb_reg_sel regs,
+ struct brcm_usb_init_params *ini)
+{
+ struct resource *res;
+
+ /* Older DT nodes have ctrl and optional xhci_ec by index only */
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ node_reg_names[regs]);
+ if (res == NULL) {
+ if (regs == BRCM_REGS_CTRL) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ } else if (regs == BRCM_REGS_XHCI_EC) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ /* XHCI_EC registers are optional */
+ if (res == NULL)
+ return 0;
+ }
+ if (res == NULL) {
+ dev_err(&pdev->dev, "can't get %s base address\n",
+ node_reg_names[regs]);
+ return 1;
+ }
+ }
+ ini->regs[regs] = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(ini->regs[regs])) {
+ dev_err(&pdev->dev, "can't map %s register space\n",
+ node_reg_names[regs]);
+ return 1;
+ }
+ return 0;
+}
+
static int brcm_usb_phy_dvr_init(struct platform_device *pdev,
struct brcm_usb_phy_data *priv,
struct device_node *dn)
@@ -325,9 +406,6 @@ static int brcm_usb_phy_dvr_init(struct
static int brcm_usb_phy_probe(struct platform_device *pdev)
{
- struct resource *res_ctrl;
- struct resource *res_xhciec = NULL;
- struct resource *res_xhcigbl = NULL;
struct device *dev = &pdev->dev;
struct brcm_usb_phy_data *priv;
struct phy_provider *phy_provider;
@@ -335,6 +413,10 @@ static int brcm_usb_phy_probe(struct pla
int err;
const char *mode;
const struct of_device_id *match;
+ void (*dvr_init)(struct brcm_usb_init_params *params);
+ const struct match_chip_info *info;
+ struct regmap *rmap;
+ int x;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -345,58 +427,13 @@ static int brcm_usb_phy_probe(struct pla
priv->ini.product_id = brcmstb_get_product_id();
match = of_match_node(brcm_usb_dt_ids, dev->of_node);
- if (match && match->data) {
- void (*dvr_init)(struct brcm_usb_init_params *params);
-
- dvr_init = match->data;
- (*dvr_init)(&priv->ini);
- } else {
- brcm_usb_dvr_init_7445(&priv->ini);
- }
+ info = match->data;
+ dvr_init = info->init_func;
+ (*dvr_init)(&priv->ini);
dev_dbg(dev, "Best mapping table is for %s\n",
priv->ini.family_name);
- /* Newer DT node has reg-names. xhci_ec and xhci_gbl are optional. */
- res_ctrl = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
- if (res_ctrl != NULL) {
- res_xhciec = platform_get_resource_byname(pdev,
- IORESOURCE_MEM,
- "xhci_ec");
- res_xhcigbl = platform_get_resource_byname(pdev,
- IORESOURCE_MEM,
- "xhci_gbl");
- } else {
- /* Older DT node without reg-names, use index */
- res_ctrl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res_ctrl == NULL) {
- dev_err(dev, "can't get CTRL base address\n");
- return -EINVAL;
- }
- res_xhciec = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- }
- priv->ini.ctrl_regs = devm_ioremap_resource(dev, res_ctrl);
- if (IS_ERR(priv->ini.ctrl_regs)) {
- dev_err(dev, "can't map CTRL register space\n");
- return -EINVAL;
- }
- if (res_xhciec) {
- priv->ini.xhci_ec_regs =
- devm_ioremap_resource(dev, res_xhciec);
- if (IS_ERR(priv->ini.xhci_ec_regs)) {
- dev_err(dev, "can't map XHCI EC register space\n");
- return -EINVAL;
- }
- }
- if (res_xhcigbl) {
- priv->ini.xhci_gbl_regs =
- devm_ioremap_resource(dev, res_xhcigbl);
- if (IS_ERR(priv->ini.xhci_gbl_regs)) {
- dev_err(dev, "can't map XHCI Global register space\n");
- return -EINVAL;
- }
- }
-
of_property_read_u32(dn, "brcm,ipp", &priv->ini.ipp);
of_property_read_u32(dn, "brcm,ioc", &priv->ini.ioc);
@@ -412,6 +449,16 @@ static int brcm_usb_phy_probe(struct pla
if (of_property_read_bool(dn, "brcm,has-eohci"))
priv->has_eohci = true;
+ for (x = 0; x < BRCM_REGS_MAX; x++) {
+ if (info->required_regs[x] >= BRCM_REGS_MAX)
+ break;
+
+ err = brcm_usb_get_regs(pdev, info->required_regs[x],
+ &priv->ini);
+ if (err)
+ return -EINVAL;
+ }
+
err = brcm_usb_phy_dvr_init(pdev, priv, dn);
if (err)
return err;
@@ -431,6 +478,15 @@ static int brcm_usb_phy_probe(struct pla
if (err)
dev_warn(dev, "Error creating sysfs attributes\n");
+ /* Get piarbctl syscon if it exists */
+ rmap = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "syscon-piarbctl");
+ if (IS_ERR(rmap))
+ rmap = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "brcm,syscon-piarbctl");
+ if (!IS_ERR(rmap))
+ priv->ini.syscon_piarbctl = rmap;
+
/* start with everything off */
if (priv->has_xhci)
brcm_usb_uninit_xhci(&priv->ini);

44
target/linux/bcm4908/patches-5.4/084-v5.6-0009-phy-usb-fix-driver-to-defer-on-clk_get-defer.patch
View File

@ -1,44 +0,0 @@
From 89927fe0061aaa69b39e95ed793d2c61903b7895 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:07 -0500
Subject: [PATCH] phy: usb: fix driver to defer on clk_get defer
Handle defer on clk_get because the new SCMI clock driver comes
up after this driver.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/phy/broadcom/phy-brcm-usb.c
+++ b/drivers/phy/broadcom/phy-brcm-usb.c
@@ -341,6 +341,8 @@ static int brcm_usb_phy_dvr_init(struct
priv->usb_20_clk = of_clk_get_by_name(dn, "sw_usb");
if (IS_ERR(priv->usb_20_clk)) {
+ if (PTR_ERR(priv->usb_20_clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
dev_info(dev, "Clock not found in Device Tree\n");
priv->usb_20_clk = NULL;
}
@@ -371,6 +373,8 @@ static int brcm_usb_phy_dvr_init(struct
priv->usb_30_clk = of_clk_get_by_name(dn, "sw_usb3");
if (IS_ERR(priv->usb_30_clk)) {
+ if (PTR_ERR(priv->usb_30_clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
dev_info(dev,
"USB3.0 clock not found in Device Tree\n");
priv->usb_30_clk = NULL;
@@ -382,6 +386,8 @@ static int brcm_usb_phy_dvr_init(struct
priv->suspend_clk = clk_get(dev, "usb0_freerun");
if (IS_ERR(priv->suspend_clk)) {
+ if (PTR_ERR(priv->suspend_clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
dev_err(dev, "Suspend Clock not found in Device Tree\n");
priv->suspend_clk = NULL;
}

44
target/linux/bcm4908/patches-5.4/084-v5.6-0010-phy-usb-PHY-s-MDIO-registers-not-accessible-without-.patch
View File

@ -1,44 +0,0 @@
From fc430aea02068150d053ef24bc424db3dd1357d4 Mon Sep 17 00:00:00 2001
From: Al Cooper <alcooperx@gmail.com>
Date: Fri, 3 Jan 2020 13:18:08 -0500
Subject: [PATCH] phy: usb: PHY's MDIO registers not accessible without device
installed
When there is no device connected and FSM is enabled, the XHCI puts
the PHY into suspend mode. When the PHY is put into suspend mode
the USB LDO powers down the PHY. This causes the MDIO to be
inaccessible and its registers reset to default. The fix is to
disable FSM.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
+++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
@@ -56,6 +56,7 @@
#define USB_PHY_PLL_LDO_CTL 0x08
#define USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK 0x00000004
#define USB_PHY_UTMI_CTL_1 0x04
+#define USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800
#define USB_PHY_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c
#define USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT 2
#define USB_PHY_STATUS 0x20
@@ -229,6 +230,14 @@ static void usb_init_common_7211b0(struc
usb_init_common(params);
+ /*
+ * Disable FSM, otherwise the PHY will auto suspend when no
+ * device is connected and will be reset on resume.
+ */
+ reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1);
+ reg &= ~USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK;
+ brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1);
+
usb2_eye_fix_7211b0(params);
}

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