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rockchip: add ArmSoM Sige7 support
This board is also as known as Bananapi BPi-M7. Hardware -------- RockChip RK3588 ARM64 (8 cores) 8/16/32GB LPDDR4/LPDDR4x RAM 2x 2500 Base-T (PCIe, rtl8125b) 2 LEDs (RED / GREEN) 16GB/32GB/64GB/128GB eMMC on-board Micro-SD Slot USB 2.0 Port USB 3.0 Port M.2 M-Key 40-Pin Header USB PD 2.0 9/12/15V Power Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/16462 Signed-off-by: Nick Hainke <vincent@systemli.org>
This commit is contained in:
Tianling Shen
Nick Hainke
parent
0c1332d034
commit
76a75b43ba
@ -7,12 +7,7 @@ rockchip_setup_interfaces()
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local board="$1"
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case "$board" in
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friendlyarm,nanopc-t6|\
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friendlyarm,nanopi-r5c|\
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radxa,e25|\
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radxa,rock-3b)
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ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
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;;
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armsom,sige7|\
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friendlyarm,nanopi-r2c|\
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friendlyarm,nanopi-r2c-plus|\
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friendlyarm,nanopi-r2s|\
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@ -24,6 +19,12 @@ rockchip_setup_interfaces()
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xunlong,orangepi-r1-plus-lts)
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ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
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;;
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friendlyarm,nanopc-t6|\
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friendlyarm,nanopi-r5c|\
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radxa,e25|\
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radxa,rock-3b)
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ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
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;;
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friendlyarm,nanopi-r5s)
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ucidef_set_interfaces_lan_wan 'eth1 eth2' 'eth0'
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;;
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@ -47,6 +48,7 @@ rockchip_setup_macs()
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local label_mac=""
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case "$board" in
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armsom,sige7|\
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friendlyarm,nanopc-t6|\
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friendlyarm,nanopi-r2c|\
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friendlyarm,nanopi-r2s)
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@ -29,6 +29,7 @@ set_interface_core() {
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}
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case "$(board_name)" in
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armsom,sige7|\
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friendlyarm,nanopc-t6|\
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friendlyarm,nanopi-r5c|\
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friendlyarm,nanopi-r6c|\
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@ -5,6 +5,17 @@
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# FIT will be loaded at 0x02080000. Leave 16M for that, align it to 2M and load the kernel after it.
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KERNEL_LOADADDR := 0x03200000
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define Device/armsom_sige7
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DEVICE_VENDOR := ArmSoM
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DEVICE_MODEL := Sige7
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DEVICE_ALT0_VENDOR := Bananapi
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DEVICE_ALT0_MODEL := BPi-M7
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SOC := rk3588
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DEVICE_DTS := rockchip/rk3588-armsom-sige7
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DEVICE_PACKAGES := kmod-r8169
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endef
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TARGET_DEVICES += armsom_sige7
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define Device/firefly_roc-rk3328-cc
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DEVICE_VENDOR := Firefly
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DEVICE_MODEL := ROC-RK3328-CC
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@ -0,0 +1,778 @@
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From 81c828a67c78bb03ea75819c417c93c7f3d637b5 Mon Sep 17 00:00:00 2001
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From: Jianfeng Liu <liujianfeng1994@gmail.com>
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Date: Sat, 20 Apr 2024 11:43:00 +0800
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Subject: [PATCH] arm64: dts: rockchip: Add ArmSom Sige7 board
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Specification:
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Rockchip Rk3588 SoC
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4x ARM Cortex-A76, 4x ARM Cortex-A55
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8/16/32GB Memory LPDDR4/LPDDR4x
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Mali G610MP4 GPU
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2× MIPI-CSI Connector
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1× MIPI-DSI Connector
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1x M.2 Key M (PCIe 3.0 4-lanes)
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2x RTL8125 2.5G Ethernet
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Onboard AP6275P for WIFI6/BT5
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32GB/64GB/128GB eMMC
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MicroSD card slot
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1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C
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1x HDMI Output, 1x type-C DP Output
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Functions work normally:
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USB2.0 Host
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USB3.0 Type-A Host
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M.2 Key M (PCIe 3.0 4-lanes)
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2x RTL8125 2.5G Ethernet
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eMMC
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MicroSD card
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More information can be obtained from the following website
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https://docs.armsom.org/armsom-sige7
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Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
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Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
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Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3588-armsom-sige7.dts | 721 ++++++++++++++++++
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2 files changed, 722 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ra
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
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@@ -0,0 +1,721 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include "rk3588.dtsi"
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+
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+/ {
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+ model = "ArmSoM Sige7";
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+ compatible = "armsom,sige7", "rockchip,rk3588";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ analog-sound {
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+ compatible = "audio-graph-card";
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+ dais = <&i2s0_8ch_p0>;
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+ label = "rk3588-es8316";
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+ hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_detect>;
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+ routing = "MIC2", "Mic Jack",
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+ "Headphones", "HPOL",
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+ "Headphones", "HPOR";
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+ widgets = "Microphone", "Mic Jack",
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+ "Headphone", "Headphones";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_rgb_g>;
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+
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+ led_green: led-0 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_STATUS;
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+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+
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+ led_red: led-1 {
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+ color = <LED_COLOR_ID_RED>;
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+ function = LED_FUNCTION_STATUS;
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+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "none";
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+ };
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+ };
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+
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+ fan: pwm-fan {
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+ compatible = "pwm-fan";
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+ cooling-levels = <0 95 145 195 255>;
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+ fan-supply = <&vcc5v0_sys>;
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+ pwms = <&pwm1 0 50000 0>;
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+ #cooling-cells = <2>;
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+ };
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+
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+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_pcie2x1l2";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <5000>;
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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+ regulator-name = "vcc3v3_pcie30";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <5000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_host";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v1_nldo_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+};
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+
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+&combphy0_ps {
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+ status = "okay";
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+};
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+
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+&combphy1_ps {
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+ status = "okay";
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+};
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+
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+&combphy2_psu {
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+ status = "okay";
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b2 {
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+&cpu_b3 {
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu_s0>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c0m2_xfer>;
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+ status = "okay";
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+
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+ vdd_cpu_big0_s0: regulator@42 {
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+ compatible = "rockchip,rk8602";
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+ reg = <0x42>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu_big0_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <550000>;
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+ regulator-max-microvolt = <1050000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_cpu_big1_s0: regulator@43 {
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+ compatible = "rockchip,rk8603", "rockchip,rk8602";
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+ reg = <0x43>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu_big1_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <550000>;
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+ regulator-max-microvolt = <1050000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+};
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+
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+&i2c6 {
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+ status = "okay";
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+
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+ hym8563: rtc@51 {
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+ compatible = "haoyu,hym8563";
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+ reg = <0x51>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <0>;
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+ clock-output-names = "hym8563";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hym8563_int>;
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+ wakeup-source;
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+ };
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+};
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+
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+&i2c7 {
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+ status = "okay";
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+
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+ es8316: audio-codec@11 {
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+ compatible = "everest,es8316";
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+ reg = <0x11>;
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+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
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+ assigned-clock-rates = <12288000>;
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+ clocks = <&cru I2S0_8CH_MCLKOUT>;
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+ clock-names = "mclk";
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+ #sound-dai-cells = <0>;
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+
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+ port {
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+ es8316_p0_0: endpoint {
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+ remote-endpoint = <&i2s0_8ch_p0_0>;
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+ };
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+ };
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+ };
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+};
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+
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+&i2s0_8ch {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2s0_lrck
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+ &i2s0_mclk
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+ &i2s0_sclk
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+ &i2s0_sdi0
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+ &i2s0_sdo0>;
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+ status = "okay";
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+
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+ i2s0_8ch_p0: port {
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+ i2s0_8ch_p0_0: endpoint {
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+ dai-format = "i2s";
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+ mclk-fs = <256>;
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+ remote-endpoint = <&es8316_p0_0>;
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+ };
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+ };
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+};
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+
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+/* phy1 - right ethernet port */
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+&pcie2x1l0 {
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+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+};
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+
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+/* phy2 - WiFi */
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+&pcie2x1l1 {
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+ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+};
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+
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+/* phy0 - left ethernet port */
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+&pcie2x1l2 {
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+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
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+ status = "okay";
|
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+};
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+
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+&pcie30phy {
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+ status = "okay";
|
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+};
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+
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+&pcie3x4 {
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+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
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+ vpcie3v3-supply = <&vcc3v3_pcie30>;
|
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+ status = "okay";
|
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+};
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+
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+&pinctrl {
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+ hym8563 {
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+ hym8563_int: hym8563-int {
|
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+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
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+ };
|
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+ };
|
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+
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+ leds {
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+ led_rgb_g: led-rgb-g {
|
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+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
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+ };
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+ led_rgb_r: led-rgb-r {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ hp_detect: hp-detect {
|
||||
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&avcc_1v8_s0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ no-sdio;
|
||||
+ no-sd;
|
||||
+ non-removable;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ max-frequency = <200000000>;
|
||||
+ no-sdio;
|
||||
+ no-mmc;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_3v3_s3>;
|
||||
+ vqmmc-supply = <&vccio_sd_s0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spi2 {
|
||||
+ assigned-clocks = <&cru CLK_SPI2>;
|
||||
+ assigned-clock-rates = <200000000>;
|
||||
+ num-cs = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pmic@0 {
|
||||
+ compatible = "rockchip,rk806";
|
||||
+ spi-max-frequency = <1000000>;
|
||||
+ reg = <0x0>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
+
|
||||
+ system-power-controller;
|
||||
+
|
||||
+ vcc1-supply = <&vcc5v0_sys>;
|
||||
+ vcc2-supply = <&vcc5v0_sys>;
|
||||
+ vcc3-supply = <&vcc5v0_sys>;
|
||||
+ vcc4-supply = <&vcc5v0_sys>;
|
||||
+ vcc5-supply = <&vcc5v0_sys>;
|
||||
+ vcc6-supply = <&vcc5v0_sys>;
|
||||
+ vcc7-supply = <&vcc5v0_sys>;
|
||||
+ vcc8-supply = <&vcc5v0_sys>;
|
||||
+ vcc9-supply = <&vcc5v0_sys>;
|
||||
+ vcc10-supply = <&vcc5v0_sys>;
|
||||
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
+ vcc12-supply = <&vcc5v0_sys>;
|
||||
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||||
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||||
+ vcca-supply = <&vcc5v0_sys>;
|
||||
+
|
||||
+ rk806_dvs1_null: dvs1-null-pins {
|
||||
+ pins = "gpio_pwrctrl1";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_null: dvs2-null-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_null: dvs3-null-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_gpu_s0";
|
||||
+ regulator-enable-ramp-delay = <400>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_cpu_lit_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_log_s0: dcdc-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <675000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_log_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <750000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_vdenc_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_ddr_s0: dcdc-reg5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <675000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_ddr_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <850000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd2_ddr_s3: dcdc-reg6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vdd2_ddr_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_2v0_pldo_s3: dcdc-reg7 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <2000000>;
|
||||
+ regulator-max-microvolt = <2000000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_2v0_pldo_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <2000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3_s3: dcdc-reg8 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc_3v3_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vddq_ddr_s0: dcdc-reg9 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vddq_ddr_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8_s3: dcdc-reg10 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc_1v8_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ avcc_1v8_s0: pldo-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "avcc_1v8_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8_s0: pldo-reg2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc_1v8_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ avdd_1v2_s0: pldo-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-name = "avdd_1v2_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3_s0: pldo-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vcc_3v3_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd_s0: pldo-reg5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vccio_sd_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pldo6_s3: pldo-reg6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "pldo6_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_0v75_s3: nldo-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-name = "vdd_0v75_s3";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <750000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_ddr_pll_s0: nldo-reg2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ regulator-name = "vdd_ddr_pll_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <850000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ avdd_0v75_s0: nldo-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-name = "avdd_0v75_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_0v85_s0: nldo-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ regulator-name = "vdd_0v85_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_0v75_s0: nldo-reg5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-name = "vdd_0v75_s0";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&u2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy0_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy1_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy3_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-0 = <&uart2m0_xfer>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdp_phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
@ -25,6 +25,19 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 4 ++++
|
||||
8 files changed, 32 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
@@ -673,6 +673,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&tsadc {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
|
||||
@@ -807,6 +807,10 @@
|
||||
@ -0,0 +1,25 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Tianling Shen <cnsztl@gmail.com>
|
||||
Date: Mon Sep 23 13:22:56 2024 +0800
|
||||
Subject: [PATCH] arm64: dts: rockchip: Update LED properties for ArmSom
|
||||
Sige7
|
||||
|
||||
Add OpenWrt's LED aliases for showing system status.
|
||||
|
||||
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
|
||||
---
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
@@ -13,6 +13,11 @@
|
||||
aliases {
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdmmc;
|
||||
+
|
||||
+ led-boot = &led_red;
|
||||
+ led-failsafe = &led_red;
|
||||
+ led-running = &led_red;
|
||||
+ led-upgrade = &led_red;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@ -0,0 +1,26 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Tianling Shen <cnsztl@gmail.com>
|
||||
Date: Mon Sep 23 13:22:56 2024 +0800
|
||||
Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for ArmSom Sige7
|
||||
|
||||
The previously stated speed of sdr-104 in is too high for the hardware
|
||||
to reliably communicate with some fast SD cards.
|
||||
Rockchip boards have a common bug when operating uhs speed, which will
|
||||
hang the system during a soft reboot.
|
||||
|
||||
To be on the safe side, lower the speed to workaround.
|
||||
|
||||
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
|
||||
---
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
|
||||
@@ -346,7 +346,7 @@
|
||||
max-frequency = <200000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
- sd-uhs-sdr104;
|
||||
+ sd-uhs-sdr50;
|
||||
vmmc-supply = <&vcc_3v3_s3>;
|
||||
vqmmc-supply = <&vccio_sd_s0>;
|
||||
status = "okay";
|
||||
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Block a user