mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
linux: add support of Synopsys ARCHS38-based boards
This patch introduces support of new boards with ARC HS38 cores.
ARC HS38 is a new generation of ARC cores which utilize ARCv2 ISA.
As with ARC770 we're addind support for 2 boards for now:
[1] Synopsys SDP board (AXS103)
This is the same base-board as in AXS101 but with
FPGA-based CPU-tile where ARCHs38 core is implemented.
[2] nSIM
Again this is the same simulation engine but configured for
new instruction set and features of new CPU.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48740
This commit is contained in:
John Crispin
parent
7b821a5ae8
commit
73015c4cb3
@ -265,6 +265,7 @@ ifeq ($(DUMP),1)
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CPU_TYPE ?= arc700
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CPU_CFLAGS += -matomic
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CPU_CFLAGS_arc700 = -marc700
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CPU_CFLAGS_archs = -marchs
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endif
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DEFAULT_CFLAGS=$(strip $(CPU_CFLAGS) $(CPU_CFLAGS_$(CPU_TYPE)) $(CPU_CFLAGS_$(CPU_SUBTYPE)))
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endif
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26
target/linux/archs38/Makefile
Normal file
26
target/linux/archs38/Makefile
Normal file
@ -0,0 +1,26 @@
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#
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# Copyright (C) 2016 OpenWrt.org
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk
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ARCH:=arc
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CPU_TYPE:=archs
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BOARD:=archs38
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BOARDNAME:=Synopsys DesignWare ARC HS38
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MAINTAINER:=Alexey Brodkin <abrodkin@synopsys.com>
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SUBTARGETS:=generic
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KERNEL_PATCHVER:=4.4
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DEVICE_TYPE:=developerboard
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include $(INCLUDE_DIR)/target.mk
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define Target/Description
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Synopsys DesignWare boards
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endef
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$(eval $(call BuildTarget))
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3
target/linux/archs38/base-files.mk
Normal file
3
target/linux/archs38/base-files.mk
Normal file
@ -0,0 +1,3 @@
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define Package/base-files/install-target
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rm -f $(1)/etc/config/network
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endef
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19
target/linux/archs38/base-files/etc/board.d/02_network
Executable file
19
target/linux/archs38/base-files/etc/board.d/02_network
Executable file
@ -0,0 +1,19 @@
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#!/bin/sh
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#
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# Copyright (C) 2016 OpenWrt.org
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#
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. /lib/arc.sh
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. /lib/functions/uci-defaults.sh
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board_config_update
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case "$( arc_board_name )" in
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"arc-sdp"*)
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ucidef_set_interface_lan "eth0" "dhcp"
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;;
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esac
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board_config_flush
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exit 0
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50
target/linux/archs38/base-files/lib/arc.sh
Normal file
50
target/linux/archs38/base-files/lib/arc.sh
Normal file
@ -0,0 +1,50 @@
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#!/bin/sh
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#
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# Copyright (C) 2016 OpenWrt.org
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#
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# defaults
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ARC_BOARD_NAME="generic"
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ARC_BOARD_MODEL="Generic ARC board"
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arc_board_detect() {
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local board
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local model
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local compatible
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[ -e "/tmp/sysinfo/" ] || mkdir -p "/tmp/sysinfo/"
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model="$( cat /proc/device-tree/model )"
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compatible="$( cat /proc/device-tree/compatible )"
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case "$compatible" in
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"snps,axs103""snps,arc-sdp")
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board="arc-sdp";
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;;
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"snps,nsim_hs")
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board="arc-nsim";
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;;
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esac
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if [ "$board" != "" ]; then
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ARC_BOARD_NAME="$board"
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fi
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if [ "$model" != "" ]; then
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ARC_BOARD_MODEL="$model"
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fi
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echo "$ARC_BOARD_NAME" > /tmp/sysinfo/board_name
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echo "$ARC_BOARD_MODEL" > /tmp/sysinfo/model
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echo "Detected $ARC_BOARD_NAME // $ARC_BOARD_MODEL"
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}
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arc_board_name() {
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local name
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[ -f /tmp/sysinfo/board_name ] && name="$(cat /tmp/sysinfo/board_name)"
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[ -z "$name" ] && name="unknown"
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echo "$name"
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}
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@ -0,0 +1,9 @@
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#!/bin/sh
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do_arc() {
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. /lib/arc.sh
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arc_board_detect
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}
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boot_hook_add preinit_main do_arc
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183
target/linux/archs38/config-4.4
Normal file
183
target/linux/archs38/config-4.4
Normal file
@ -0,0 +1,183 @@
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# CONFIG_16KSTACKS is not set
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CONFIG_ARC=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
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# CONFIG_ARCH_HAS_SG_CHAIN is not set
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
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CONFIG_ARC_BUILTIN_DTB_NAME=""
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CONFIG_ARC_CACHE=y
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CONFIG_ARC_CACHE_LINE_SHIFT=6
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CONFIG_ARC_CACHE_PAGES=y
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# CONFIG_ARC_CANT_LLSC is not set
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CONFIG_ARC_CPU_HS=y
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CONFIG_ARC_CURR_IN_REG=y
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CONFIG_ARC_DBG=y
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# CONFIG_ARC_DBG_TLB_MISS_COUNT is not set
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# CONFIG_ARC_DBG_TLB_PARANOIA is not set
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CONFIG_ARC_DW2_UNWIND=y
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CONFIG_ARC_HAS_COH_CACHES=y
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CONFIG_ARC_HAS_DCACHE=y
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# CONFIG_ARC_HAS_DCCM is not set
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CONFIG_ARC_HAS_DIV_REM=y
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CONFIG_ARC_HAS_GRTC=y
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CONFIG_ARC_HAS_HW_MPY=y
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CONFIG_ARC_HAS_ICACHE=y
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# CONFIG_ARC_HAS_ICCM is not set
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CONFIG_ARC_HAS_LL64=y
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CONFIG_ARC_HAS_LLSC=y
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# CONFIG_ARC_HAS_PAE40 is not set
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# CONFIG_ARC_HAS_REENTRANT_IRQ_LV2 is not set
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CONFIG_ARC_HAS_SWAPE=y
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# CONFIG_ARC_IPI_DBG is not set
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CONFIG_ARC_MCIP=y
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# CONFIG_ARC_METAWARE_HLINK is not set
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CONFIG_ARC_MMU_V4=y
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CONFIG_ARC_NUMBER_OF_INTERRUPTS=32
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# CONFIG_ARC_PAGE_SIZE_16K is not set
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# CONFIG_ARC_PAGE_SIZE_4K is not set
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CONFIG_ARC_PAGE_SIZE_8K=y
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CONFIG_ARC_PLAT_AXS10X=y
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CONFIG_ARC_PLAT_SIM=y
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# CONFIG_ARC_PLAT_TB10X is not set
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# CONFIG_ARC_SMP_HALT_ON_RESET is not set
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CONFIG_ARC_STAR_9000923308=y
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# CONFIG_ARC_UBOOT_SUPPORT is not set
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CONFIG_AXS103=y
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_COMMON_CLK=y
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# CONFIG_CPU_BIG_ENDIAN is not set
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CONFIG_CPU_RMAP=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_WORKQUEUE=y
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CONFIG_DTC=y
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CONFIG_DWMAC_GENERIC=y
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# CONFIG_DWMAC_SUNXI is not set
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CONFIG_DW_APB_ICTL=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CSUM=y
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CONFIG_GENERIC_FIND_FIRST_BIT=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_CHIP=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PENDING_IRQ=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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# CONFIG_GEN_RTC is not set
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVRES=y
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CONFIG_GPIO_DWAPB=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
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# CONFIG_HAVE_ARCH_BITREVERSE is not set
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_CLK=y
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CONFIG_HAVE_CLK_PREPARE=y
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CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
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CONFIG_HAVE_FUTEX_CMPXCHG=y
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_IOREMAP_PROT=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_WORK=y
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# CONFIG_ISA_ARCOMPACT is not set
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CONFIG_ISA_ARCV2=y
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CONFIG_KALLSYMS=y
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CONFIG_LIBFDT=y
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CONFIG_LINUX_LINK_BASE=0x80000000
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MFD_SYSCON=y
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CONFIG_MMC=y
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CONFIG_MMC_DW=y
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# CONFIG_MMC_DW_EXYNOS is not set
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# CONFIG_MMC_DW_K3 is not set
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CONFIG_MMC_DW_PLTFM=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_PLTFM=y
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CONFIG_MODULES_USE_ELF_RELA=y
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_NATIONAL_PHY=y
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# CONFIG_NET_CADENCE is not set
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NET_PTP_CLASSIFY=y
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# CONFIG_NET_VENDOR_ARC is not set
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# CONFIG_NET_VENDOR_BROADCOM is not set
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# CONFIG_NET_VENDOR_INTEL is not set
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# CONFIG_NET_VENDOR_MARVELL is not set
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# CONFIG_NET_VENDOR_MICREL is not set
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# CONFIG_NET_VENDOR_NATSEMI is not set
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# CONFIG_NET_VENDOR_QUALCOMM is not set
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# CONFIG_NET_VENDOR_ROCKER is not set
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# CONFIG_NET_VENDOR_SAMSUNG is not set
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# CONFIG_NET_VENDOR_SEEQ is not set
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# CONFIG_NET_VENDOR_VIA is not set
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# CONFIG_NET_VENDOR_WIZNET is not set
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CONFIG_NO_BOOTMEM=y
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CONFIG_NO_IOPORT_MAP=y
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CONFIG_NR_CPUS=4
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_MTD=y
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CONFIG_OF_NET=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PGTABLE_LEVELS=2
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CONFIG_PHYLIB=y
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CONFIG_PPS=y
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CONFIG_PREEMPT=y
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CONFIG_PREEMPT_COUNT=y
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# CONFIG_PREEMPT_NONE is not set
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CONFIG_PREEMPT_RCU=y
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CONFIG_PTP_1588_CLOCK=y
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CONFIG_RATIONAL=y
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# CONFIG_RCU_BOOST is not set
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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# CONFIG_RTC is not set
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# CONFIG_SCHED_INFO is not set
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# CONFIG_SCSI_DMA is not set
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CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
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CONFIG_SERIAL_8250_DW=y
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# CONFIG_SERIAL_8250_FSL is not set
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CONFIG_SERIAL_8250_NR_UARTS=4
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CONFIG_SERIAL_8250_RUNTIME_UARTS=4
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CONFIG_SERIAL_ARC=y
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CONFIG_SERIAL_ARC_CONSOLE=y
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CONFIG_SERIAL_ARC_NR_PORTS=1
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SMP=y
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CONFIG_SRCU=y
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CONFIG_STACKTRACE=y
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CONFIG_STMMAC_ETH=y
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CONFIG_STMMAC_PLATFORM=y
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# CONFIG_SUNXI_SRAM is not set
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_UNINLINE_SPIN_UNLOCK=y
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CONFIG_USB_SUPPORT=y
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CONFIG_XPS=y
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CONFIG_ZONE_DMA_FLAG=0
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126
target/linux/archs38/dts/axc003_idu.dtsi
Normal file
126
target/linux/archs38/dts/axc003_idu.dtsi
Normal file
@ -0,0 +1,126 @@
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/*
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* Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
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*/
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/ {
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compatible = "snps,arc";
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clock-frequency = <90000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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cpu_card {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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idu_intc: idu-interrupt-controller {
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compatible = "snps,archs-idu-intc";
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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/*
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* <hwirq distribution>
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* distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
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*/
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#interrupt-cells = <2>;
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/*
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* upstream irqs to core intc - downstream these are
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* "COMMON" irq 0,1..
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*/
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interrupts = <24 25>;
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};
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/*
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* this GPIO block ORs all interrupts on CPU card (creg,..)
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* to uplink only 1 IRQ to ARC core intc
|
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*/
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dw-apb-gpio@0x2000 {
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compatible = "snps,dw-apb-gpio";
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reg = < 0x2000 0x80 >;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
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ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
|
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&idu_intc>;
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/*
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* cmn irq 1 -> cpu irq 25
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* Distribute to cpu0 only
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*/
|
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interrupts = <1 1>;
|
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};
|
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};
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debug_uart: dw-apb-uart@0x5000 {
|
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compatible = "snps,dw-apb-uart";
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reg = <0x5000 0x100>;
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clock-frequency = <33333000>;
|
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interrupt-parent = <&ictl_intc>;
|
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interrupts = <2 4>;
|
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baud = <115200>;
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reg-shift = <2>;
|
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reg-io-width = <4>;
|
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};
|
||||
|
||||
arcpct0: pct {
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compatible = "snps,archs-pct";
|
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#interrupt-cells = <1>;
|
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interrupt-parent = <&cpu_intc>;
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interrupts = <20>;
|
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};
|
||||
};
|
||||
|
||||
/*
|
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* This INTC is actually connected to DW APB GPIO
|
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* which acts as a wire between MB INTC and CPU INTC.
|
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* GPIO INTC is configured in platform init code
|
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* and here we mimic direct connection from MB INTC to
|
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* CPU INTC, thus we set "interrupts = <0 1>" instead of
|
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* "interrupts = <12>"
|
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*
|
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* This intc actually resides on MB, but we move it here to
|
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* avoid duplicating the MB dtsi file given that IRQ from
|
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* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
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reg = < 0xe0012000 0x200 >;
|
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interrupt-controller;
|
||||
interrupt-parent = <&idu_intc>;
|
||||
interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24
|
||||
distribute to cpu0 only */
|
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};
|
||||
|
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memory {
|
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#address-cells = <1>;
|
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#size-cells = <1>;
|
||||
ranges = <0x00000000 0x80000000 0x40000000>;
|
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device_type = "memory";
|
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reg = <0x80000000 0x20000000>; /* 512MiB */
|
||||
};
|
||||
};
|
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25
target/linux/archs38/dts/axs103_idu.dts
Normal file
25
target/linux/archs38/dts/axs103_idu.dts
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Device Tree for AXS103 SDP with AXS10X Main Board and
|
||||
* AXC003 FPGA Card (with SMP bitfile)
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "axc003_idu.dtsi"
|
||||
/include/ "axs10x_mb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Synopsys AXS103 Development Board";
|
||||
compatible = "snps,axs103", "snps,arc-sdp";
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8";
|
||||
};
|
||||
};
|
||||
225
target/linux/archs38/dts/axs10x_mb.dtsi
Normal file
225
target/linux/archs38/dts/axs10x_mb.dtsi
Normal file
@ -0,0 +1,225 @@
|
||||
/*
|
||||
* Support for peripherals on the AXS10x mainboard
|
||||
*
|
||||
* Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/ {
|
||||
axs10x_mb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0xe0000000 0x10000000>;
|
||||
interrupt-parent = <&mb_intc>;
|
||||
|
||||
clocks {
|
||||
i2cclk: i2cclk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <50000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
apbclk: apbclk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <50000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
mmcclk: mmcclk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <50000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@0x18000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = < 0x18000 0x2000 >;
|
||||
interrupts = < 4 >;
|
||||
interrupt-names = "macirq";
|
||||
phy-mode = "rgmii";
|
||||
snps,pbl = < 32 >;
|
||||
clocks = <&apbclk>;
|
||||
clock-names = "stmmaceth";
|
||||
max-speed = <100>;
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = < 0x40000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = < 0x60000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
/*
|
||||
* According to DW Mobile Storage databook it is required
|
||||
* to use "Hold Register" if card is enumerated in SDR12 or
|
||||
* SDR25 modes.
|
||||
*
|
||||
* Utilization of "Hold Register" is already implemented via
|
||||
* dw_mci_pltfm_prepare_command() which in its turn gets
|
||||
* used through dw_mci_drv_data->prepare_command call-back.
|
||||
* This call-back is used in Altera Socfpga platform and so
|
||||
* we may reuse it saying that we're compatible with their
|
||||
* "altr,socfpga-dw-mshc".
|
||||
*
|
||||
* Most probably "Hold Register" utilization is platform-
|
||||
* independent requirement which means that single unified
|
||||
* "snps,dw-mshc" should be enough for all users of DW MMC once
|
||||
* dw_mci_pltfm_prepare_command() is used in generic platform
|
||||
* code.
|
||||
*/
|
||||
mmc@0x15000 {
|
||||
compatible = "altr,socfpga-dw-mshc";
|
||||
reg = < 0x15000 0x400 >;
|
||||
num-slots = < 1 >;
|
||||
fifo-depth = < 16 >;
|
||||
card-detect-delay = < 200 >;
|
||||
clocks = <&apbclk>, <&mmcclk>;
|
||||
clock-names = "biu", "ciu";
|
||||
interrupts = < 7 >;
|
||||
bus-width = < 4 >;
|
||||
};
|
||||
|
||||
uart@0x20000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x20000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <17>;
|
||||
baud = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x21000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x21000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <18>;
|
||||
baud = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
/* UART muxed with USB data port (ttyS3) */
|
||||
uart@0x22000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x22000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <19>;
|
||||
baud = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
i2c@0x1d000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0x1d000 0x100>;
|
||||
clock-frequency = <400000>;
|
||||
clocks = <&i2cclk>;
|
||||
interrupts = <14>;
|
||||
};
|
||||
|
||||
i2c@0x1e000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0x1e000 0x100>;
|
||||
clock-frequency = <400000>;
|
||||
clocks = <&i2cclk>;
|
||||
interrupts = <15>;
|
||||
};
|
||||
|
||||
i2c@0x1f000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x1f000 0x100>;
|
||||
clock-frequency = <400000>;
|
||||
clocks = <&i2cclk>;
|
||||
interrupts = <16>;
|
||||
|
||||
eeprom@0x54{
|
||||
compatible = "24c01";
|
||||
reg = <0x54>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
|
||||
eeprom@0x57{
|
||||
compatible = "24c04";
|
||||
reg = <0x57>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio0:gpio@13000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x13000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio0_banka: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
gpio0_bankb: gpio-controller@1 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <8>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
gpio0_bankc: gpio-controller@2 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <8>;
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1:gpio@14000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x14000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio1_banka: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <30>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
gpio1_bankb: gpio-controller@1 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <10>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
gpio1_bankc: gpio-controller@2 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <8>;
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
73
target/linux/archs38/dts/nsim_hs_idu.dts
Normal file
73
target/linux/archs38/dts/nsim_hs_idu.dts
Normal file
@ -0,0 +1,73 @@
|
||||
/*
|
||||
* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Synopsys ARC HS38 nSIM simulator";
|
||||
compatible = "snps,nsim_hs";
|
||||
interrupt-parent = <&core_intc>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &arcuart0;
|
||||
};
|
||||
|
||||
fpga {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* child and parent address space 1:1 mapped */
|
||||
ranges;
|
||||
|
||||
core_intc: core-interrupt-controller {
|
||||
compatible = "snps,archs-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
idu_intc: idu-interrupt-controller {
|
||||
compatible = "snps,archs-idu-intc";
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&core_intc>;
|
||||
|
||||
/*
|
||||
* <hwirq distribution>
|
||||
* distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
|
||||
*/
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
/*
|
||||
* upstream irqs to core intc - downstream these are
|
||||
* "COMMON" irq 0,1..
|
||||
*/
|
||||
interrupts = <24 25 26 27 28 29 30 31>;
|
||||
};
|
||||
|
||||
arcuart0: serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupt-parent = <&idu_intc>;
|
||||
interrupts = <0 0>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
arcpct0: pct {
|
||||
compatible = "snps,archs-pct";
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
37
target/linux/archs38/dts/skeleton.dtsi
Normal file
37
target/linux/archs38/dts/skeleton.dtsi
Normal file
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Skeleton device tree; the bare minimum needed to boot; just include and
|
||||
* add a compatible value.
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "snps,arc";
|
||||
clock-frequency = <80000000>; /* 80 MHZ */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
aliases { };
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "snps,arc770d";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256M */
|
||||
};
|
||||
};
|
||||
16
target/linux/archs38/generic/profiles/00-default.mk
Normal file
16
target/linux/archs38/generic/profiles/00-default.mk
Normal file
@ -0,0 +1,16 @@
|
||||
#
|
||||
# Copyright (C) 2016 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
define Profile/Default
|
||||
NAME:=Default Profile (all drivers)
|
||||
PACKAGES:= kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-mmc kmod-sdhci
|
||||
endef
|
||||
|
||||
define Profile/Default/Description
|
||||
Default package set compatible with most boards.
|
||||
endef
|
||||
$(eval $(call Profile,Default))
|
||||
15
target/linux/archs38/generic/profiles/01-minimal.mk
Normal file
15
target/linux/archs38/generic/profiles/01-minimal.mk
Normal file
@ -0,0 +1,15 @@
|
||||
#
|
||||
# Copyright (C) 2016 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
define Profile/Minimal
|
||||
NAME:=Minimal Profile (no drivers)
|
||||
endef
|
||||
|
||||
define Profile/Minimal/Description
|
||||
Minimal package set compatible with most boards.
|
||||
endef
|
||||
$(eval $(call Profile,Minimal))
|
||||
16
target/linux/archs38/generic/profiles/02-axs103.mk
Normal file
16
target/linux/archs38/generic/profiles/02-axs103.mk
Normal file
@ -0,0 +1,16 @@
|
||||
#
|
||||
# Copyright (C) 2016 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
define Profile/axs103
|
||||
NAME:=Synopsys DesignWare AXS103
|
||||
PACKAGES:= kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-mmc kmod-sdhci
|
||||
endef
|
||||
|
||||
define Profile/axs103/Description
|
||||
Package set compatible with hardware using Synopsys DesignWare AXS103 boards.
|
||||
endef
|
||||
$(eval $(call Profile,axs103))
|
||||
15
target/linux/archs38/generic/profiles/03-nsim_hs.mk
Normal file
15
target/linux/archs38/generic/profiles/03-nsim_hs.mk
Normal file
@ -0,0 +1,15 @@
|
||||
#
|
||||
# Copyright (C) 2016 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
define Profile/nsim_hs
|
||||
NAME:=Synopsys nSIM
|
||||
endef
|
||||
|
||||
define Profile/nsim_hs/Description
|
||||
Package set compatible with hardware using Synopsys nSIM HS boards.
|
||||
endef
|
||||
$(eval $(call Profile,nsim_hs))
|
||||
8
target/linux/archs38/generic/target.mk
Normal file
8
target/linux/archs38/generic/target.mk
Normal file
@ -0,0 +1,8 @@
|
||||
BOARDNAME:=Generic
|
||||
FEATURES += ramdisk usb
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for generic ARC HS38 based boards.
|
||||
endef
|
||||
|
||||
|
||||
41
target/linux/archs38/image/Makefile
Normal file
41
target/linux/archs38/image/Makefile
Normal file
@ -0,0 +1,41 @@
|
||||
#
|
||||
# Copyright (C) 2016 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/image.mk
|
||||
|
||||
define Build/patch-dtb
|
||||
$(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb)
|
||||
$(STAGING_DIR_HOST)/bin/patch-dtb $@ $@.dtb
|
||||
endef
|
||||
|
||||
# Shared device definition: applies to every defined device
|
||||
define Device/Default
|
||||
PROFILES = Default $$(DEVICE_PROFILE)
|
||||
KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts)
|
||||
KERNEL_SUFFIX := .elf
|
||||
KERNEL_INITRAMFS := kernel-bin | patch-dtb
|
||||
KERNEL_INITRAMFS_NAME = $$(KERNEL_NAME)-initramfs.elf
|
||||
DEVICE_PROFILE :=
|
||||
DEVICE_DTS :=
|
||||
endef
|
||||
DEVICE_VARS += DEVICE_PROFILE DEVICE_DTS
|
||||
|
||||
define add_archs38
|
||||
define Device/$(1)
|
||||
DEVICE_PROFILE := $(1)
|
||||
DEVICE_DTS := $(1)
|
||||
endef
|
||||
TARGET_DEVICES += $(1)
|
||||
endef
|
||||
|
||||
# DesignWare AXS103
|
||||
$(eval $(call add_archs38,axs103_idu))
|
||||
|
||||
# nSIM with ARCHS38
|
||||
$(eval $(call add_archs38,nsim_hs_idu))
|
||||
|
||||
$(eval $(call BuildImage))
|
||||
Loading…
Reference in New Issue
Block a user