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ipq40xx: update ESS reset patch with pending upstream

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Use the split version of ESS reset patch that was sent upstream.

Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Robert Marko 2023-08-14 13:06:27 +02:00 committed by Christian Marangi
parent 9bfbdfa778
commit 70dfb696c0
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GPG Key ID: AC001D09ADBFEAD7
3 changed files with 55 additions and 52 deletions
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27
target/linux/ipq40xx/patches-5.15/100-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch Normal file
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@ -0,0 +1,27 @@
From 53cac0823f86c39eb4b00e2c9a7b2483a4182008 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Mon, 14 Aug 2023 12:37:58 +0200
Subject: [PATCH 1/2] dt-bindings: clock: qcom: ipq4019: add missing networking
resets
Add bindings for the missing networking resets found in IPQ4019 GCC.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
include/dt-bindings/clock/qcom,gcc-ipq4019.h | 6 ++++++
1 file changed, 6 insertions(+)
--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
@@ -165,5 +165,11 @@
#define GCC_QDSS_BCR 69
#define GCC_MPM_BCR 70
#define GCC_SPDM_BCR 71
+#define ESS_MAC1_ARES 72
+#define ESS_MAC2_ARES 73
+#define ESS_MAC3_ARES 74
+#define ESS_MAC4_ARES 75
+#define ESS_MAC5_ARES 76
+#define ESS_PSGMII_ARES 77
#endif

28
target/linux/ipq40xx/patches-5.15/101-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch Normal file
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@ -0,0 +1,28 @@
From 6038ba75e2aa8e57d4eaf20a90c8061c43b1117f Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Mon, 14 Aug 2023 12:39:04 +0200
Subject: [PATCH 2/2] clk: qcom: gcc-ipq4019: add missing networking resets
IPQ4019 has more networking related resets that will be required for future
wired networking support, so lets add them.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
drivers/clk/qcom/gcc-ipq4019.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1707,6 +1707,12 @@ static const struct qcom_reset_map gcc_i
[GCC_TCSR_BCR] = {0x22000, 0},
[GCC_MPM_BCR] = {0x24000, 0},
[GCC_SPDM_BCR] = {0x25000, 0},
+ [ESS_MAC1_ARES] = {0x1200C, 0},
+ [ESS_MAC2_ARES] = {0x1200C, 1},
+ [ESS_MAC3_ARES] = {0x1200C, 2},
+ [ESS_MAC4_ARES] = {0x1200C, 3},
+ [ESS_MAC5_ARES] = {0x1200C, 4},
+ [ESS_PSGMII_ARES] = {0x1200C, 5},
};
static const struct regmap_config gcc_ipq4019_regmap_config = {

52
target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch
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@ -1,52 +0,0 @@
From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Tue, 28 Mar 2017 22:35:33 +0530
Subject: [PATCH] clk: qcom: ipq4019: add ess reset
Added the ESS reset in IPQ4019 GCC.
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
---
drivers/clk/qcom/gcc-ipq4019.c | 11 +++++++++++
include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
2 files changed, 22 insertions(+)
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1735,6 +1735,17 @@ static const struct qcom_reset_map gcc_i
[GCC_TCSR_BCR] = {0x22000, 0},
[GCC_MPM_BCR] = {0x24000, 0},
[GCC_SPDM_BCR] = {0x25000, 0},
+ [ESS_MAC1_ARES] = {0x1200C, 0},
+ [ESS_MAC2_ARES] = {0x1200C, 1},
+ [ESS_MAC3_ARES] = {0x1200C, 2},
+ [ESS_MAC4_ARES] = {0x1200C, 3},
+ [ESS_MAC5_ARES] = {0x1200C, 4},
+ [ESS_PSGMII_ARES] = {0x1200C, 5},
+ [ESS_MAC1_CLK_DIS] = {0x1200C, 8},
+ [ESS_MAC2_CLK_DIS] = {0x1200C, 9},
+ [ESS_MAC3_CLK_DIS] = {0x1200C, 10},
+ [ESS_MAC4_CLK_DIS] = {0x1200C, 11},
+ [ESS_MAC5_CLK_DIS] = {0x1200C, 12},
};
static const struct regmap_config gcc_ipq4019_regmap_config = {
--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
@@ -165,5 +165,16 @@
#define GCC_QDSS_BCR 69
#define GCC_MPM_BCR 70
#define GCC_SPDM_BCR 71
+#define ESS_MAC1_ARES 72
+#define ESS_MAC2_ARES 73
+#define ESS_MAC3_ARES 74
+#define ESS_MAC4_ARES 75
+#define ESS_MAC5_ARES 76
+#define ESS_PSGMII_ARES 77
+#define ESS_MAC1_CLK_DIS 78
+#define ESS_MAC2_CLK_DIS 79
+#define ESS_MAC3_CLK_DIS 80
+#define ESS_MAC4_CLK_DIS 81
+#define ESS_MAC5_CLK_DIS 82
#endif