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adds support to build uboot for arv452
SVN-Revision: 20408
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1f1ad83bc2
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5
package/uboot-ifxmips/Config.in
Normal file
5
package/uboot-ifxmips/Config.in
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@ -0,0 +1,5 @@
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config IFXMIPS_UBOOT_A800
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bool "add ARV452 Switch bringup hack"
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depends on PACKAGE_uboot-ifxmips
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help
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Say Y, if you have a arv452 board (wav-281, A800, ..)
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@ -34,6 +34,10 @@ define Build/Prepare
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find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf
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endef
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define Package/uboot-ifxmips/config
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source "$(SOURCE)/Config.in"
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endef
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UBOOT_CONFIG:=danube
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UBOOT_MAKE_OPTS:=\
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@ -43,6 +47,11 @@ UBOOT_MAKE_OPTS:=\
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PLATFORM_CPU=mips32r2 \
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UBOOT_RAM_TEXT_BASE=0xA0400000
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A800_FIX:=
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ifeq ($(CONFIG_IFXMIPS_UBOOT_A800),y)
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A800_FIX += -DA800_SWITCH
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endif
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define Build/Configure
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$(MAKE) -s -C $(PKG_BUILD_DIR) \
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$(UBOOT_MAKE_OPTS) \
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@ -52,7 +61,7 @@ endef
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define Build/Compile
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$(MAKE) -C $(PKG_BUILD_DIR) \
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$(UBOOT_MAKE_OPTS) \
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OWRT_FLAGS="-DTEXT_BASE=0xa0400000" \
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OWRT_FLAGS="-DTEXT_BASE=0xa0400000 ${A800_FIX}" \
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ifx_all
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$(CP) $(PKG_BUILD_DIR)/u-boot.srec $(PKG_BUILD_DIR)/asc.srec
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$(PKG_BUILD_DIR)/gct \
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@ -61,7 +70,7 @@ define Build/Compile
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$(PKG_BUILD_DIR)/u-boot.asc
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$(MAKE) -C $(PKG_BUILD_DIR) \
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$(UBOOT_MAKE_OPTS) \
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OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000" \
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OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000 ${A800_FIX}" \
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clean ifx_all
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endef
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@ -83,12 +83,10 @@ unsigned long flash_init (void)
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unsigned long size = 0;
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int i;
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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/* Init: no FLASHes known */
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for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) { // 1 bank
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ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2; // 0xb0000000, 0xb4000000
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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volatile ulong * buscon = (ulong *)
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((i == 0) ? DANUBE_EBU_BUSCON0 : DANUBE_EBU_BUSCON1);
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@ -96,12 +94,10 @@ unsigned long flash_init (void)
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// *buscon &= ~AMAZON_EBU_BUSCON0_WRDIS;
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/* Enable write protection */
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*buscon |= DANUBE_EBU_BUSCON0_WRDIS;
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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#if 1
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memset(&flash_info[i], 0, sizeof(flash_info_t));
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#endif
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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flash_info[i].size =
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flash_get_size((FPW *)flashbase, &flash_info[i]);
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@ -463,23 +459,19 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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// asm("SYNC");
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switch (addr[1] & 0xff) {
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case (uchar)AMD_MANUFACT:
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (uchar)INTEL_MANUFACT: // 0x0089
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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info->flash_id = FLASH_MAN_INTEL; //0x00300000
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break;
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//joelin for MXIC
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case (uchar)MX_MANUFACT: // 0x00c2
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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info->flash_id = FLASH_MAN_MX ;//0x00030000
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break;
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default:
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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@ -489,11 +481,9 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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break;*/
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}
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printf("%s:%s[%d] %08lx\n", __FILE__, __func__, __LINE__, addr[0]);
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/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
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if (info->flash_id != FLASH_UNKNOWN) switch (addr[0]) {
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case (FPW)EON_ID_EN29LV320B:
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printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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info->flash_id += FLASH_29LV320B;
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info->sector_count = 71;
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info->size = 0x00400000 * (sizeof(FPW)/2);
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33
package/uboot-ifxmips/patches/130-a800.patch
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33
package/uboot-ifxmips/patches/130-a800.patch
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@ -0,0 +1,33 @@
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Index: u-boot-1.1.5/drivers/ifx_sw.c
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===================================================================
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--- u-boot-1.1.5.orig/drivers/ifx_sw.c 2010-03-24 19:21:19.000000000 +0100
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+++ u-boot-1.1.5/drivers/ifx_sw.c 2010-03-24 19:23:09.000000000 +0100
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@@ -118,7 +118,7 @@
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{
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struct eth_device *dev;
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unsigned short chipid;
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-
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+ int i;
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#if 0
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printf("Entered danube_switch_initialize()\n");
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#endif
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@@ -130,6 +130,19 @@
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}
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memset(dev, 0, sizeof(*dev));
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+#ifdef A800_SWITCH
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+ printf ("bring up a800 switch and leds\n");
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+ *EBU_CON_1 = 0x1e7ff;
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+ *EBU_ADDR_SEL_1 = 0x14000001;
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+
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+ *((volatile u16*)0xb4000000) = 0x0;
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+ for(i = 0; i < 1000; i++)
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+ udelay(1000);
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+ *((volatile u16*)0xb4000000) = (1 << 10);
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+ *EBU_CON_1 = 0x8001e7ff;
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+#define CLK_OUT2_25MHZ
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+#endif
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+
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danube_dma_init();
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danube_init_switch_chip(REV_MII_MODE);
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