diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4 index 6e11c411f83..ec2b87b0840 100644 --- a/target/linux/generic/config-5.4 +++ b/target/linux/generic/config-5.4 @@ -4679,6 +4679,7 @@ CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTQ_CPUTEMP is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX16064 is not set # CONFIG_SENSORS_MAX16065 is not set diff --git a/target/linux/lantiq/Makefile b/target/linux/lantiq/Makefile index 36e8af773f4..b2b10c57bb5 100644 --- a/target/linux/lantiq/Makefile +++ b/target/linux/lantiq/Makefile @@ -12,6 +12,7 @@ FEATURES:=squashfs SUBTARGETS:=xrx200 xway xway_legacy falcon ase KERNEL_PATCHVER:=4.19 +KERNEL_TESTING_PATCHVER:=5.4 define Target/Description Build firmware images for Lantiq SoC diff --git a/target/linux/lantiq/ase/config-5.4 b/target/linux/lantiq/ase/config-5.4 index 0c211847d25..159c57bca78 100644 --- a/target/linux/lantiq/ase/config-5.4 +++ b/target/linux/lantiq/ase/config-5.4 @@ -1,4 +1,5 @@ CONFIG_ADM6996_PHY=y +CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set CONFIG_CPU_MIPSR1=y @@ -6,17 +7,18 @@ CONFIG_CRC16=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y CONFIG_FIRMWARE_MEMMAP=y +CONFIG_GENERIC_ALLOCATOR=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y # CONFIG_ISDN is not set -# CONFIG_LBDAF is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_MIPS_FPU_EMULATOR=y CONFIG_NLS=y # CONFIG_PSB6970_PHY is not set # CONFIG_RTL8366_SMI is not set +CONFIG_SGL_ALLOC=y CONFIG_SOC_AMAZON_SE=y # CONFIG_SOC_XWAY is not set +CONFIG_TARGET_ISA_REV=1 CONFIG_USB=y CONFIG_USB_COMMON=y # CONFIG_USB_EHCI_HCD is not set diff --git a/target/linux/lantiq/config-5.4 b/target/linux/lantiq/config-5.4 index 560e8474dcb..3d3b7db9587 100644 --- a/target/linux/lantiq/config-5.4 +++ b/target/linux/lantiq/config-5.4 @@ -1,23 +1,30 @@ -CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_32BIT_OFF_T=y CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_CEVT_R4K=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLONE_BACKWARDS=y +CONFIG_COMPAT_32BIT_TIME=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_LOAD_STORE_LR=y CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y @@ -27,29 +34,31 @@ CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_R4K_FPU=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y CONFIG_CSRC_R4K=y -CONFIG_DMA_DIRECT_OPS=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_NONCOHERENT_OPS=y CONFIG_DTC=y # CONFIG_DT_EASY50712 is not set CONFIG_EARLY_PRINTK=y +CONFIG_EFI_EARLYCON=y CONFIG_ETHERNET_PACKET_MANGLE=y CONFIG_FIXED_PHY=y +CONFIG_FONT_8x16=y +CONFIG_FONT_AUTOSELECT=y +CONFIG_FONT_SUPPORT=y +CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_IPI=y @@ -78,7 +87,7 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_COPY_THREAD_TLS=y @@ -87,27 +96,27 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DEBUG_STACKOVERFLOW=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FAST_GUP=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_GENERIC_VDSO=y CONFIG_HAVE_IDE=y +CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_HAVE_NET_DSA=y CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PCI=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HW_HAS_PCI=y CONFIG_HW_RANDOM=y CONFIG_HZ=250 # CONFIG_HZ_100 is not set @@ -125,6 +134,7 @@ CONFIG_LANTIQ_DT_NONE=y CONFIG_LANTIQ_ETOP=y CONFIG_LANTIQ_WDT=y # CONFIG_LANTIQ_XRX200 is not set +# CONFIG_LANTIQ_XRX200_LEGACY is not set CONFIG_LEDS_GPIO=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -137,7 +147,6 @@ CONFIG_MIGRATION=y CONFIG_MIPS=y CONFIG_MIPS_ASID_BITS=8 CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CBPF_JIT=y CONFIG_MIPS_CLOCK_VSYSCALL=y # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set @@ -155,7 +164,6 @@ CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_LANTIQ=y -CONFIG_MTD_M25P80=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_BRNIMAGE_FW=y CONFIG_MTD_SPLIT_EVA_FW=y @@ -180,6 +188,7 @@ CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y CONFIG_PHY_LANTIQ_RCU_USB2=y +# CONFIG_PHY_LANTIQ_VRX200_PCIE is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_LANTIQ=y # CONFIG_PINCTRL_SINGLE is not set @@ -217,7 +226,9 @@ CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_MIPS16=y CONFIG_SYS_SUPPORTS_MULTITHREADING=y CONFIG_SYS_SUPPORTS_VPE_LOADER=y +CONFIG_TARGET_ISA_REV=2 CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_TINY_SRCU=y CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y # CONFIG_XRX200_PHY_FW is not set diff --git a/target/linux/lantiq/falcon/config-5.4 b/target/linux/lantiq/falcon/config-5.4 index 84b36d0066e..e2f94b54d0b 100644 --- a/target/linux/lantiq/falcon/config-5.4 +++ b/target/linux/lantiq/falcon/config-5.4 @@ -1,12 +1,10 @@ -# CONFIG_MFD_CORE is not set -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_RAW_NAND=y CONFIG_MTD_SPLIT_FIRMWARE_NAME="linux" CONFIG_PINCTRL_FALCON=y # CONFIG_PSB6970_PHY is not set -# CONFIG_RESET_LANTIQ is not set # CONFIG_RTL8366_SMI is not set CONFIG_SOC_FALCON=y -# CONFIG_SOC_TYPE_XWAY is not set # CONFIG_SOC_XWAY is not set CONFIG_SPI_FALCON=y diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi index 496150b7a7e..f2845ee4acd 100644 --- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi +++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi @@ -42,11 +42,7 @@ #interrupt-cells = <1>; interrupt-controller; compatible = "lantiq,icu"; - reg = <0x80200 0x28 - 0x80228 0x28 - 0x80250 0x28 - 0x80278 0x28 - 0x802a0 0x28>; + reg = <0x80200 0xc8>; }; watchdog@803f0 { diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi index 12af82b8cea..d4afd23f7b1 100644 --- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi +++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi @@ -42,11 +42,8 @@ #interrupt-cells = <1>; interrupt-controller; compatible = "lantiq,icu"; - reg = <0x80200 0x28 - 0x80228 0x28 - 0x80250 0x28 - 0x80278 0x28 - 0x802a0 0x28>; + /* TODO: AR9 should have ICU1 (like VR9) too */ + reg = <0x80200 0xc8>; }; watchdog@803f0 { diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi index ae8c1c045aa..eae613e008d 100644 --- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi +++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi @@ -42,11 +42,11 @@ #interrupt-cells = <1>; interrupt-controller; compatible = "lantiq,icu"; - reg = <0x80200 0x28 - 0x80228 0x28 - 0x80250 0x28 - 0x80278 0x28 - 0x802a0 0x28>; + /* + * There is a second ICU, but the SoC is not SMP + * capable. + */ + reg = <0x80200 0xc8>; }; watchdog@803f0 { diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi index dada3bcff2e..cf9b33ea936 100644 --- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi +++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi @@ -268,11 +268,8 @@ #interrupt-cells = <1>; interrupt-controller; compatible = "lantiq,icu"; - reg = <0x80200 0x28 - 0x80228 0x28 - 0x80250 0x28 - 0x80278 0x28 - 0x802a0 0x28>; + /* TODO: Number of ICUs isn't known */ + reg = <0x80200 0xc8>; }; watchdog@803f0 { diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi index 35b1f180a5e..19f42d8c844 100644 --- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi +++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi @@ -1,4 +1,5 @@ #include +#include / { #address-cells = <1>; @@ -46,11 +47,8 @@ #interrupt-cells = <1>; interrupt-controller; compatible = "lantiq,icu"; - reg = <0x80200 0x28 - 0x80228 0x28 - 0x80250 0x28 - 0x80278 0x28 - 0x802a0 0x28>; + reg = <0x80200 0xc8 /* icu0 */ + 0x80300 0xc8>; /* icu1 */ }; watchdog@803f0 { @@ -100,6 +98,18 @@ interrupts = <150 151 152 153 154 155>; }; + pcie0_phy: phy@106800 { + compatible = "lantiq,vrx200-pcie-phy"; + reg = <0x106800 0x100>; + lantiq,rcu = <&rcu0>; + lantiq,rcu-endian-offset = <0x4c>; + lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */ + big-endian; + resets = <&reset0 12 24>, <&reset0 22 22>; + reset-names = "phy", "pcie"; + #phy-cells = <1>; + }; + rcu0: rcu@203000 { #address-cells = <1>; #size-cells = <1>; @@ -465,6 +475,13 @@ interrupt-parent = <&icu0>; interrupts = <161 144>; + phys = <&pcie0_phy LANTIQ_PCIE_PHY_MODE_36MHZ>; + phy-names = "pcie"; + + resets = <&reset0 22 22>; + + lantiq,rcu = <&rcu0>; + device_type = "pci"; gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/lantiq/patches-5.4/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-5.4/0001-MIPS-lantiq-add-pcie-driver.patch index 4cea5547c2e..bcd928aea9d 100644 --- a/target/linux/lantiq/patches-5.4/0001-MIPS-lantiq-add-pcie-driver.patch +++ b/target/linux/lantiq/patches-5.4/0001-MIPS-lantiq-add-pcie-driver.patch @@ -44,12 +44,12 @@ Signed-off-by: John Crispin @@ -20,6 +20,7 @@ config SOC_XWAY bool "XWAY" select SOC_TYPE_XWAY - select HW_HAS_PCI + select HAVE_PCI + select ARCH_SUPPORTS_MSI select MFD_SYSCON select MFD_CORE -@@ -52,6 +53,15 @@ config PCI_LANTIQ +@@ -52,4 +53,13 @@ config PCI_LANTIQ bool "PCI Support" depends on SOC_XWAY && PCI @@ -62,12 +62,10 @@ Signed-off-by: John Crispin + depends on PCIE_LANTIQ && PCI_MSI + default y + - config XRX200_PHY_FW - bool "XRX200 PHY firmware loader" - depends on SOC_XWAY + endif --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile -@@ -49,6 +49,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o +@@ -51,6 +51,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o @@ -155,7 +153,7 @@ Signed-off-by: John Crispin + ifx_pcie_rc_class_early_fixup); --- a/arch/mips/pci/fixup-lantiq.c +++ b/arch/mips/pci/fixup-lantiq.c -@@ -8,12 +8,18 @@ +@@ -6,12 +6,18 @@ #include #include @@ -174,7 +172,7 @@ Signed-off-by: John Crispin if (ltq_pci_plat_arch_init) return ltq_pci_plat_arch_init(dev); -@@ -25,5 +31,10 @@ int pcibios_plat_dev_init(struct pci_dev +@@ -23,5 +29,10 @@ int pcibios_plat_dev_init(struct pci_dev int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { @@ -4143,7 +4141,7 @@ Signed-off-by: John Crispin + --- a/arch/mips/pci/pci-legacy.c +++ b/arch/mips/pci/pci-legacy.c -@@ -311,3 +311,30 @@ char *__init pcibios_setup(char *str) +@@ -308,3 +308,30 @@ char *__init pcibios_setup(char *str) return pcibios_plat_setup(str); return str; } @@ -5484,7 +5482,7 @@ Signed-off-by: John Crispin + --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig -@@ -54,6 +54,7 @@ config PCIEAER_INJECT +@@ -52,6 +52,7 @@ config PCIEAER_INJECT config PCIE_ECRC bool "PCI Express ECRC settings control" depends on PCIEAER @@ -5494,7 +5492,7 @@ Signed-off-by: John Crispin (transaction layer end-to-end CRC checking). --- a/include/linux/pci.h +++ b/include/linux/pci.h -@@ -1325,6 +1325,8 @@ void pci_walk_bus(struct pci_bus *top, i +@@ -1390,6 +1390,8 @@ void pci_walk_bus(struct pci_bus *top, i void *userdata); int pci_cfg_space_size(struct pci_dev *dev); unsigned char pci_bus_max_busnr(struct pci_bus *bus); @@ -5505,9 +5503,9 @@ Signed-off-by: John Crispin unsigned long type); --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h -@@ -1065,6 +1065,12 @@ +@@ -1072,6 +1072,12 @@ + #define PCI_DEVICE_ID_SGI_IOC3 0x0003 #define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 - #define PCI_DEVICE_ID_SGI_IOC4 0x100a +#define PCI_VENDOR_ID_INFINEON 0x15D1 +#define PCI_DEVICE_ID_INFINEON_DANUBE 0x000F diff --git a/target/linux/lantiq/patches-5.4/0004-MIPS-lantiq-add-atm-hack.patch b/target/linux/lantiq/patches-5.4/0004-MIPS-lantiq-add-atm-hack.patch index b74642af14c..1b1a0a1ca7b 100644 --- a/target/linux/lantiq/patches-5.4/0004-MIPS-lantiq-add-atm-hack.patch +++ b/target/linux/lantiq/patches-5.4/0004-MIPS-lantiq-add-atm-hack.patch @@ -8,7 +8,7 @@ Signed-off-by: John Crispin arch/mips/include/asm/mach-lantiq/lantiq_atm.h | 196 +++++++++++++++++++++++ arch/mips/include/asm/mach-lantiq/lantiq_ptm.h | 203 ++++++++++++++++++++++++ arch/mips/lantiq/irq.c | 2 + - arch/mips/mm/cache.c | 2 + + arch/mips/mm/cache.c | 4 + include/uapi/linux/atm.h | 6 + net/atm/common.c | 6 + net/atm/proc.c | 2 +- @@ -423,7 +423,7 @@ Signed-off-by: John Crispin + --- a/arch/mips/lantiq/irq.c +++ b/arch/mips/lantiq/irq.c -@@ -14,6 +14,7 @@ +@@ -12,6 +12,7 @@ #include #include #include @@ -431,25 +431,27 @@ Signed-off-by: John Crispin #include #include -@@ -96,6 +97,7 @@ void ltq_mask_and_ack_irq(struct irq_dat - ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier); - ltq_icu_w32(im, BIT(offset), isr); +@@ -91,6 +92,7 @@ void ltq_disable_irq(struct irq_data *d) + } + raw_spin_unlock_irqrestore(<q_icu_lock, flags); } +EXPORT_SYMBOL(ltq_mask_and_ack_irq); - static void ltq_ack_irq(struct irq_data *d) + void ltq_mask_and_ack_irq(struct irq_data *d) { --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c -@@ -64,6 +64,8 @@ void (*_dma_cache_wback)(unsigned long s +@@ -62,6 +62,10 @@ void (*_dma_cache_wback_inv)(unsigned lo + void (*_dma_cache_wback)(unsigned long start, unsigned long size); void (*_dma_cache_inv)(unsigned long start, unsigned long size); - EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_wback_inv); +EXPORT_SYMBOL(_dma_cache_wback); +EXPORT_SYMBOL(_dma_cache_inv); - ++ #endif /* CONFIG_DMA_NONCOHERENT */ + /* --- a/include/uapi/linux/atm.h +++ b/include/uapi/linux/atm.h @@ -131,8 +131,14 @@ @@ -469,7 +471,7 @@ Signed-off-by: John Crispin int max_pcr; /* maximum PCR in cells per second */ --- a/net/atm/proc.c +++ b/net/atm/proc.c -@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil +@@ -142,7 +142,7 @@ static void *vcc_seq_next(struct seq_fil static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc) { static const char *const class_name[] = { diff --git a/target/linux/lantiq/patches-5.4/0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch b/target/linux/lantiq/patches-5.4/0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch deleted file mode 100644 index ccde787d2dd..00000000000 --- a/target/linux/lantiq/patches-5.4/0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 74e0deb89a8ba27c132b1f0e08643e215b5c1f92 Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Mon, 11 Feb 2019 14:20:00 +0100 -Subject: [PATCH] lantiq_etop: pass struct device to DMA API functions - -The DMA API generally relies on a struct device to work properly, and -only barely works without one for legacy reasons. Pass the easily -available struct device from the platform_device to remedy this. - -Note this driver seems to lack dma_unmap_* calls entirely, but fixing -that is left for another time. - -Signed-off-by: Christoph Hellwig -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/lantiq_etop.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/ethernet/lantiq_etop.c -+++ b/drivers/net/ethernet/lantiq_etop.c -@@ -112,10 +112,12 @@ struct ltq_etop_priv { - static int - ltq_etop_alloc_skb(struct ltq_etop_chan *ch) - { -+ struct ltq_etop_priv *priv = netdev_priv(ch->netdev); -+ - ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); - if (!ch->skb[ch->dma.desc]) - return -ENOMEM; -- ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL, -+ ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(&priv->pdev->dev, - ch->skb[ch->dma.desc]->data, MAX_DMA_DATA_LEN, - DMA_FROM_DEVICE); - ch->dma.desc_base[ch->dma.desc].addr = -@@ -493,7 +495,7 @@ ltq_etop_tx(struct sk_buff *skb, struct - netif_trans_update(dev); - - spin_lock_irqsave(&priv->lock, flags); -- desc->addr = ((unsigned int) dma_map_single(NULL, skb->data, len, -+ desc->addr = ((unsigned int) dma_map_single(&priv->pdev->dev, skb->data, len, - DMA_TO_DEVICE)) - byte_offset; - wmb(); - desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | diff --git a/target/linux/lantiq/patches-5.4/0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch b/target/linux/lantiq/patches-5.4/0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch deleted file mode 100644 index 412dd620502..00000000000 --- a/target/linux/lantiq/patches-5.4/0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 74f03104ed465ff71b11076ef620e4eaa53dbf74 Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Fri, 1 Feb 2019 09:47:44 +0100 -Subject: [PATCH] MIPS: lantiq: pass struct device to DMA API functions - -The DMA API generally relies on a struct device to work properly, and -only barely works without one for legacy reasons. Pass the easily -available struct device from the platform_device to remedy this. - -Also use GFP_KERNEL instead of GFP_ATOMIC as the gfp_t for the memory -allocation, as we aren't in interrupt context or under a lock. - -Note that this whole function looks somewhat bogus given that we never -even look at the returned dma address, and the CPHYSADDR magic on -a returned noncached mapping looks "interesting". But I'll leave -that to people more familiar with the code to sort out. - -Signed-off-by: Christoph Hellwig -Signed-off-by: Paul Burton -Cc: John Crispin -Cc: Vinod Koul -Cc: Dmitry Tarnyagin -Cc: Nicolas Ferre -Cc: Sudip Mukherjee -Cc: Felipe Balbi -Cc: linux-mips@vger.kernel.org -Cc: linux-kernel@vger.kernel.org -Cc: dmaengine@vger.kernel.org -Cc: netdev@vger.kernel.org -Cc: linux-usb@vger.kernel.org -Cc: linux-fbdev@vger.kernel.org -Cc: alsa-devel@alsa-project.org -Cc: iommu@lists.linux-foundation.org ---- - arch/mips/lantiq/xway/vmmc.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/mips/lantiq/xway/vmmc.c -+++ b/arch/mips/lantiq/xway/vmmc.c -@@ -31,8 +31,8 @@ static int vmmc_probe(struct platform_de - dma_addr_t dma; - - cp1_base = -- (void *) CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, -- &dma, GFP_ATOMIC)); -+ (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE, -+ &dma, GFP_KERNEL)); - - gpio_count = of_gpio_count(pdev->dev.of_node); - while (gpio_count > 0) { diff --git a/target/linux/lantiq/patches-5.4/0008-MIPS-lantiq-backport-old-timer-code.patch b/target/linux/lantiq/patches-5.4/0008-MIPS-lantiq-backport-old-timer-code.patch index 52e4cbeb1b5..1d869afd9ad 100644 --- a/target/linux/lantiq/patches-5.4/0008-MIPS-lantiq-backport-old-timer-code.patch +++ b/target/linux/lantiq/patches-5.4/0008-MIPS-lantiq-backport-old-timer-code.patch @@ -172,7 +172,8 @@ Signed-off-by: John Crispin +#endif /* __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ */ --- a/arch/mips/lantiq/xway/Makefile +++ b/arch/mips/lantiq/xway/Makefile -@@ -1,3 +1,9 @@ +@@ -1,4 +1,10 @@ + # SPDX-License-Identifier: GPL-2.0-only -obj-y := prom.o sysctrl.o clk.o dma.o gptu.o dcdc.o +obj-y := prom.o sysctrl.o clk.o dma.o dcdc.o + @@ -880,14 +881,14 @@ Signed-off-by: John Crispin + int ret; + struct gptu_ioctl_param param; + -+ if (!access_ok(VERIFY_READ, (void __user *)arg, sizeof(struct gptu_ioctl_param))) ++ if (!access_ok((void __user *)arg, sizeof(struct gptu_ioctl_param))) + return -EFAULT; + copy_from_user(¶m, (void __user *)arg, sizeof(param)); + + if ((((cmd == GPTU_REQUEST_TIMER || cmd == GPTU_SET_TIMER + || GPTU_SET_COUNTER) && param.timer < 2) + || cmd == GPTU_GET_COUNT_VALUE || cmd == GPTU_CALCULATE_DIVIDER) -+ && !access_ok(VERIFY_WRITE, (void __user *)arg, ++ && !access_ok((void __user *)arg, + sizeof(struct gptu_ioctl_param))) + return -EFAULT; + diff --git a/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch b/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch index 4e34580efcb..d68466c3689 100644 --- a/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch +++ b/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/mtd/nand/raw/xway_nand.c +++ b/drivers/mtd/nand/raw/xway_nand.c -@@ -63,6 +63,24 @@ +@@ -61,6 +61,24 @@ #define NAND_CON_CSMUX (1 << 1) #define NAND_CON_NANDM 1 @@ -35,7 +35,7 @@ Signed-off-by: John Crispin struct xway_nand_data { struct nand_chip chip; unsigned long csflags; -@@ -94,10 +112,22 @@ static void xway_select_chip(struct mtd_ +@@ -91,10 +109,22 @@ static void xway_select_chip(struct nand case -1: ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON); ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON); @@ -58,11 +58,10 @@ Signed-off-by: John Crispin ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON); ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON); break; -@@ -108,6 +138,12 @@ static void xway_select_chip(struct mtd_ - - static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +@@ -107,6 +137,11 @@ static void xway_cmd_ctrl(struct nand_ch { -+ + struct mtd_info *mtd = nand_to_mtd(chip); + + if (req_mask) { + if (cmd != NAND_CMD_STATUS) + ltq_ebu_w32(0, EBU_NAND_WAIT); /* Clear nand ready */ @@ -71,7 +70,7 @@ Signed-off-by: John Crispin if (cmd == NAND_CMD_NONE) return; -@@ -118,6 +154,24 @@ static void xway_cmd_ctrl(struct mtd_inf +@@ -117,6 +152,24 @@ static void xway_cmd_ctrl(struct nand_ch while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) ; @@ -95,8 +94,8 @@ Signed-off-by: John Crispin + } } - static int xway_dev_ready(struct mtd_info *mtd) -@@ -157,6 +211,7 @@ static int xway_nand_probe(struct platfo + static int xway_dev_ready(struct nand_chip *chip) +@@ -156,6 +209,7 @@ static int xway_nand_probe(struct platfo int err; u32 cs; u32 cs_flag = 0; @@ -104,7 +103,7 @@ Signed-off-by: John Crispin /* Allocate memory for the device structure (and zero it) */ data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data), -@@ -192,6 +247,15 @@ static int xway_nand_probe(struct platfo +@@ -191,6 +245,15 @@ static int xway_nand_probe(struct platfo if (!err && cs == 1) cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1; diff --git a/target/linux/lantiq/patches-5.4/002-pinctrl-falcon-fix-syntax-error.patch b/target/linux/lantiq/patches-5.4/002-pinctrl-falcon-fix-syntax-error.patch new file mode 100644 index 00000000000..40a833be544 --- /dev/null +++ b/target/linux/lantiq/patches-5.4/002-pinctrl-falcon-fix-syntax-error.patch @@ -0,0 +1,25 @@ +From d2fee0bb982195540e4fbe009996fcdbc26d163c Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 5 Mar 2020 08:17:27 +0100 +Subject: [PATCH] pinctrl: falcon: fix syntax error + +Add the missing semicolon after of_node_put to get the file compiled. + +Fixes: f17d2f54d36d ("pinctrl: falcon: Add of_node_put() before return") +Cc: stable@vger.kernel.org # v5.4+ +Signed-off-by: Mathias Kresin +--- + drivers/pinctrl/pinctrl-falcon.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pinctrl/pinctrl-falcon.c ++++ b/drivers/pinctrl/pinctrl-falcon.c +@@ -451,7 +451,7 @@ static int pinctrl_falcon_probe(struct p + falcon_info.clk[*bank] = clk_get(&ppdev->dev, NULL); + if (IS_ERR(falcon_info.clk[*bank])) { + dev_err(&ppdev->dev, "failed to get clock\n"); +- of_node_put(np) ++ of_node_put(np); + return PTR_ERR(falcon_info.clk[*bank]); + } + falcon_info.membase[*bank] = devm_ioremap_resource(&pdev->dev, diff --git a/target/linux/lantiq/patches-5.4/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch b/target/linux/lantiq/patches-5.4/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch index 502c5af9f2c..c1fc59487af 100644 --- a/target/linux/lantiq/patches-5.4/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch +++ b/target/linux/lantiq/patches-5.4/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c -@@ -131,7 +131,11 @@ ltq_mtd_probe(struct platform_device *pd +@@ -129,7 +129,11 @@ ltq_mtd_probe(struct platform_device *pd if (!ltq_mtd->map) return -ENOMEM; diff --git a/target/linux/lantiq/patches-5.4/0023-NET-PHY-add-led-support-for-intel-xway.patch b/target/linux/lantiq/patches-5.4/0023-NET-PHY-add-led-support-for-intel-xway.patch index e5ba24c3e7f..5a668b6f561 100644 --- a/target/linux/lantiq/patches-5.4/0023-NET-PHY-add-led-support-for-intel-xway.patch +++ b/target/linux/lantiq/patches-5.4/0023-NET-PHY-add-led-support-for-intel-xway.patch @@ -13,7 +13,7 @@ Signed-off-by: John Crispin --- a/drivers/net/phy/intel-xway.c +++ b/drivers/net/phy/intel-xway.c -@@ -154,6 +154,51 @@ +@@ -145,6 +145,51 @@ #define PHY_ID_PHY11G_VR9_1_2 0xD565A409 #define PHY_ID_PHY22F_VR9_1_2 0xD565A419 @@ -65,7 +65,7 @@ Signed-off-by: John Crispin static int xway_gphy_config_init(struct phy_device *phydev) { int err; -@@ -192,6 +237,7 @@ static int xway_gphy_config_init(struct +@@ -183,6 +228,7 @@ static int xway_gphy_config_init(struct phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh); phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl); diff --git a/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch b/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch deleted file mode 100644 index 7fbd97feca5..00000000000 --- a/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch +++ /dev/null @@ -1,45 +0,0 @@ -From ae0c287060749dc72c866484d12bd3cade8c517d Mon Sep 17 00:00:00 2001 -From: Mathias Kresin -Date: Fri, 19 Jan 2018 20:19:06 +0100 -Subject: [PATCH] MIPS: lantiq: autoselect matching vr9 rev gphy firmware - -Add a custom xrx200 ethernet phy compatible to load the firmware matching -the vr9 revision without specifing an expected revision. - -We have quite a few boards in the tree were later produced ones are using -a more recent vr9. It is impossible to distinguish which revision of the -vr9 is used without opening the case and removing a heatsink for some of -them. - -Signed-off-by: Mathias Kresin ---- - drivers/soc/lantiq/gphy.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/drivers/soc/lantiq/gphy.c -+++ b/drivers/soc/lantiq/gphy.c -@@ -55,6 +55,7 @@ static const struct xway_gphy_match_data - }; - - static const struct of_device_id xway_gphy_match[] = { -+ { .compatible = "lantiq,xrx200-gphy", .data = NULL }, - { .compatible = "lantiq,xrx200a1x-gphy", .data = &xrx200a1x_gphy_data }, - { .compatible = "lantiq,xrx200a2x-gphy", .data = &xrx200a2x_gphy_data }, - { .compatible = "lantiq,xrx300-gphy", .data = &xrx300_gphy_data }, -@@ -111,6 +112,16 @@ static int xway_gphy_of_probe(struct pla - - gphy_fw_name_cfg = of_device_get_match_data(dev); - -+ if (of_device_is_compatible(pdev->dev.of_node, "lantiq,xrx200-gphy")) -+ switch (ltq_soc_type()) { -+ case SOC_TYPE_VR9: -+ gphy_fw_name_cfg = &xrx200a1x_gphy_data; -+ break; -+ case SOC_TYPE_VR9_2: -+ gphy_fw_name_cfg = &xrx200a2x_gphy_data; -+ break; -+ } -+ - priv->gphy_clk_gate = devm_clk_get(dev, NULL); - if (IS_ERR(priv->gphy_clk_gate)) { - dev_err(dev, "Failed to lookup gate clock\n"); diff --git a/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch b/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch new file mode 100644 index 00000000000..a364d6d67b8 --- /dev/null +++ b/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch @@ -0,0 +1,55 @@ +From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Sun, 7 Jul 2019 21:45:51 +0200 +Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes + +Switch back to the former used names, to make the legacy switch driver +happy. + +Signed-off-by: Mathias Kresin +--- + arch/mips/lantiq/xway/sysctrl.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -503,7 +503,7 @@ void __init ltq_soc_init(void) + clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI); + clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI); + clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL); +- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP); ++ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP); + clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); + } else if (of_machine_is_compatible("lantiq,ar10")) { +@@ -511,11 +511,11 @@ void __init ltq_soc_init(void) + ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz()); + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); + clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); +- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | ++ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | + PMU_PPE_DP | PMU_PPE_TC); + clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); +- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); +- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); ++ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY); ++ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); + clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE); + clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); +@@ -534,12 +534,12 @@ void __init ltq_soc_init(void) + clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS); + + clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); +- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, ++ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, + PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | + PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | + PMU_PPE_QSB | PMU_PPE_TOP); +- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); +- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); ++ clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY); ++ clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY); + clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); + clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); diff --git a/target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch b/target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-legacy.patch similarity index 99% rename from target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch rename to target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-legacy.patch index 4e5b55eb3e5..6a2143e17ef 100644 --- a/target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch +++ b/target/linux/lantiq/patches-5.4/0025-NET-MIPS-lantiq-adds-xrx200-legacy.patch @@ -1,43 +1,43 @@ From fb0c9601f4414c39ff68e26b88681bef0bb04954 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 22 Oct 2012 12:22:23 +0200 -Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net +Subject: NET: MIPS: lantiq: adds xrx200 ethernet and switch driver --- drivers/net/ethernet/Kconfig | 8 +- drivers/net/ethernet/Makefile | 1 + drivers/net/ethernet/lantiq_pce.h | 163 +++ - drivers/net/ethernet/lantiq_xrx200.c | 1798 +++++++++++++++++++++++++++++++ - drivers/net/ethernet/lantiq_xrx200_sw.h | 1328 +++++++++++++++++++++++ + drivers/net/ethernet/lantiq_xrx200_legacy.c | 1798 +++++++++++++++++++++++++++++++ + drivers/net/ethernet/lantiq_xrx200_legacy.h | 1328 +++++++++++++++++++++++ 5 files changed, 3297 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/lantiq_pce.h - create mode 100644 drivers/net/ethernet/lantiq_xrx200.c - create mode 100644 drivers/net/ethernet/lantiq_xrx200_sw.h + create mode 100644 drivers/net/ethernet/lantiq_xrx200_legacy.c + create mode 100644 drivers/net/ethernet/lantiq_xrx200_legacy.h --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig -@@ -106,7 +106,13 @@ config LANTIQ_ETOP +@@ -108,7 +108,13 @@ config LANTIQ_ETOP tristate "Lantiq SoC ETOP driver" depends on SOC_TYPE_XWAY ---help--- - Support for the MII0 inside the Lantiq SoC + Support for the MII0 inside the Lantiq ADSL SoC + -+config LANTIQ_XRX200 ++config LANTIQ_XRX200_LEGACY + tristate "Lantiq SoC XRX200 driver" + depends on SOC_TYPE_XWAY + ---help--- + Support for the MII0 inside the Lantiq VDSL SoC - source "drivers/net/ethernet/marvell/Kconfig" - source "drivers/net/ethernet/mediatek/Kconfig" + config LANTIQ_XRX200 + tristate "Lantiq / Intel xRX200 PMAC network driver" --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile -@@ -49,6 +49,7 @@ obj-$(CONFIG_NET_VENDOR_XSCALE) += xscal - obj-$(CONFIG_JME) += jme.o +@@ -51,6 +51,7 @@ obj-$(CONFIG_JME) += jme.o obj-$(CONFIG_KORINA) += korina.o obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o -+obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o + obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o ++obj-$(CONFIG_LANTIQ_XRX200_LEGACY) += lantiq_xrx200_legacy.o obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/ obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/ obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/ @@ -208,8 +208,8 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net + MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), +}; --- /dev/null -+++ b/drivers/net/ethernet/lantiq_xrx200.c -@@ -0,0 +1,1924 @@ ++++ b/drivers/net/ethernet/lantiq_xrx200_legacy.c +@@ -0,0 +1,1927 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -246,7 +246,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net +#include + +#include "lantiq_pce.h" -+#include "lantiq_xrx200_sw.h" ++#include "lantiq_xrx200_legacy.h" + +#define SW_POLLING +#define SW_ROUTING @@ -1117,6 +1117,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net + if (XRX200_DMA_IS_RX(i)) + napi_enable(&priv->hw->chan[i].napi); + ltq_dma_open(&priv->hw->chan[i].dma); ++ ltq_dma_enable_irq(&priv->hw->chan[i].dma); + } + priv->hw->chan[i].refcount++; + spin_unlock_bh(&priv->hw->chan[i].lock); @@ -1604,16 +1605,18 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net + return PTR_ERR(phydev); + } + -+ phydev->supported &= (SUPPORTED_10baseT_Half -+ | SUPPORTED_10baseT_Full -+ | SUPPORTED_100baseT_Half -+ | SUPPORTED_100baseT_Full -+ | SUPPORTED_1000baseT_Half -+ | SUPPORTED_1000baseT_Full -+ | SUPPORTED_Autoneg -+ | SUPPORTED_MII -+ | SUPPORTED_TP); -+ phydev->advertising = phydev->supported; ++ linkmode_zero(phydev->supported); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, phydev->supported); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_MII_BIT, phydev->supported); ++ linkmode_set_bit_array(phy_10_100_features_array, ++ ARRAY_SIZE(phy_10_100_features_array), ++ phydev->supported); ++ linkmode_set_bit_array(phy_gbit_features_array, ++ ARRAY_SIZE(phy_gbit_features_array), ++ phydev->supported); ++ linkmode_copy(phydev->advertising, phydev->supported); ++ + port->phydev = phydev; + phydev->phy_link_change = xrx200_phy_link_change; + @@ -1970,7 +1973,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net + priv->id = hw->num_devs; + + mac = of_get_mac_address(iface); -+ if (mac) ++ if (!IS_ERR(mac)) + memcpy(priv->mac, mac, ETH_ALEN); + + /* is this the wan interface ? */ @@ -2135,7 +2138,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net +MODULE_DESCRIPTION("Lantiq SoC XRX200 ethernet"); +MODULE_LICENSE("GPL"); --- /dev/null -+++ b/drivers/net/ethernet/lantiq_xrx200_sw.h ++++ b/drivers/net/ethernet/lantiq_xrx200_legacy.h @@ -0,0 +1,1328 @@ +/* + * This program is free software; you can redistribute it and/or modify it diff --git a/target/linux/lantiq/patches-5.4/0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch b/target/linux/lantiq/patches-5.4/0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch new file mode 100644 index 00000000000..8fd29161fe8 --- /dev/null +++ b/target/linux/lantiq/patches-5.4/0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch @@ -0,0 +1,352 @@ +From c8eedcadc38a5e6008d3990fbe0a5285b30335fc Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Sun, 7 Jul 2019 21:48:56 +0200 +Subject: [PATCH] MIPS: lantiq: Add GPHY Firmware loader + +Upstream, the GPHY Firmware loader has been merged into the DSA switch +driver. But we don't use the driver yet, so bring it back. + +Signed-off-by: Mathias Kresin +--- + .../bindings/mips/lantiq/rcu-gphy.txt | 36 +++ + .../devicetree/bindings/mips/lantiq/rcu.txt | 18 ++ + arch/mips/configs/xway_defconfig | 1 + + arch/mips/lantiq/Kconfig | 4 + + drivers/soc/lantiq/Makefile | 1 + + drivers/soc/lantiq/gphy.c | 224 ++++++++++++++++++ + 6 files changed, 284 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu-gphy.txt + create mode 100644 drivers/soc/lantiq/gphy.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/mips/lantiq/rcu-gphy.txt +@@ -0,0 +1,37 @@ ++Lantiq XWAY SoC GPHY binding ++============================ ++ ++This binding describes a software-defined ethernet PHY, provided by the RCU ++module on newer Lantiq XWAY SoCs (xRX200 and newer). ++ ++------------------------------------------------------------------------------- ++Required properties: ++- compatible : Should be one of ++ "lantiq,xrx200-gphy" ++ "lantiq,xrx200a1x-gphy" ++ "lantiq,xrx200a2x-gphy" ++ "lantiq,xrx300-gphy" ++ "lantiq,xrx330-gphy" ++- reg : Addrress of the GPHY FW load address register ++- resets : Must reference the RCU GPHY reset bit ++- reset-names : One entry, value must be "gphy" or optional "gphy2" ++- clocks : A reference to the (PMU) GPHY clock gate ++ ++Optional properties: ++- lantiq,gphy-mode : GPHY_MODE_GE (default) or GPHY_MODE_FE as defined in ++ ++ ++ ++------------------------------------------------------------------------------- ++Example for the GPHys on the xRX200 SoCs: ++ ++#include ++ gphy0: gphy@20 { ++ compatible = "lantiq,xrx200a2x-gphy"; ++ reg = <0x20 0x4>; ++ ++ resets = <&reset0 31 30>, <&reset1 7 7>; ++ reset-names = "gphy", "gphy2"; ++ clocks = <&pmu0 XRX200_PMU_GATE_GPHY>; ++ lantiq,gphy-mode = ; ++ }; +--- a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt ++++ b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt +@@ -26,6 +26,24 @@ Example of the RCU bindings on a xRX200 + ranges = <0x0 0x203000 0x100>; + big-endian; + ++ gphy0: gphy@20 { ++ compatible = "lantiq,xrx200a2x-gphy"; ++ reg = <0x20 0x4>; ++ ++ resets = <&reset0 31 30>, <&reset1 7 7>; ++ reset-names = "gphy", "gphy2"; ++ lantiq,gphy-mode = ; ++ }; ++ ++ gphy1: gphy@68 { ++ compatible = "lantiq,xrx200a2x-gphy"; ++ reg = <0x68 0x4>; ++ ++ resets = <&reset0 29 28>, <&reset1 6 6>; ++ reset-names = "gphy", "gphy2"; ++ lantiq,gphy-mode = ; ++ }; ++ + reset0: reset-controller@10 { + compatible = "lantiq,xrx200-reset"; + reg = <0x10 4>, <0x14 4>; +--- a/arch/mips/configs/xway_defconfig ++++ b/arch/mips/configs/xway_defconfig +@@ -13,6 +13,7 @@ CONFIG_EMBEDDED=y + # CONFIG_COMPAT_BRK is not set + CONFIG_LANTIQ=y + CONFIG_PCI_LANTIQ=y ++CONFIG_XRX200_PHY_FW=y + CONFIG_CPU_MIPS32_R2=y + CONFIG_MIPS_VPE_LOADER=y + CONFIG_NR_CPUS=2 +--- a/arch/mips/lantiq/Kconfig ++++ b/arch/mips/lantiq/Kconfig +@@ -62,4 +62,8 @@ config PCIE_LANTIQ_MSI + depends on PCIE_LANTIQ && PCI_MSI + default y + ++config XRX200_PHY_FW ++ bool "XRX200 PHY firmware loader" ++ depends on SOC_XWAY ++ + endif +--- a/drivers/soc/lantiq/Makefile ++++ b/drivers/soc/lantiq/Makefile +@@ -1,2 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-y += fpi-bus.o ++obj-$(CONFIG_XRX200_PHY_FW) += gphy.o +--- /dev/null ++++ b/drivers/soc/lantiq/gphy.c +@@ -0,0 +1,235 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * Copyright (C) 2012 John Crispin ++ * Copyright (C) 2016 Martin Blumenstingl ++ * Copyright (C) 2017 Hauke Mehrtens ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define XRX200_GPHY_FW_ALIGN (16 * 1024) ++ ++struct xway_gphy_priv { ++ struct clk *gphy_clk_gate; ++ struct reset_control *gphy_reset; ++ struct reset_control *gphy_reset2; ++ void __iomem *membase; ++ char *fw_name; ++}; ++ ++struct xway_gphy_match_data { ++ char *fe_firmware_name; ++ char *ge_firmware_name; ++}; ++ ++static const struct xway_gphy_match_data xrx200a1x_gphy_data = { ++ .fe_firmware_name = "lantiq/xrx200_phy22f_a14.bin", ++ .ge_firmware_name = "lantiq/xrx200_phy11g_a14.bin", ++}; ++ ++static const struct xway_gphy_match_data xrx200a2x_gphy_data = { ++ .fe_firmware_name = "lantiq/xrx200_phy22f_a22.bin", ++ .ge_firmware_name = "lantiq/xrx200_phy11g_a22.bin", ++}; ++ ++static const struct xway_gphy_match_data xrx300_gphy_data = { ++ .fe_firmware_name = "lantiq/xrx300_phy22f_a21.bin", ++ .ge_firmware_name = "lantiq/xrx300_phy11g_a21.bin", ++}; ++ ++static const struct of_device_id xway_gphy_match[] = { ++ { .compatible = "lantiq,xrx200-gphy", .data = NULL }, ++ { .compatible = "lantiq,xrx200a1x-gphy", .data = &xrx200a1x_gphy_data }, ++ { .compatible = "lantiq,xrx200a2x-gphy", .data = &xrx200a2x_gphy_data }, ++ { .compatible = "lantiq,xrx300-gphy", .data = &xrx300_gphy_data }, ++ { .compatible = "lantiq,xrx330-gphy", .data = &xrx300_gphy_data }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, xway_gphy_match); ++ ++static int xway_gphy_load(struct device *dev, struct xway_gphy_priv *priv, ++ dma_addr_t *dev_addr) ++{ ++ const struct firmware *fw; ++ void *fw_addr; ++ dma_addr_t dma_addr; ++ size_t size; ++ int ret; ++ ++ ret = request_firmware(&fw, priv->fw_name, dev); ++ if (ret) { ++ dev_err(dev, "failed to load firmware: %s, error: %i\n", ++ priv->fw_name, ret); ++ return ret; ++ } ++ ++ /* ++ * GPHY cores need the firmware code in a persistent and contiguous ++ * memory area with a 16 kB boundary aligned start address. ++ */ ++ size = fw->size + XRX200_GPHY_FW_ALIGN; ++ ++ fw_addr = dmam_alloc_coherent(dev, size, &dma_addr, GFP_KERNEL); ++ if (fw_addr) { ++ fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN); ++ *dev_addr = ALIGN(dma_addr, XRX200_GPHY_FW_ALIGN); ++ memcpy(fw_addr, fw->data, fw->size); ++ } else { ++ dev_err(dev, "failed to alloc firmware memory\n"); ++ ret = -ENOMEM; ++ } ++ ++ release_firmware(fw); ++ ++ return ret; ++} ++ ++static int xway_gphy_of_probe(struct platform_device *pdev, ++ struct xway_gphy_priv *priv) ++{ ++ struct device *dev = &pdev->dev; ++ const struct xway_gphy_match_data *gphy_fw_name_cfg; ++ u32 gphy_mode; ++ int ret; ++ struct resource *res_gphy; ++ ++ gphy_fw_name_cfg = of_device_get_match_data(dev); ++ ++ if (of_device_is_compatible(pdev->dev.of_node, "lantiq,xrx200-gphy")) ++ switch (ltq_soc_type()) { ++ case SOC_TYPE_VR9: ++ gphy_fw_name_cfg = &xrx200a1x_gphy_data; ++ break; ++ case SOC_TYPE_VR9_2: ++ gphy_fw_name_cfg = &xrx200a2x_gphy_data; ++ break; ++ } ++ ++ priv->gphy_clk_gate = devm_clk_get(dev, NULL); ++ if (IS_ERR(priv->gphy_clk_gate)) { ++ dev_err(dev, "Failed to lookup gate clock\n"); ++ return PTR_ERR(priv->gphy_clk_gate); ++ } ++ ++ res_gphy = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ priv->membase = devm_ioremap_resource(dev, res_gphy); ++ if (IS_ERR(priv->membase)) ++ return PTR_ERR(priv->membase); ++ ++ priv->gphy_reset = devm_reset_control_get(dev, "gphy"); ++ if (IS_ERR(priv->gphy_reset)) { ++ if (PTR_ERR(priv->gphy_reset) != -EPROBE_DEFER) ++ dev_err(dev, "Failed to lookup gphy reset\n"); ++ return PTR_ERR(priv->gphy_reset); ++ } ++ ++ priv->gphy_reset2 = devm_reset_control_get_optional(dev, "gphy2"); ++ if (IS_ERR(priv->gphy_reset2)) ++ return PTR_ERR(priv->gphy_reset2); ++ ++ ret = device_property_read_u32(dev, "lantiq,gphy-mode", &gphy_mode); ++ /* Default to GE mode */ ++ if (ret) ++ gphy_mode = GPHY_MODE_GE; ++ ++ switch (gphy_mode) { ++ case GPHY_MODE_FE: ++ priv->fw_name = gphy_fw_name_cfg->fe_firmware_name; ++ break; ++ case GPHY_MODE_GE: ++ priv->fw_name = gphy_fw_name_cfg->ge_firmware_name; ++ break; ++ default: ++ dev_err(dev, "Unknown GPHY mode %d\n", gphy_mode); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int xway_gphy_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct xway_gphy_priv *priv; ++ dma_addr_t fw_addr = 0; ++ int ret; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ ret = xway_gphy_of_probe(pdev, priv); ++ if (ret) ++ return ret; ++ ++ ret = clk_prepare_enable(priv->gphy_clk_gate); ++ if (ret) ++ return ret; ++ ++ ret = xway_gphy_load(dev, priv, &fw_addr); ++ if (ret) { ++ clk_disable_unprepare(priv->gphy_clk_gate); ++ return ret; ++ } ++ ++ reset_control_assert(priv->gphy_reset); ++ reset_control_assert(priv->gphy_reset2); ++ ++ iowrite32be(fw_addr, priv->membase); ++ ++ reset_control_deassert(priv->gphy_reset); ++ reset_control_deassert(priv->gphy_reset2); ++ ++ platform_set_drvdata(pdev, priv); ++ ++ return ret; ++} ++ ++static int xway_gphy_remove(struct platform_device *pdev) ++{ ++ struct xway_gphy_priv *priv = platform_get_drvdata(pdev); ++ ++ iowrite32be(0, priv->membase); ++ ++ clk_disable_unprepare(priv->gphy_clk_gate); ++ ++ return 0; ++} ++ ++static struct platform_driver xway_gphy_driver = { ++ .probe = xway_gphy_probe, ++ .remove = xway_gphy_remove, ++ .driver = { ++ .name = "xway-rcu-gphy", ++ .of_match_table = xway_gphy_match, ++ }, ++}; ++ ++module_platform_driver(xway_gphy_driver); ++ ++MODULE_FIRMWARE("lantiq/xrx300_phy11g_a21.bin"); ++MODULE_FIRMWARE("lantiq/xrx300_phy22f_a21.bin"); ++MODULE_FIRMWARE("lantiq/xrx200_phy11g_a14.bin"); ++MODULE_FIRMWARE("lantiq/xrx200_phy11g_a22.bin"); ++MODULE_FIRMWARE("lantiq/xrx200_phy22f_a14.bin"); ++MODULE_FIRMWARE("lantiq/xrx200_phy22f_a22.bin"); ++MODULE_AUTHOR("Martin Blumenstingl "); ++MODULE_DESCRIPTION("Lantiq XWAY GPHY Firmware Loader"); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/lantiq/patches-5.4/0028-NET-lantiq-various-etop-fixes.patch b/target/linux/lantiq/patches-5.4/0028-NET-lantiq-various-etop-fixes.patch index a336af8a3c2..094496a16de 100644 --- a/target/linux/lantiq/patches-5.4/0028-NET-lantiq-various-etop-fixes.patch +++ b/target/linux/lantiq/patches-5.4/0028-NET-lantiq-various-etop-fixes.patch @@ -10,16 +10,16 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/lantiq_etop.c +++ b/drivers/net/ethernet/lantiq_etop.c -@@ -11,7 +11,7 @@ - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* * - * Copyright (C) 2011 John Crispin + * Copyright (C) 2011-12 John Crispin */ #include -@@ -30,11 +30,16 @@ +@@ -20,11 +20,16 @@ #include #include #include @@ -36,7 +36,7 @@ Signed-off-by: John Crispin #include -@@ -42,7 +47,7 @@ +@@ -32,7 +37,7 @@ #include #include @@ -45,7 +45,7 @@ Signed-off-by: John Crispin #define MDIO_REQUEST 0x80000000 #define MDIO_READ 0x40000000 #define MDIO_ADDR_MASK 0x1f -@@ -51,44 +56,91 @@ +@@ -41,44 +46,91 @@ #define MDIO_REG_OFFSET 0x10 #define MDIO_VAL_MASK 0xffff @@ -152,7 +152,7 @@ Signed-off-by: John Crispin struct net_device *netdev; struct napi_struct napi; struct ltq_dma_channel dma; -@@ -98,23 +150,36 @@ struct ltq_etop_chan { +@@ -88,23 +140,36 @@ struct ltq_etop_chan { struct ltq_etop_priv { struct net_device *netdev; struct platform_device *pdev; @@ -194,7 +194,7 @@ Signed-off-by: John Crispin if (!ch->skb[ch->dma.desc]) return -ENOMEM; ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(&priv->pdev->dev, -@@ -149,8 +214,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan +@@ -139,8 +204,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan spin_unlock_irqrestore(&priv->lock, flags); skb_put(skb, len); @@ -206,7 +206,7 @@ Signed-off-by: John Crispin } static int -@@ -158,7 +226,9 @@ ltq_etop_poll_rx(struct napi_struct *nap +@@ -148,7 +216,9 @@ ltq_etop_poll_rx(struct napi_struct *nap { struct ltq_etop_chan *ch = container_of(napi, struct ltq_etop_chan, napi); @@ -216,7 +216,7 @@ Signed-off-by: John Crispin while (work_done < budget) { struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; -@@ -170,7 +240,9 @@ ltq_etop_poll_rx(struct napi_struct *nap +@@ -160,7 +230,9 @@ ltq_etop_poll_rx(struct napi_struct *nap } if (work_done < budget) { napi_complete_done(&ch->napi, work_done); @@ -226,7 +226,7 @@ Signed-off-by: John Crispin } return work_done; } -@@ -182,12 +254,14 @@ ltq_etop_poll_tx(struct napi_struct *nap +@@ -172,12 +244,14 @@ ltq_etop_poll_tx(struct napi_struct *nap container_of(napi, struct ltq_etop_chan, napi); struct ltq_etop_priv *priv = netdev_priv(ch->netdev); struct netdev_queue *txq = @@ -242,7 +242,7 @@ Signed-off-by: John Crispin dev_kfree_skb_any(ch->skb[ch->tx_free]); ch->skb[ch->tx_free] = NULL; memset(&ch->dma.desc_base[ch->tx_free], 0, -@@ -200,7 +274,9 @@ ltq_etop_poll_tx(struct napi_struct *nap +@@ -190,7 +264,9 @@ ltq_etop_poll_tx(struct napi_struct *nap if (netif_tx_queue_stopped(txq)) netif_tx_start_queue(txq); napi_complete(&ch->napi); @@ -252,7 +252,7 @@ Signed-off-by: John Crispin return 1; } -@@ -208,9 +284,10 @@ static irqreturn_t +@@ -198,9 +274,10 @@ static irqreturn_t ltq_etop_dma_irq(int irq, void *_priv) { struct ltq_etop_priv *priv = _priv; @@ -266,7 +266,7 @@ Signed-off-by: John Crispin return IRQ_HANDLED; } -@@ -222,7 +299,7 @@ ltq_etop_free_channel(struct net_device +@@ -212,7 +289,7 @@ ltq_etop_free_channel(struct net_device ltq_dma_free(&ch->dma); if (ch->dma.irq) free_irq(ch->dma.irq, priv); @@ -275,7 +275,7 @@ Signed-off-by: John Crispin int desc; for (desc = 0; desc < LTQ_DESC_NUM; desc++) dev_kfree_skb_any(ch->skb[ch->dma.desc]); -@@ -233,66 +310,135 @@ static void +@@ -223,66 +300,135 @@ static void ltq_etop_hw_exit(struct net_device *dev) { struct ltq_etop_priv *priv = netdev_priv(dev); @@ -331,10 +331,11 @@ Signed-off-by: John Crispin struct ltq_etop_priv *priv = netdev_priv(dev); - int i; + int mii_mode = priv->mii_mode; -+ -+ clk_enable(priv->clk_ppe); - ltq_pmu_enable(PMU_PPE); ++ clk_enable(priv->clk_ppe); + +- switch (priv->pldata->mii_mode) { + if (of_machine_is_compatible("lantiq,ar9")) { + ltq_etop_gbit_init(dev); + /* force the etops link to the gbit to MII */ @@ -343,8 +344,7 @@ Signed-off-by: John Crispin + ltq_etop_w32_mask(MDIO_CFG_MASK, 0, LTQ_ETOP_MDIO_CFG); + ltq_etop_w32_mask(MAC_CFG_MASK, MAC_CFG_CGEN | MAC_CFG_DUPLEX | + MAC_CFG_SPEED | MAC_CFG_LINK, LTQ_ETOP_MAC_CFG); - -- switch (priv->pldata->mii_mode) { ++ + switch (mii_mode) { case PHY_INTERFACE_MODE_RMII: - ltq_etop_w32_mask(ETOP_MII_MASK, @@ -446,7 +446,7 @@ Signed-off-by: John Crispin } static void -@@ -311,6 +457,39 @@ static const struct ethtool_ops ltq_etop +@@ -301,6 +447,39 @@ static const struct ethtool_ops ltq_etop }; static int @@ -486,7 +486,7 @@ Signed-off-by: John Crispin ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) { u32 val = MDIO_REQUEST | -@@ -318,9 +497,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in +@@ -308,9 +487,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | phy_data; @@ -498,7 +498,7 @@ Signed-off-by: John Crispin return 0; } -@@ -331,12 +510,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in +@@ -321,12 +500,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); @@ -515,17 +515,9 @@ Signed-off-by: John Crispin return val; } -@@ -351,8 +530,18 @@ ltq_etop_mdio_probe(struct net_device *d - { +@@ -342,7 +521,10 @@ ltq_etop_mdio_probe(struct net_device *d struct ltq_etop_priv *priv = netdev_priv(dev); struct phy_device *phydev; -+ u32 phy_supported = (SUPPORTED_10baseT_Half -+ | SUPPORTED_10baseT_Full -+ | SUPPORTED_100baseT_Half -+ | SUPPORTED_100baseT_Full -+ | SUPPORTED_Autoneg -+ | SUPPORTED_MII -+ | SUPPORTED_TP); - phydev = phy_find_first(priv->mii_bus); + if (of_machine_is_compatible("lantiq,ase")) @@ -535,7 +527,7 @@ Signed-off-by: John Crispin if (!phydev) { netdev_err(dev, "no PHY found\n"); -@@ -360,21 +549,18 @@ ltq_etop_mdio_probe(struct net_device *d +@@ -350,14 +532,17 @@ ltq_etop_mdio_probe(struct net_device *d } phydev = phy_connect(dev, phydev_name(phydev), @@ -547,22 +539,15 @@ Signed-off-by: John Crispin return PTR_ERR(phydev); } -- phydev->supported &= (SUPPORTED_10baseT_Half -- | SUPPORTED_10baseT_Full -- | SUPPORTED_100baseT_Half -- | SUPPORTED_100baseT_Full -- | SUPPORTED_Autoneg -- | SUPPORTED_MII -- | SUPPORTED_TP); +- phy_set_max_speed(phydev, SPEED_100); + if (of_machine_is_compatible("lantiq,ar9")) -+ phy_supported |= SUPPORTED_1000baseT_Half -+ | SUPPORTED_1000baseT_Full; ++ phy_set_max_speed(phydev, SPEED_1000); ++ else ++ phy_set_max_speed(phydev, SPEED_100); -+ phydev->supported &= phy_supported; - phydev->advertising = phydev->supported; phy_attached_info(phydev); -@@ -395,8 +581,13 @@ ltq_etop_mdio_init(struct net_device *de +@@ -378,8 +563,13 @@ ltq_etop_mdio_init(struct net_device *de } priv->mii_bus->priv = dev; @@ -578,7 +563,7 @@ Signed-off-by: John Crispin priv->mii_bus->name = "ltq_mii"; snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", priv->pdev->name, priv->pdev->id); -@@ -433,17 +624,19 @@ static int +@@ -416,18 +606,21 @@ static int ltq_etop_open(struct net_device *dev) { struct ltq_etop_priv *priv = netdev_priv(dev); @@ -592,7 +577,9 @@ Signed-off-by: John Crispin + + spin_lock_irqsave(&priv->lock, flags); + ltq_dma_open(&priv->txch.dma); ++ ltq_dma_enable_irq(&priv->txch.dma); + ltq_dma_open(&priv->rxch.dma); ++ ltq_dma_enable_irq(&priv->rxch.dma); + spin_unlock_irqrestore(&priv->lock, flags); + + if (dev->phydev) @@ -601,13 +588,14 @@ Signed-off-by: John Crispin - if (!IS_TX(i) && (!IS_RX(i))) - continue; - ltq_dma_open(&ch->dma); +- ltq_dma_enable_irq(&ch->dma); - napi_enable(&ch->napi); - } - phy_start(dev->phydev); netif_tx_start_all_queues(dev); return 0; } -@@ -452,18 +645,19 @@ static int +@@ -436,18 +629,19 @@ static int ltq_etop_stop(struct net_device *dev) { struct ltq_etop_priv *priv = netdev_priv(dev); @@ -637,7 +625,7 @@ Signed-off-by: John Crispin return 0; } -@@ -473,16 +667,16 @@ ltq_etop_tx(struct sk_buff *skb, struct +@@ -457,16 +651,16 @@ ltq_etop_tx(struct sk_buff *skb, struct int queue = skb_get_queue_mapping(skb); struct netdev_queue *txq = netdev_get_tx_queue(dev, queue); struct ltq_etop_priv *priv = netdev_priv(dev); @@ -659,7 +647,7 @@ Signed-off-by: John Crispin netdev_err(dev, "tx ring full\n"); netif_tx_stop_queue(txq); return NETDEV_TX_BUSY; -@@ -490,7 +684,7 @@ ltq_etop_tx(struct sk_buff *skb, struct +@@ -474,7 +668,7 @@ ltq_etop_tx(struct sk_buff *skb, struct /* dma needs to start on a 16 byte aligned address */ byte_offset = CPHYSADDR(skb->data) % 16; @@ -668,7 +656,7 @@ Signed-off-by: John Crispin netif_trans_update(dev); -@@ -500,11 +694,11 @@ ltq_etop_tx(struct sk_buff *skb, struct +@@ -484,11 +678,11 @@ ltq_etop_tx(struct sk_buff *skb, struct wmb(); desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); @@ -683,7 +671,7 @@ Signed-off-by: John Crispin netif_tx_stop_queue(txq); return NETDEV_TX_OK; -@@ -515,11 +709,14 @@ ltq_etop_change_mtu(struct net_device *d +@@ -499,11 +693,14 @@ ltq_etop_change_mtu(struct net_device *d { struct ltq_etop_priv *priv = netdev_priv(dev); unsigned long flags; @@ -699,7 +687,7 @@ Signed-off-by: John Crispin spin_unlock_irqrestore(&priv->lock, flags); return 0; -@@ -579,6 +776,9 @@ ltq_etop_init(struct net_device *dev) +@@ -563,6 +760,9 @@ ltq_etop_init(struct net_device *dev) if (err) goto err_hw; ltq_etop_change_mtu(dev, 1500); @@ -709,7 +697,7 @@ Signed-off-by: John Crispin memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); if (!is_valid_ether_addr(mac.sa_data)) { -@@ -596,9 +796,10 @@ ltq_etop_init(struct net_device *dev) +@@ -580,9 +780,10 @@ ltq_etop_init(struct net_device *dev) dev->addr_assign_type = NET_ADDR_RANDOM; ltq_etop_set_multicast_list(dev); @@ -723,7 +711,7 @@ Signed-off-by: John Crispin return 0; err_netdev: -@@ -618,6 +819,9 @@ ltq_etop_tx_timeout(struct net_device *d +@@ -602,6 +803,9 @@ ltq_etop_tx_timeout(struct net_device *d err = ltq_etop_hw_init(dev); if (err) goto err_hw; @@ -733,7 +721,7 @@ Signed-off-by: John Crispin netif_trans_update(dev); netif_wake_queue(dev); return; -@@ -641,14 +845,19 @@ static const struct net_device_ops ltq_e +@@ -625,14 +829,19 @@ static const struct net_device_ops ltq_e .ndo_tx_timeout = ltq_etop_tx_timeout, }; @@ -757,7 +745,7 @@ Signed-off-by: John Crispin res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { -@@ -674,31 +883,62 @@ ltq_etop_probe(struct platform_device *p +@@ -658,31 +867,62 @@ ltq_etop_probe(struct platform_device *p goto err_out; } @@ -835,7 +823,7 @@ Signed-off-by: John Crispin err = register_netdev(dev); if (err) -@@ -727,31 +967,22 @@ ltq_etop_remove(struct platform_device * +@@ -711,31 +951,22 @@ ltq_etop_remove(struct platform_device * return 0; } diff --git a/target/linux/lantiq/patches-5.4/0030-GPIO-add-named-gpio-exports.patch b/target/linux/lantiq/patches-5.4/0030-GPIO-add-named-gpio-exports.patch index 8e3060d768e..419516978c6 100644 --- a/target/linux/lantiq/patches-5.4/0030-GPIO-add-named-gpio-exports.patch +++ b/target/linux/lantiq/patches-5.4/0030-GPIO-add-named-gpio-exports.patch @@ -13,7 +13,7 @@ Signed-off-by: John Crispin --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c -@@ -23,6 +23,8 @@ +@@ -19,6 +19,8 @@ #include #include #include @@ -21,9 +21,9 @@ Signed-off-by: John Crispin +#include #include "gpiolib.h" - -@@ -660,3 +662,72 @@ void of_gpiochip_remove(struct gpio_chip - gpiochip_remove_pin_ranges(chip); + #include "gpiolib-of.h" +@@ -915,3 +917,72 @@ void of_gpiochip_remove(struct gpio_chip + { of_node_put(chip->of_node); } + @@ -112,7 +112,7 @@ Signed-off-by: John Crispin { --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h -@@ -533,6 +533,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_ +@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_ #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) @@ -120,7 +120,7 @@ Signed-off-by: John Crispin int gpiod_export(struct gpio_desc *desc, bool direction_may_change); int gpiod_export_link(struct device *dev, const char *name, struct gpio_desc *desc); -@@ -540,6 +541,13 @@ void gpiod_unexport(struct gpio_desc *de +@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ @@ -136,7 +136,7 @@ Signed-off-by: John Crispin { --- a/drivers/gpio/gpiolib-sysfs.c +++ b/drivers/gpio/gpiolib-sysfs.c -@@ -568,7 +568,7 @@ static struct class gpio_class = { +@@ -563,7 +563,7 @@ static struct class gpio_class = { * * Returns zero on success, else an error. */ @@ -145,7 +145,7 @@ Signed-off-by: John Crispin { struct gpio_chip *chip; struct gpio_device *gdev; -@@ -630,6 +630,8 @@ int gpiod_export(struct gpio_desc *desc, +@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc, offset = gpio_chip_hwgpio(desc); if (chip->names && chip->names[offset]) ioname = chip->names[offset]; @@ -154,7 +154,7 @@ Signed-off-by: John Crispin dev = device_create_with_groups(&gpio_class, &gdev->dev, MKDEV(0, 0), data, gpio_groups, -@@ -651,6 +653,12 @@ err_unlock: +@@ -646,6 +648,12 @@ err_unlock: gpiod_dbg(desc, "%s: status %d\n", __func__, status); return status; } diff --git a/target/linux/lantiq/patches-5.4/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch b/target/linux/lantiq/patches-5.4/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch index eed32d30978..2493da32ec7 100644 --- a/target/linux/lantiq/patches-5.4/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch +++ b/target/linux/lantiq/patches-5.4/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch @@ -18,7 +18,7 @@ Signed-off-by: John Crispin --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig -@@ -691,6 +691,16 @@ config I2C_MESON +@@ -729,6 +729,16 @@ config I2C_MESON If you say yes to this option, support will be included for the I2C interface on the Amlogic Meson family of SoCs. @@ -37,7 +37,7 @@ Signed-off-by: John Crispin depends on PPC --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile -@@ -67,6 +67,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l +@@ -73,6 +73,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o diff --git a/target/linux/lantiq/patches-5.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-5.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch index a382b9117cf..82567be6907 100644 --- a/target/linux/lantiq/patches-5.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch +++ b/target/linux/lantiq/patches-5.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch @@ -16,7 +16,7 @@ Signed-off-by: John Crispin --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h -@@ -104,5 +104,8 @@ int xrx200_gphy_boot(struct device *dev, +@@ -102,5 +102,8 @@ int xrx200_gphy_boot(struct device *dev, extern void ltq_pmu_enable(unsigned int module); extern void ltq_pmu_disable(unsigned int module); @@ -27,7 +27,7 @@ Signed-off-by: John Crispin #endif /* _LTQ_XWAY_H__ */ --- a/arch/mips/lantiq/xway/Makefile +++ b/arch/mips/lantiq/xway/Makefile -@@ -7,3 +7,6 @@ obj-y += timer.o +@@ -8,3 +8,6 @@ obj-y += timer.o endif obj-y += vmmc.o @@ -203,7 +203,7 @@ Signed-off-by: John Crispin +early_param("ethaddr", setup_ethaddr); --- a/drivers/net/ethernet/lantiq_etop.c +++ b/drivers/net/ethernet/lantiq_etop.c -@@ -780,7 +780,11 @@ ltq_etop_init(struct net_device *dev) +@@ -764,7 +764,11 @@ ltq_etop_init(struct net_device *dev) if (err) goto err_hw; diff --git a/target/linux/lantiq/patches-5.4/0042-arch-mips-increase-io_space_limit.patch b/target/linux/lantiq/patches-5.4/0042-arch-mips-increase-io_space_limit.patch index 7165dd0070e..7c0d10ed101 100644 --- a/target/linux/lantiq/patches-5.4/0042-arch-mips-increase-io_space_limit.patch +++ b/target/linux/lantiq/patches-5.4/0042-arch-mips-increase-io_space_limit.patch @@ -12,7 +12,7 @@ Signed-off-by: John Crispin --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h -@@ -52,7 +52,7 @@ +@@ -53,7 +53,7 @@ /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ diff --git a/target/linux/lantiq/patches-5.4/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch b/target/linux/lantiq/patches-5.4/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch index fed65e53211..d63d48ad1f6 100644 --- a/target/linux/lantiq/patches-5.4/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch +++ b/target/linux/lantiq/patches-5.4/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch @@ -23,7 +23,7 @@ Signed-off-by: Hauke Mehrtens --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c -@@ -91,7 +91,14 @@ static void dwc2_set_rk_params(struct dw +@@ -92,7 +92,14 @@ static void dwc2_set_rk_params(struct dw p->power_down = 0; } @@ -39,7 +39,7 @@ Signed-off-by: Hauke Mehrtens { struct dwc2_core_params *p = &hsotg->params; -@@ -99,12 +106,20 @@ static void dwc2_set_ltq_params(struct d +@@ -100,12 +107,20 @@ static void dwc2_set_ltq_params(struct d p->host_rx_fifo_size = 288; p->host_nperio_tx_fifo_size = 128; p->host_perio_tx_fifo_size = 96; @@ -62,7 +62,7 @@ Signed-off-by: Hauke Mehrtens static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg) { struct dwc2_core_params *p = &hsotg->params; -@@ -156,8 +171,11 @@ const struct of_device_id dwc2_of_match_ +@@ -167,8 +182,11 @@ const struct of_device_id dwc2_of_match_ { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params }, { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params }, diff --git a/target/linux/lantiq/patches-5.4/0051-MIPS-lantiq-improve-USB-initialization.patch b/target/linux/lantiq/patches-5.4/0051-MIPS-lantiq-improve-USB-initialization.patch index a7bdafd7045..3f276e11584 100644 --- a/target/linux/lantiq/patches-5.4/0051-MIPS-lantiq-improve-USB-initialization.patch +++ b/target/linux/lantiq/patches-5.4/0051-MIPS-lantiq-improve-USB-initialization.patch @@ -15,7 +15,7 @@ Signed-off-by: Hauke Mehrtens --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c -@@ -246,6 +246,25 @@ static void pmu_disable(struct clk *clk) +@@ -244,6 +244,25 @@ static void pmu_disable(struct clk *clk) pr_warn("deactivating PMU module failed!"); } @@ -41,7 +41,7 @@ Signed-off-by: Hauke Mehrtens /* the pci enable helper */ static int pci_enable(struct clk *clk) { -@@ -567,4 +586,5 @@ void __init ltq_soc_init(void) +@@ -565,4 +584,5 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); } diff --git a/target/linux/lantiq/patches-5.4/0101-find_active_root.patch b/target/linux/lantiq/patches-5.4/0101-find_active_root.patch index f48b5b7c65f..b6b4ab7409f 100644 --- a/target/linux/lantiq/patches-5.4/0101-find_active_root.patch +++ b/target/linux/lantiq/patches-5.4/0101-find_active_root.patch @@ -1,6 +1,6 @@ ---- a/drivers/mtd/ofpart.c -+++ b/drivers/mtd/ofpart.c -@@ -25,6 +25,38 @@ static bool node_has_compatible(struct d +--- a/drivers/mtd/parsers/ofpart.c ++++ b/drivers/mtd/parsers/ofpart.c +@@ -21,6 +21,38 @@ static bool node_has_compatible(struct d return of_get_property(pp, "compatible", NULL); } @@ -39,7 +39,7 @@ static int parse_fixed_partitions(struct mtd_info *master, const struct mtd_partition **pparts, struct mtd_part_parser_data *data) -@@ -36,7 +68,8 @@ static int parse_fixed_partitions(struct +@@ -32,7 +64,8 @@ static int parse_fixed_partitions(struct struct device_node *pp; int nr_parts, i, ret = 0; bool dedicated = true; @@ -49,7 +49,7 @@ /* Pull of_node from the master device node */ mtd_node = mtd_get_of_node(master); -@@ -72,7 +105,9 @@ static int parse_fixed_partitions(struct +@@ -68,7 +101,9 @@ static int parse_fixed_partitions(struct return 0; parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL); @@ -60,7 +60,7 @@ return -ENOMEM; i = 0; -@@ -121,12 +156,22 @@ static int parse_fixed_partitions(struct +@@ -117,12 +152,22 @@ static int parse_fixed_partitions(struct if (of_get_property(pp, "lock", &len)) parts[i].mask_flags |= MTD_POWERUP_LOCK; @@ -83,7 +83,7 @@ *pparts = parts; return nr_parts; -@@ -137,6 +182,7 @@ ofpart_fail: +@@ -133,6 +178,7 @@ ofpart_fail: ofpart_none: of_node_put(pp); kfree(parts); diff --git a/target/linux/lantiq/patches-5.4/0151-lantiq-ifxmips_pcie-use-of.patch b/target/linux/lantiq/patches-5.4/0151-lantiq-ifxmips_pcie-use-of.patch index b081871191d..bc02a58b1c7 100644 --- a/target/linux/lantiq/patches-5.4/0151-lantiq-ifxmips_pcie-use-of.patch +++ b/target/linux/lantiq/patches-5.4/0151-lantiq-ifxmips_pcie-use-of.patch @@ -1,7 +1,13 @@ --- a/arch/mips/pci/ifxmips_pcie.c +++ b/arch/mips/pci/ifxmips_pcie.c -@@ -18,6 +18,9 @@ +@@ -16,8 +16,15 @@ + #include + #include #include ++#include ++#include ++#include ++#include #include +#include @@ -10,15 +16,18 @@ #include "ifxmips_pcie.h" #include "ifxmips_pcie_reg.h" -@@ -40,6 +43,7 @@ +@@ -40,6 +47,10 @@ static DEFINE_SPINLOCK(ifx_pcie_lock); u32 g_pcie_debug_flag = PCIE_MSG_ANY & (~PCIE_MSG_CFG); +static int pcie_reset_gpio; ++static struct phy *ltq_pcie_phy; ++static struct reset_control *ltq_pcie_reset; ++static struct regmap *ltq_rcu_regmap; static ifx_pcie_irq_t pcie_irqs[IFX_PCIE_CORE_NR] = { { -@@ -82,6 +86,22 @@ void ifx_pcie_debug(const char *fmt, ... +@@ -82,6 +93,22 @@ void ifx_pcie_debug(const char *fmt, ... printk("%s", buf); } @@ -41,7 +50,80 @@ static inline int pcie_ltssm_enable(int pcie_port) { -@@ -1045,17 +1065,52 @@ pcie_rc_initialize(int pcie_port) +@@ -988,10 +1015,22 @@ int ifx_pcie_bios_plat_dev_init(struct + static int + pcie_rc_initialize(int pcie_port) + { +- int i; ++ int i, ret; + #define IFX_PCIE_PHY_LOOP_CNT 5 + +- pcie_rcu_endian_setup(pcie_port); ++ regmap_update_bits(ltq_rcu_regmap, 0x4c, IFX_RCU_AHB_BE_PCIE_M, ++ IFX_RCU_AHB_BE_PCIE_M); ++ ++#ifdef CONFIG_IFX_PCIE_HW_SWAP ++ regmap_update_bits(ltq_rcu_regmap, 0x4c, IFX_RCU_AHB_BE_PCIE_S, ++ IFX_RCU_AHB_BE_PCIE_S); ++#else ++ regmap_update_bits(ltq_rcu_regmap, 0x4c, IFX_RCU_AHB_BE_PCIE_S, ++ 0x0); ++#endif ++ ++ regmap_update_bits(ltq_rcu_regmap, 0x4c, IFX_RCU_AHB_BE_XBAR_M, ++ 0x0); + + pcie_ep_gpio_rst_init(pcie_port); + +@@ -1000,26 +1039,21 @@ pcie_rc_initialize(int pcie_port) + * reset PCIe PHY will solve this issue + */ + for (i = 0; i < IFX_PCIE_PHY_LOOP_CNT; i++) { +- /* Disable PCIe PHY Analog part for sanity check */ +- pcie_phy_pmu_disable(pcie_port); +- +- pcie_phy_rst_assert(pcie_port); +- pcie_phy_rst_deassert(pcie_port); +- +- /* Make sure PHY PLL is stable */ +- udelay(20); +- +- /* PCIe Core reset enabled, low active, sw programmed */ +- pcie_core_rst_assert(pcie_port); ++ ret = phy_init(ltq_pcie_phy); ++ if (ret) ++ continue; + + /* Put PCIe EP in reset status */ + pcie_device_rst_assert(pcie_port); + +- /* PCI PHY & Core reset disabled, high active, sw programmed */ +- pcie_core_rst_deassert(pcie_port); ++ udelay(1); ++ reset_control_deassert(ltq_pcie_reset); + +- /* Already in a quiet state, program PLL, enable PHY, check ready bit */ +- pcie_phy_clock_mode_setup(pcie_port); ++ ret = phy_power_on(ltq_pcie_phy); ++ if (ret) { ++ phy_exit(ltq_pcie_phy); ++ continue; ++ } + + /* Enable PCIe PHY and Clock */ + pcie_core_pmu_setup(pcie_port); +@@ -1035,6 +1069,10 @@ pcie_rc_initialize(int pcie_port) + /* Once link is up, break out */ + if (pcie_app_loigc_setup(pcie_port) == 0) + break; ++ ++ phy_power_off(ltq_pcie_phy); ++ reset_control_assert(ltq_pcie_reset); ++ phy_exit(ltq_pcie_phy); + } + if (i >= IFX_PCIE_PHY_LOOP_CNT) { + printk(KERN_ERR "%s link up failed!!!!!\n", __func__); +@@ -1045,17 +1083,67 @@ pcie_rc_initialize(int pcie_port) return 0; } @@ -52,7 +134,6 @@ void __iomem *io_map_base; int pcie_port; int startup_port; - + struct device_node *np; + struct pci_bus *bus; + @@ -76,13 +157,29 @@ + if (!bus) + return -EPROBE_DEFER; + } -+ + /* Enable AHB Master/ Slave */ pcie_ahb_pmu_setup(); startup_port = IFX_PCIE_PORT0; - + ++ ltq_pcie_phy = devm_phy_get(&pdev->dev, "pcie"); ++ if (IS_ERR(ltq_pcie_phy)) { ++ dev_err(&pdev->dev, "failed to get the PCIe PHY\n"); ++ return PTR_ERR(ltq_pcie_phy); ++ } ++ ++ ltq_pcie_reset = devm_reset_control_get_shared(&pdev->dev, NULL); ++ if (IS_ERR(ltq_pcie_reset)) { ++ dev_err(&pdev->dev, "failed to get the PCIe reset line\n"); ++ return PTR_ERR(ltq_pcie_reset); ++ } ++ ++ ltq_rcu_regmap = syscon_regmap_lookup_by_phandle(node, "lantiq,rcu"); ++ if (IS_ERR(ltq_rcu_regmap)) ++ return PTR_ERR(ltq_rcu_regmap); ++ + pcie_reset_gpio = of_get_named_gpio(node, "gpio-reset", 0); + if (gpio_is_valid(pcie_reset_gpio)) { + int ret = devm_gpio_request(&pdev->dev, pcie_reset_gpio, "pcie-reset"); @@ -96,7 +193,7 @@ for (pcie_port = startup_port; pcie_port < IFX_PCIE_CORE_NR; pcie_port++){ if (pcie_rc_initialize(pcie_port) == 0) { IFX_PCIE_PRINT(PCIE_MSG_INIT, "%s: ifx_pcie_cfg_base 0x%p\n", -@@ -1067,6 +1122,7 @@ static int __init ifx_pcie_bios_init(voi +@@ -1067,6 +1155,7 @@ static int __init ifx_pcie_bios_init(voi return -ENOMEM; } ifx_pcie_controller[pcie_port].pcic.io_map_base = (unsigned long)io_map_base; @@ -104,7 +201,7 @@ register_pci_controller(&ifx_pcie_controller[pcie_port].pcic); /* XXX, clear error status */ -@@ -1083,6 +1139,30 @@ static int __init ifx_pcie_bios_init(voi +@@ -1083,6 +1172,30 @@ static int __init ifx_pcie_bios_init(voi return 0; } @@ -168,10 +265,98 @@ static inline void pcie_ahb_pmu_setup(void) { /* Enable AHB bus master/slave */ -@@ -180,20 +163,6 @@ static inline void pcie_phy_rst_deassert - IFX_REG_W32(reg, IFX_RCU_RST_REQ); +@@ -79,24 +62,6 @@ static inline void pcie_ahb_pmu_setup(vo + //AHBS_PMU_SETUP(IFX_PMU_ENABLE); } +-static inline void pcie_rcu_endian_setup(int pcie_port) +-{ +- u32 reg; +- +- reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); +-#ifdef CONFIG_IFX_PCIE_HW_SWAP +- reg |= IFX_RCU_AHB_BE_PCIE_M; +- reg |= IFX_RCU_AHB_BE_PCIE_S; +- reg &= ~IFX_RCU_AHB_BE_XBAR_M; +-#else +- reg |= IFX_RCU_AHB_BE_PCIE_M; +- reg &= ~IFX_RCU_AHB_BE_PCIE_S; +- reg &= ~IFX_RCU_AHB_BE_XBAR_M; +-#endif /* CONFIG_IFX_PCIE_HW_SWAP */ +- IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); +- IFX_PCIE_PRINT(PCIE_MSG_REG, "%s IFX_RCU_AHB_ENDIAN: 0x%08x\n", __func__, IFX_REG_R32(IFX_RCU_AHB_ENDIAN)); +-} +- + static inline void pcie_phy_pmu_enable(int pcie_port) + { + struct clk *clk; +@@ -115,17 +80,6 @@ static inline void pcie_phy_pmu_disable( + // PCIE_PHY_PMU_SETUP(IFX_PMU_DISABLE); + } + +-static inline void pcie_pdi_big_endian(int pcie_port) +-{ +- u32 reg; +- +- /* SRAM2PDI endianness control. */ +- reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); +- /* Config AHB->PCIe and PDI endianness */ +- reg |= IFX_RCU_AHB_BE_PCIE_PDI; +- IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); +-} +- + static inline void pcie_pdi_pmu_enable(int pcie_port) + { + /* Enable PDI to access PCIe PHY register */ +@@ -135,65 +89,6 @@ static inline void pcie_pdi_pmu_enable(i + //PDI_PMU_SETUP(IFX_PMU_ENABLE); + } + +-static inline void pcie_core_rst_assert(int pcie_port) +-{ +- u32 reg; +- +- reg = IFX_REG_R32(IFX_RCU_RST_REQ); +- +- /* Reset PCIe PHY & Core, bit 22, bit 26 may be affected if write it directly */ +- reg |= 0x00400000; +- IFX_REG_W32(reg, IFX_RCU_RST_REQ); +-} +- +-static inline void pcie_core_rst_deassert(int pcie_port) +-{ +- u32 reg; +- +- /* Make sure one micro-second delay */ +- udelay(1); +- +- /* Reset PCIe PHY & Core, bit 22 */ +- reg = IFX_REG_R32(IFX_RCU_RST_REQ); +- reg &= ~0x00400000; +- IFX_REG_W32(reg, IFX_RCU_RST_REQ); +-} +- +-static inline void pcie_phy_rst_assert(int pcie_port) +-{ +- u32 reg; +- +- reg = IFX_REG_R32(IFX_RCU_RST_REQ); +- reg |= 0x00001000; /* Bit 12 */ +- IFX_REG_W32(reg, IFX_RCU_RST_REQ); +-} +- +-static inline void pcie_phy_rst_deassert(int pcie_port) +-{ +- u32 reg; +- +- /* Make sure one micro-second delay */ +- udelay(1); +- +- reg = IFX_REG_R32(IFX_RCU_RST_REQ); +- reg &= ~0x00001000; /* Bit 12 */ +- IFX_REG_W32(reg, IFX_RCU_RST_REQ); +-} +- -static inline void pcie_device_rst_assert(int pcie_port) -{ - gpio_set_value(IFX_PCIE_GPIO_RESET, 0); @@ -189,3 +374,14 @@ static inline void pcie_core_pmu_setup(int pcie_port) { struct clk *clk; +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -51,7 +51,7 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o + obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o + obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o + obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o +-obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie_phy.o ifxmips_pcie.o fixup-lantiq-pcie.o ++obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie.o fixup-lantiq-pcie.o + obj-$(CONFIG_PCIE_LANTIQ_MSI) += pcie-lantiq-msi.o + obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o + obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o diff --git a/target/linux/lantiq/patches-5.4/0152-lantiq-VPE.patch b/target/linux/lantiq/patches-5.4/0152-lantiq-VPE.patch index 9e39427c6a2..f4540558249 100644 --- a/target/linux/lantiq/patches-5.4/0152-lantiq-VPE.patch +++ b/target/linux/lantiq/patches-5.4/0152-lantiq-VPE.patch @@ -1,6 +1,6 @@ --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -2318,6 +2318,12 @@ config MIPS_VPE_LOADER +@@ -2375,6 +2375,12 @@ config MIPS_VPE_LOADER Includes a loader for loading an elf relocatable object onto another VPE and running it. @@ -142,7 +142,7 @@ { --- a/arch/mips/lantiq/prom.c +++ b/arch/mips/lantiq/prom.c -@@ -36,10 +36,14 @@ unsigned long physical_memsize = 0L; +@@ -34,10 +34,14 @@ unsigned long physical_memsize = 0L; */ static struct ltq_soc_info soc_info; @@ -169,7 +169,7 @@ #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) -@@ -377,6 +380,8 @@ do { \ +@@ -378,6 +381,8 @@ do { \ #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) #define read_vpe_c0_vpeconf1() mftc0(1, 3) #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val) diff --git a/target/linux/lantiq/patches-5.4/0154-lantiq-pci-bar11mask-fix.patch b/target/linux/lantiq/patches-5.4/0154-lantiq-pci-bar11mask-fix.patch index d0acd4bb10c..d6556d115df 100644 --- a/target/linux/lantiq/patches-5.4/0154-lantiq-pci-bar11mask-fix.patch +++ b/target/linux/lantiq/patches-5.4/0154-lantiq-pci-bar11mask-fix.patch @@ -1,6 +1,6 @@ --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c -@@ -61,6 +61,8 @@ +@@ -59,6 +59,8 @@ #define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y)) #define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x)) @@ -9,7 +9,7 @@ __iomem void *ltq_pci_mapped_cfg; static __iomem void *ltq_pci_membase; -@@ -86,8 +88,8 @@ static inline u32 ltq_calc_bar11mask(voi +@@ -84,8 +86,8 @@ static inline u32 ltq_calc_bar11mask(voi u32 mem, bar11mask; /* BAR11MASK value depends on available memory on system. */ diff --git a/target/linux/lantiq/patches-5.4/0160-owrt-lantiq-multiple-flash.patch b/target/linux/lantiq/patches-5.4/0160-owrt-lantiq-multiple-flash.patch index 304ff4bac8c..796220b2bc2 100644 --- a/target/linux/lantiq/patches-5.4/0160-owrt-lantiq-multiple-flash.patch +++ b/target/linux/lantiq/patches-5.4/0160-owrt-lantiq-multiple-flash.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c -@@ -19,6 +19,7 @@ +@@ -17,6 +17,7 @@ #include #include #include @@ -8,7 +8,7 @@ #include #include -@@ -38,13 +39,16 @@ enum { +@@ -36,13 +37,16 @@ enum { LTQ_NOR_NORMAL }; @@ -28,7 +28,7 @@ static map_word ltq_read16(struct map_info *map, unsigned long adr) -@@ -108,11 +112,43 @@ ltq_copy_to(struct map_info *map, unsign +@@ -106,11 +110,43 @@ ltq_copy_to(struct map_info *map, unsign } static int @@ -73,7 +73,7 @@ ltq_mtd = devm_kzalloc(&pdev->dev, sizeof(struct ltq_mtd), GFP_KERNEL); if (!ltq_mtd) -@@ -120,75 +156,89 @@ ltq_mtd_probe(struct platform_device *pd +@@ -118,75 +154,89 @@ ltq_mtd_probe(struct platform_device *pd platform_set_drvdata(pdev, ltq_mtd); diff --git a/target/linux/lantiq/patches-5.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-5.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch index b98abe8b4b4..1beef0e1fef 100644 --- a/target/linux/lantiq/patches-5.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch +++ b/target/linux/lantiq/patches-5.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch @@ -1,6 +1,6 @@ --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c -@@ -424,6 +424,20 @@ static void clkdev_add_clkout(void) +@@ -422,6 +422,20 @@ static void clkdev_add_clkout(void) } } @@ -21,7 +21,7 @@ /* bring up all register ranges that we need for basic system control */ void __init ltq_soc_init(void) { -@@ -587,4 +601,6 @@ void __init ltq_soc_init(void) +@@ -585,4 +599,6 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); } usb_set_clock(); diff --git a/target/linux/lantiq/patches-5.4/0701-NET-lantiq-etop-of-mido.patch b/target/linux/lantiq/patches-5.4/0701-NET-lantiq-etop-of-mido.patch index 05e4ec8328f..2cc541ae3cf 100644 --- a/target/linux/lantiq/patches-5.4/0701-NET-lantiq-etop-of-mido.patch +++ b/target/linux/lantiq/patches-5.4/0701-NET-lantiq-etop-of-mido.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/lantiq_etop.c +++ b/drivers/net/ethernet/lantiq_etop.c -@@ -40,6 +40,7 @@ +@@ -30,6 +30,7 @@ #include #include #include @@ -8,7 +8,7 @@ #include -@@ -571,7 +572,8 @@ static int +@@ -553,7 +554,8 @@ static int ltq_etop_mdio_init(struct net_device *dev) { struct ltq_etop_priv *priv = netdev_priv(dev); @@ -18,7 +18,7 @@ priv->mii_bus = mdiobus_alloc(); if (!priv->mii_bus) { -@@ -591,7 +593,15 @@ ltq_etop_mdio_init(struct net_device *de +@@ -573,7 +575,15 @@ ltq_etop_mdio_init(struct net_device *de priv->mii_bus->name = "ltq_mii"; snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", priv->pdev->name, priv->pdev->id); diff --git a/target/linux/lantiq/xrx200/config-5.4 b/target/linux/lantiq/xrx200/config-5.4 index 0c14f3dadc4..cad6ebf1ae9 100644 --- a/target/linux/lantiq/xrx200/config-5.4 +++ b/target/linux/lantiq/xrx200/config-5.4 @@ -10,12 +10,15 @@ CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_ZSTD=y CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin" CONFIG_EXTRA_FIRMWARE_DIR="firmware" +CONFIG_GENERIC_ALLOCATOR=y CONFIG_HWMON=y CONFIG_ICPLUS_PHY=y CONFIG_IFX_VPE_EXT=y @@ -24,7 +27,7 @@ CONFIG_INPUT_EVDEV=y CONFIG_INPUT_POLLDEV=y CONFIG_INTEL_XWAY_PHY=y # CONFIG_ISDN is not set -CONFIG_LANTIQ_XRX200=y +CONFIG_LANTIQ_XRX200_LEGACY=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y @@ -38,11 +41,11 @@ CONFIG_MIPS_VPE_APSP_API_MT=y CONFIG_MIPS_VPE_LOADER=y CONFIG_MIPS_VPE_LOADER_MT=y CONFIG_MIPS_VPE_LOADER_TOM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_PLATFORM=y CONFIG_MTD_NAND_XWAY=y -# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_RAW_NAND=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y @@ -59,8 +62,10 @@ CONFIG_PCIEPORTBUS=y CONFIG_PCIE_LANTIQ=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_LANTIQ=y +CONFIG_PHY_LANTIQ_VRX200_PCIE=y CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_SUPPLY=y +CONFIG_POWER_SUPPLY_HWMON=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -87,11 +92,15 @@ CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y CONFIG_UBIFS_FS_LZO=y CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y CONFIG_USB=y CONFIG_USB_COMMON=y # CONFIG_USB_EHCI_HCD is not set CONFIG_USB_SUPPORT=y CONFIG_XPS=y CONFIG_XRX200_PHY_FW=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/lantiq/xway/config-5.4 b/target/linux/lantiq/xway/config-5.4 index 6075cec522a..7c539ba2caf 100644 --- a/target/linux/lantiq/xway/config-5.4 +++ b/target/linux/lantiq/xway/config-5.4 @@ -5,7 +5,10 @@ CONFIG_BLK_MQ_PCI=y CONFIG_CRC16=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y CONFIG_INPUT=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_POLLDEV=y @@ -13,11 +16,10 @@ CONFIG_INPUT_POLLDEV=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_PLATFORM=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_XWAY=y -# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_RAW_NAND=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y @@ -35,13 +37,18 @@ CONFIG_RTL8306_PHY=y CONFIG_RTL8366S_PHY=y CONFIG_RTL8367B_PHY=y CONFIG_RTL8367_PHY=y +CONFIG_SGL_ALLOC=y CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y CONFIG_UBIFS_FS_LZO=y CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y CONFIG_USB=y CONFIG_USB_COMMON=y # CONFIG_USB_EHCI_HCD is not set CONFIG_USB_SUPPORT=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/lantiq/xway_legacy/config-5.4 b/target/linux/lantiq/xway_legacy/config-5.4 index c4042f147fa..63452a7487b 100644 --- a/target/linux/lantiq/xway_legacy/config-5.4 +++ b/target/linux/lantiq/xway_legacy/config-5.4 @@ -5,6 +5,7 @@ CONFIG_CRC16=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y +CONFIG_GENERIC_ALLOCATOR=y # CONFIG_GPIO_SYSFS is not set # CONFIG_HW_RANDOM is not set CONFIG_INPUT=y @@ -15,7 +16,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_TIMER is not set CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -# CONFIG_MTD_PHYSMAP_OF is not set CONFIG_NLS=y CONFIG_PCI=y # CONFIG_PCIE_LANTIQ is not set @@ -27,6 +27,7 @@ CONFIG_RTL8306_PHY=y CONFIG_RTL8366S_PHY=y CONFIG_RTL8367B_PHY=y CONFIG_RTL8367_PHY=y +CONFIG_SGL_ALLOC=y CONFIG_USB=y CONFIG_USB_COMMON=y # CONFIG_USB_EHCI_HCD is not set