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bcm63xx: nand: fix v2.1 controller support

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Page size shift is different from v2.2+ controllers

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This commit is contained in:
Álvaro Fernández Rojas 2020-05-21 08:58:19 +02:00
parent 289c632425
commit 67861b2a66
1 changed files with 40 additions and 8 deletions
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48
target/linux/bcm63xx/patches-5.4/441-mtd-rawnand-brcmnand-support-v2.1-v2.2-controllers.patch
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@ -1,6 +1,14 @@
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -269,6 +269,36 @@ enum brcmnand_reg {
@@ -196,6 +196,7 @@ struct brcmnand_controller {
const unsigned int *block_sizes;
unsigned int max_page_size;
const unsigned int *page_sizes;
+ unsigned int page_size_shift;
unsigned int max_oob;
u32 features;
@@ -269,6 +270,36 @@ enum brcmnand_reg {
BRCMNAND_FC_BASE,
};
@ -37,7 +45,17 @@
/* BRCMNAND v3.3-v4.0 */
static const u16 brcmnand_regs_v33[] = {
[BRCMNAND_CMD_START] = 0x04,
@@ -502,12 +532,16 @@ static int brcmnand_revision_init(struct
@@ -467,6 +498,9 @@ enum {
CFG_BUS_WIDTH = BIT(CFG_BUS_WIDTH_SHIFT),
CFG_DEVICE_SIZE_SHIFT = 24,
+ /* Only for v2.1 */
+ CFG_PAGE_SIZE_SHIFT_v2_1 = 30,
+
/* Only for pre-v7.1 (with no CFG_EXT register) */
CFG_PAGE_SIZE_SHIFT = 20,
CFG_BLK_SIZE_SHIFT = 28,
@@ -502,12 +536,16 @@ static int brcmnand_revision_init(struct
{
static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 };
static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 };
@ -56,7 +74,7 @@
dev_err(ctrl->dev, "version %#x not supported\n",
ctrl->nand_version);
return -ENODEV;
@@ -524,6 +558,8 @@ static int brcmnand_revision_init(struct
@@ -524,6 +562,8 @@ static int brcmnand_revision_init(struct
ctrl->reg_offsets = brcmnand_regs_v50;
else if (ctrl->nand_version >= 0x0303)
ctrl->reg_offsets = brcmnand_regs_v33;
@ -65,7 +83,7 @@
/* Chip-select stride */
if (ctrl->nand_version >= 0x0701)
@@ -549,14 +585,27 @@ static int brcmnand_revision_init(struct
@@ -549,14 +589,32 @@ static int brcmnand_revision_init(struct
ctrl->max_page_size = 16 * 1024;
ctrl->max_block_size = 2 * 1024 * 1024;
} else {
@ -76,6 +94,11 @@
+ ctrl->page_sizes = page_sizes_v2_2;
+ else
+ ctrl->page_sizes = page_sizes_v2_1;
+
+ if (ctrl->nand_version >= 0x0202)
+ ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT;
+ else
+ ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT_v2_1;
+
if (ctrl->nand_version >= 0x0600)
ctrl->block_sizes = block_sizes_v6;
@ -96,7 +119,7 @@
ctrl->max_block_size = 512 * 1024;
}
}
@@ -724,6 +773,9 @@ static void brcmnand_wr_corr_thresh(stru
@@ -724,6 +782,9 @@ static void brcmnand_wr_corr_thresh(stru
enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD;
int cs = host->cs;
@ -106,7 +129,7 @@
if (ctrl->nand_version == 0x0702)
bits = 7;
else if (ctrl->nand_version >= 0x0600)
@@ -782,8 +834,10 @@ static inline u32 brcmnand_spare_area_ma
@@ -782,8 +843,10 @@ static inline u32 brcmnand_spare_area_ma
return GENMASK(7, 0);
else if (ctrl->nand_version >= 0x0600)
return GENMASK(6, 0);
@ -118,7 +141,16 @@
}
#define NAND_ACC_CONTROL_ECC_SHIFT 16
@@ -2158,9 +2212,11 @@ static int brcmnand_set_cfg(struct brcmn
@@ -2146,7 +2209,7 @@ static int brcmnand_set_cfg(struct brcmn
(!!(cfg->device_width == 16) << CFG_BUS_WIDTH_SHIFT) |
(device_size << CFG_DEVICE_SIZE_SHIFT);
if (cfg_offs == cfg_ext_offs) {
- tmp |= (page_size << CFG_PAGE_SIZE_SHIFT) |
+ tmp |= (page_size << ctrl->page_size_shift) |
(block_size << CFG_BLK_SIZE_SHIFT);
nand_writereg(ctrl, cfg_offs, tmp);
} else {
@@ -2158,9 +2221,11 @@ static int brcmnand_set_cfg(struct brcmn
tmp = nand_readreg(ctrl, acc_control_offs);
tmp &= ~brcmnand_ecc_level_mask(ctrl);
@ -132,7 +164,7 @@
nand_writereg(ctrl, acc_control_offs, tmp);
brcmnand_set_sector_size_1k(host, cfg->sector_size_1k);
@@ -2524,6 +2580,8 @@ const struct dev_pm_ops brcmnand_pm_ops
@@ -2524,6 +2589,8 @@ const struct dev_pm_ops brcmnand_pm_ops
EXPORT_SYMBOL_GPL(brcmnand_pm_ops);
static const struct of_device_id brcmnand_of_match[] = {