ExternalVendorCode/openwrt
1
0
Fork 0
mirror of https://github.com/openwrt/openwrt.git synced 2024-12-19 05:38:00 +00:00
Code Issues Actions 4 Packages Projects Releases Wiki Activity

mediatek: refresh patches

Browse Source 
The mediatek target requires refreshing after recent additions.

Fixes: cfe8e6e75f ("mediatek: add support for Realtek RTL8261n 10G PHYs")
Fixes: ddfae94a14 ("mediatek: add support for swapping the polarity on usxgmii interfaces")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-11-03 02:38:17 +00:00
parent 591272d197
commit 675d7c8849
2 changed files with 6 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -334,6 +334,8 @@ config REALTEK_PHY
@@ -399,6 +399,8 @@ config REALTEK_PHY
help
Supports the Realtek 821x PHY.
@ -11,11 +11,11 @@
help
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_ADIN_PHY) += adin.o
@@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja
obj-y += qcom/
obj-$(CONFIG_QSEMI_PHY) += qsemi.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
+obj-y += rtl8261n/
obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o
obj-$(CONFIG_SMSC_PHY) += smsc.o
obj-$(CONFIG_RTL8367S_GSW) += rtk/

8
target/linux/mediatek/patches-6.6/736-net-pcs-mtk_usxgmii-add-polarity-control.patch
View File

@ -1,5 +1,3 @@
diff --git a/drivers/net/pcs/pcs-mtk-usxgmii.c b/drivers/net/pcs/pcs-mtk-usxgmii.c
index 9af9035..9caab92 100644
--- a/drivers/net/pcs/pcs-mtk-usxgmii.c
+++ b/drivers/net/pcs/pcs-mtk-usxgmii.c
@@ -52,6 +52,12 @@
@ -23,7 +21,7 @@ index 9af9035..9caab92 100644
unsigned int neg_mode;
struct list_head node;
};
@@ -155,6 +162,10 @@ static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode
@@ -155,6 +162,10 @@ static int mtk_usxgmii_pcs_config(struct
mtk_usxgmii_reset(mpcs);
@ -34,7 +32,7 @@ index 9af9035..9caab92 100644
/* Setup USXGMII AN ctrl */
mtk_m32(mpcs, RG_PCS_AN_CTRL0,
USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE,
@@ -332,6 +343,7 @@ static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = {
@@ -332,6 +343,7 @@ static const struct phylink_pcs_ops mtk_
static int mtk_usxgmii_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@ -42,7 +40,7 @@ index 9af9035..9caab92 100644
struct mtk_usxgmii_pcs *mpcs;
mpcs = devm_kzalloc(dev, sizeof(*mpcs), GFP_KERNEL);
@@ -342,6 +354,13 @@ static int mtk_usxgmii_probe(struct platform_device *pdev)
@@ -342,6 +354,13 @@ static int mtk_usxgmii_probe(struct plat
if (IS_ERR(mpcs->base))
return PTR_ERR(mpcs->base);