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mediatek: refresh patches
The mediatek target requires refreshing after recent additions. Fixes:cfe8e6e75f
("mediatek: add support for Realtek RTL8261n 10G PHYs") Fixes:ddfae94a14
("mediatek: add support for swapping the polarity on usxgmii interfaces") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
parent
591272d197
commit
675d7c8849
@ -1,6 +1,6 @@
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--- a/drivers/net/phy/Kconfig
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--- a/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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@@ -334,6 +334,8 @@ config REALTEK_PHY
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@@ -399,6 +399,8 @@ config REALTEK_PHY
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help
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help
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Supports the Realtek 821x PHY.
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Supports the Realtek 821x PHY.
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@ -11,11 +11,11 @@
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help
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help
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--- a/drivers/net/phy/Makefile
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--- a/drivers/net/phy/Makefile
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+++ b/drivers/net/phy/Makefile
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+++ b/drivers/net/phy/Makefile
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@@ -85,6 +85,7 @@ obj-$(CONFIG_ADIN_PHY) += adin.o
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@@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja
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obj-y += qcom/
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obj-y += qcom/
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obj-$(CONFIG_QSEMI_PHY) += qsemi.o
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obj-$(CONFIG_QSEMI_PHY) += qsemi.o
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obj-$(CONFIG_REALTEK_PHY) += realtek.o
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obj-$(CONFIG_REALTEK_PHY) += realtek.o
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+obj-y += rtl8261n/
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+obj-y += rtl8261n/
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obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
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obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
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obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o
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obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o
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obj-$(CONFIG_SMSC_PHY) += smsc.o
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obj-$(CONFIG_RTL8367S_GSW) += rtk/
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@ -1,5 +1,3 @@
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diff --git a/drivers/net/pcs/pcs-mtk-usxgmii.c b/drivers/net/pcs/pcs-mtk-usxgmii.c
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index 9af9035..9caab92 100644
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--- a/drivers/net/pcs/pcs-mtk-usxgmii.c
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--- a/drivers/net/pcs/pcs-mtk-usxgmii.c
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+++ b/drivers/net/pcs/pcs-mtk-usxgmii.c
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+++ b/drivers/net/pcs/pcs-mtk-usxgmii.c
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@@ -52,6 +52,12 @@
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@@ -52,6 +52,12 @@
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@ -23,7 +21,7 @@ index 9af9035..9caab92 100644
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unsigned int neg_mode;
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unsigned int neg_mode;
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struct list_head node;
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struct list_head node;
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};
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};
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@@ -155,6 +162,10 @@ static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode
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@@ -155,6 +162,10 @@ static int mtk_usxgmii_pcs_config(struct
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mtk_usxgmii_reset(mpcs);
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mtk_usxgmii_reset(mpcs);
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@ -34,7 +32,7 @@ index 9af9035..9caab92 100644
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/* Setup USXGMII AN ctrl */
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/* Setup USXGMII AN ctrl */
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mtk_m32(mpcs, RG_PCS_AN_CTRL0,
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mtk_m32(mpcs, RG_PCS_AN_CTRL0,
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USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE,
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USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE,
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@@ -332,6 +343,7 @@ static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = {
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@@ -332,6 +343,7 @@ static const struct phylink_pcs_ops mtk_
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static int mtk_usxgmii_probe(struct platform_device *pdev)
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static int mtk_usxgmii_probe(struct platform_device *pdev)
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{
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{
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struct device *dev = &pdev->dev;
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struct device *dev = &pdev->dev;
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@ -42,7 +40,7 @@ index 9af9035..9caab92 100644
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struct mtk_usxgmii_pcs *mpcs;
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struct mtk_usxgmii_pcs *mpcs;
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mpcs = devm_kzalloc(dev, sizeof(*mpcs), GFP_KERNEL);
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mpcs = devm_kzalloc(dev, sizeof(*mpcs), GFP_KERNEL);
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@@ -342,6 +354,13 @@ static int mtk_usxgmii_probe(struct platform_device *pdev)
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@@ -342,6 +354,13 @@ static int mtk_usxgmii_probe(struct plat
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if (IS_ERR(mpcs->base))
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if (IS_ERR(mpcs->base))
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return PTR_ERR(mpcs->base);
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return PTR_ERR(mpcs->base);
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