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ramips: mt7620: add ephy-disable option to switch driver

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Add back the register write to disable internal PHYs
as a separate option in the code that can be set using a DTS property.

Set the option to true by default
when an external mt7530 switch is identified.

This makes the driver more in sync with original SDK code
while keeping the lines separated into different options
to accommodate any board with any PHY layout.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit cc6fd6fbb505071e08011f7998afaffefcf08fd3)
This commit is contained in:
Michael Pratt 2021-05-31 03:56:20 -04:00 committed by Petr Štetiar
parent 47db830b82
commit 6685eb29e5
2 changed files with 13 additions and 2 deletions
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14
target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
View File

@ -73,7 +73,13 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw)
/* Enable MIB stats */
mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_MIB_CNT_EN) | (1 << 1), GSW_REG_MIB_CNT_EN);
if (gsw->ephy_base) {
if (gsw->ephy_disable) {
mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_GPC1) |
(gsw->ephy_base << 16) | (0x1f << 24),
GSW_REG_GPC1);
pr_info("gsw: internal ephy disabled\n");
} else if (gsw->ephy_base) {
mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_GPC1) |
(gsw->ephy_base << 16),
GSW_REG_GPC1);
@ -194,13 +200,17 @@ int mtk_gsw_init(struct fe_priv *priv)
gsw = platform_get_drvdata(pdev);
priv->soc->swpriv = gsw;
gsw->ephy_disable = of_property_read_bool(np, "mediatek,ephy-disable");
mdiobus_node = of_get_child_by_name(eth_node, "mdio-bus");
if (mdiobus_node) {
for_each_child_of_node(mdiobus_node, phy_node) {
id = of_get_property(phy_node, "reg", NULL);
if (id && (be32_to_cpu(*id) == 0x1f))
of_node_put(mdiobus_node);
gsw->ephy_disable = true;
}
of_node_put(mdiobus_node);
}
gsw->port4_ephy = !of_property_read_bool(np, "mediatek,port4-gmac");

1
target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.h
View File

@ -92,6 +92,7 @@ struct mt7620_gsw {
struct device *dev;
void __iomem *base;
int irq;
bool ephy_disable;
bool port4_ephy;
unsigned long int autopoll;
u16 ephy_base;