mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
brcm47xx: BCMA - Broadcom 2011 SDK Updates
I noticed these changes when reviewing the 2011 Broadcom SDK. I haven't noticed any obvious changes in behavior with them applied; but thought I should at least pass them on. Signed-off-by: Nathan Hintz <nlhintz@hotmail.com> SVN-Revision: 34670
This commit is contained in:
parent
97d22306da
commit
6672d869da
@ -0,0 +1,50 @@
|
||||
--- a/drivers/bcma/core.c
|
||||
+++ b/drivers/bcma/core.c
|
||||
@@ -43,6 +43,7 @@ int bcma_core_enable(struct bcma_device
|
||||
bcma_aread32(core, BCMA_IOCTL);
|
||||
|
||||
bcma_awrite32(core, BCMA_RESET_CTL, 0);
|
||||
+ bcma_aread32(core, BCMA_RESET_CTL);
|
||||
udelay(1);
|
||||
|
||||
bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -179,6 +179,8 @@ struct pci_dev;
|
||||
#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */
|
||||
#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */
|
||||
|
||||
+#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
--- a/drivers/bcma/driver_pci_host.c
|
||||
+++ b/drivers/bcma/driver_pci_host.c
|
||||
@@ -430,7 +430,7 @@ void __devinit bcma_core_pci_hostmode_in
|
||||
/* Reset RC */
|
||||
usleep_range(3000, 5000);
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE);
|
||||
- usleep_range(1000, 2000);
|
||||
+ msleep(50);
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST |
|
||||
BCMA_CORE_PCI_CTL_RST_OE);
|
||||
|
||||
@@ -492,6 +492,17 @@ void __devinit bcma_core_pci_hostmode_in
|
||||
|
||||
bcma_core_pci_enable_crs(pc);
|
||||
|
||||
+ if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706 ||
|
||||
+ bus->chipinfo.id == BCMA_CHIP_ID_BCM4716) {
|
||||
+ u16 val16;
|
||||
+ bcma_extpci_read_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
|
||||
+ &val16, sizeof(val16));
|
||||
+ val16 |= (2 << 5); /* Max payload size of 512 */
|
||||
+ val16 |= (2 << 12); /* MRRS 512 */
|
||||
+ bcma_extpci_write_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
|
||||
+ &val16, sizeof(val16));
|
||||
+ }
|
||||
+
|
||||
/* Enable PCI bridge BAR0 memory & master access */
|
||||
tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
|
||||
bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp));
|
Loading…
Reference in New Issue
Block a user