ath79: correct various phy-mode properties

Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.

Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.

Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.

Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.

Signed-off-by: David Bauer <mail@david-bauer.net>

target/linux/ath79/dts/ar9344_ocedo_raccoon.dts

@@ -162,7 +162,6 @@
 
 	phy0: ethernet-phy@0 {
 		reg = <0>;
-		phy-mode = "rgmii";
 	};
 };
 
@@ -173,6 +172,6 @@
 
 	mtd-mac-address = <&art 0x0>;
 
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	phy-handle = <&phy0>;
 };

target/linux/ath79/dts/qca9558_devolo_dvl1200i.dts

@@ -40,6 +40,7 @@
 
 &eth0 {
 	pll-data = <0xbe000000 0x80000101 0x80001313>;
+	phy-mode = "rgmii-id";
 };
 
 &gmac_config {

target/linux/ath79/dts/qca9558_devolo_dvl1750c.dts

@@ -38,6 +38,10 @@
 	};
 };
 
+&eth0 {
+	phy-mode = "rgmii-id";
+};
+
 &gmac_config {
 	rxdv-delay = <3>;
 	rxd-delay = <3>;

target/linux/ath79/dts/qca9558_devolo_dvl1750i.dts

@@ -40,6 +40,7 @@
 
 &eth0 {
 	pll-data = <0xbe000000 0x80000101 0x80001313>;
+	phy-mode = "rgmii-id";
 };
 
 &gmac_config {

target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi

@@ -115,6 +115,7 @@
 
 	mtd-mac-address = <&art 0x00>;
 	phy-handle = <&phy4>;
+	phy-mode = "rgmii-rxid";
 	pll-data = <0xae000000 0x80000101 0x80001313>;
 
 	gmac_config: gmac-config {

target/linux/ath79/dts/qca9558_ocedo_koala.dts

@@ -142,8 +142,6 @@
 
 	phy5: ethernet-phy@5 {
 		reg = <5>;
-		phy-mode = "rgmii-rxid";
-
 		at803x-disable-smarteee;
 	};
 };