mirror of
https://github.com/openwrt/openwrt.git
synced 2025-04-21 01:22:33 +00:00
mediatek: mt7981: remove inaccurate compatible strings
Remove more inaccurate compatible strings from various clock controllers of the MT7981 SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
parent
7af3b202d4
commit
6077fa2f61
@ -235,7 +235,7 @@
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@1001E000 {
|
||||
compatible = "mediatek,mt7981-apmixedsys", "mediatek,mt7986-apmixedsys", "syscon";
|
||||
compatible = "mediatek,mt7981-apmixedsys", "syscon";
|
||||
reg = <0 0x1001E000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
@ -567,14 +567,14 @@
|
||||
};
|
||||
|
||||
sgmiisys0: syscon@10060000 {
|
||||
compatible = "mediatek,mt7981-sgmiisys_0", "mediatek,mt7986-sgmiisys_0", "syscon";
|
||||
compatible = "mediatek,mt7981-sgmiisys_0", "syscon";
|
||||
reg = <0 0x10060000 0 0x1000>;
|
||||
mediatek,pnswap;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
sgmiisys1: syscon@10070000 {
|
||||
compatible = "mediatek,mt7981-sgmiisys_1", "mediatek,mt7986-sgmiisys_1", "syscon";
|
||||
compatible = "mediatek,mt7981-sgmiisys_1", "syscon";
|
||||
reg = <0 0x10070000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
Loading…
x
Reference in New Issue
Block a user