lantiq: kernel 4.14: copy patches, config and dts files

This just copies the patches, configuration and dts files into the
directories hich are used for kernel 4.14.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

target/linux/lantiq/ase/config-4.14

@@ -0,0 +1,25 @@
+CONFIG_ADM6996_PHY=y
+CONFIG_CPU_MIPS32_R1=y
+# CONFIG_CPU_MIPS32_R2 is not set
+CONFIG_CPU_MIPSR1=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_FIRMWARE_MEMMAP=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_ISDN is not set
+# CONFIG_LBDAF is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_MIPS_FPU_EMULATOR=y
+CONFIG_NLS=y
+# CONFIG_PSB6970_PHY is not set
+# CONFIG_RTL8366_SMI is not set
+CONFIG_SOC_AMAZON_SE=y
+# CONFIG_SOC_XWAY is not set
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_EHCI_HCD is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y

target/linux/lantiq/config-4.14

@@ -0,0 +1,199 @@
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
+CONFIG_ARCH_HAS_RESET_CONTROLLER=y
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_RIXI=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CPU_SUPPORTS_MSA=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DTC=y
+# CONFIG_DT_EASY50712 is not set
+CONFIG_EARLY_PRINTK=y
+CONFIG_ETHERNET_PACKET_MANGLE=y
+CONFIG_FIXED_PHY=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_MM_LANTIQ=y
+CONFIG_GPIO_STP_XWAY=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+# CONFIG_HAVE_ARCH_BITREVERSE is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_KVM=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_MIPS_CPU=y
+CONFIG_IRQ_WORK=y
+CONFIG_LANTIQ=y
+CONFIG_LANTIQ_DT_NONE=y
+CONFIG_LANTIQ_ETOP=y
+CONFIG_LANTIQ_WDT=y
+# CONFIG_LANTIQ_XRX200 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LIBFDT=y
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIPS=y
+CONFIG_MIPS_ASID_BITS=8
+CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CLOCK_VSYSCALL=y
+# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
+# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
+CONFIG_MIPS_CMDLINE_FROM_DTB=y
+# CONFIG_MIPS_ELF_APPENDED_DTB is not set
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_RAW_APPENDED_DTB=y
+CONFIG_MIPS_SPRAM=y
+# CONFIG_MIPS_VPE_LOADER is not set
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_LANTIQ=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
+CONFIG_MTD_SPLIT_EVA_FW=y
+CONFIG_MTD_SPLIT_FIRMWARE=y
+CONFIG_MTD_SPLIT_TPLINK_FW=y
+CONFIG_MTD_SPLIT_UIMAGE_FW=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_LANTIQ=y
+# CONFIG_PINCTRL_SINGLE is not set
+CONFIG_PINCTRL_XWAY=y
+CONFIG_PSB6970_PHY=y
+# CONFIG_RCU_STALL_COMMON is not set
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RTL8366RB_PHY=y
+CONFIG_RTL8366_SMI=y
+# CONFIG_SCHED_INFO is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SENSORS_LTQ_CPUTEMP is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_LANTIQ=y
+# CONFIG_SOC_AMAZON_SE is not set
+# CONFIG_SOC_FALCON is not set
+CONFIG_SOC_TYPE_XWAY=y
+CONFIG_SOC_XWAY=y
+CONFIG_SPI=y
+CONFIG_SPI_LANTIQ_SSC=y
+CONFIG_SPI_MASTER=y
+CONFIG_SRCU=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_SYS_SUPPORTS_MULTITHREADING=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_USE_OF=y
+# CONFIG_XRX200_PHY_FW is not set

target/linux/lantiq/falcon/config-4.14

@@ -0,0 +1,10 @@
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_SPLIT_FIRMWARE_NAME="linux"
+CONFIG_PINCTRL_FALCON=y
+# CONFIG_PSB6970_PHY is not set
+# CONFIG_RTL8366_SMI is not set
+CONFIG_SOC_FALCON=y
+# CONFIG_SOC_TYPE_XWAY is not set
+# CONFIG_SOC_XWAY is not set
+CONFIG_SPI_FALCON=y

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ACMP252.dts

@@ -0,0 +1,102 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+/ {
+	compatible = "audiocodes,mp-252", "lantiq,xway", "lantiq,danube";
+	model = "AudioCodes MediaPack MP-252";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "uboot_env";
+						reg = <0x20000 0x20000>;
+					};
+
+					partition@40000 {
+						label = "boardconfig";
+						reg = <0x40000 0x60000>;
+						read-only;
+					};
+
+					partition@a0000 {
+						label = "firmware";
+						reg = <0xa0000 0xf20000>;
+					};
+
+					partition@fc0000 {
+						label = "sysconfig";
+						reg = <0xfc0000 0x40000>;
+					};
+
+					partition@0x1000000 {
+						label = "rootfs_data";
+						reg = <0x1000000 0x1000000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1", "req1";
+					lantiq,function = "pci";
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		pci@E105400 {
+			status = "okay";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ALL0333CJ.dts

@@ -0,0 +1,120 @@
+/dts-v1/;
+
+#include "amazonse.dtsi"
+
+/ {
+	compatible = "allnet,all0333cj", "lantiq,xway", "lantiq,ase";
+	model = "Allnet ALL0333CJ DSL Modem";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+
+		aliases {
+			led-boot = &power;
+			led-failsafe = &power;
+			led-running = &power;
+
+			led-dsl = &dsl;
+			led-internet = &online_green;
+		};
+
+	};
+
+	memory@0 {
+		reg = <0x0 0x1000000>;
+	};
+
+	fpi@b0000000 {
+		etop@E180000 {
+			phy-mode = "mii";
+		};
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				asc {
+					lantiq,groups = "asc";
+					lantiq,function = "asc";
+				};
+				keys_in {
+					lantiq,pins = "io0",/* "io25", */"io29";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <1>;
+				};
+			};
+		};
+
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x400000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "firmware";
+						reg = <0x10000 0x3ef200>;
+					};
+
+					partition@3ff200 {
+						label = "uboot_env";
+						reg = <0x3ff200 0xc00>;
+						read-only;
+					};
+
+					partition@3ffe00 {
+						label = "dummy_bits";
+						reg = <0x3ffe00 0x200>;
+						read-only;
+					};
+				};
+			};
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		/* power led: red=off, green=on */
+		power: power {
+			label = "all0333cj:green:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+
+		lan: lan {
+			label = "all0333cj:green:lan";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+
+		dsl: dsl {
+			label = "all0333cj:green:dsl";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+		};
+
+		online_green: online {
+			label = "all0333cj:green:online";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+		online_red {
+			label = "all0333cj:red:online";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4510PW.dts

@@ -0,0 +1,232 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv4510pw", "lantiq,xway", "lantiq,danube";
+	model = "Wippies, Elisa";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power2;
+		led-running = &power;
+
+		led-dsl = &adsl;
+		led-internet = &internet;
+		led-usb = &usb;
+		led-usb2 = &usb2;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x1000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				lantiq,noxip;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x20000>;
+						read-only;
+					};
+
+					partition@60000 {
+						label = "firmware";
+						reg = <0x60000 0xfa0000>;
+					};
+				};
+			};
+		};
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu a23";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				exin {
+					lantiq,groups = "exin1", "exin2";
+					lantiq,function = "exin";
+					lantiq,output = <0>;
+				};
+				pci_in {
+					lantiq,groups = "req1", "req2";
+					lantiq,function = "pci";
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1", "gnt2";
+					lantiq,function = "pci";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				buttons {
+					lantiq,pins = "io3", "io14";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+			};
+		};
+
+		gpios: stp@E100BB0 {
+			status = "okay";
+			lantiq,groups = <0x7>;
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		pci@E105400 {
+			status = "okay";
+			lantiq,external-clock;
+			interrupt-map = <
+				0x6000 0 0 1 &icu0 135
+				0x7800 0 0 1 &icu0 66
+				0x7800 0 0 2 &icu0 66
+				0x7800 0 0 3 &icu0 66
+			>;
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+			req-mask = <0x7>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "power";
+			gpios = <&gpios 21 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		power2: power2 {
+			label = "power2";
+			gpios = <&gpios 20 GPIO_ACTIVE_HIGH>;
+		};
+		lan1 {
+			label = "lan1";
+			gpios = <&gpios 19 GPIO_ACTIVE_HIGH>;
+		};
+		lan2 {
+			label = "lan2";
+			gpios = <&gpios 18 GPIO_ACTIVE_HIGH>;
+		};
+		lan3 {
+			label = "lan3";
+			gpios = <&gpios 17 GPIO_ACTIVE_HIGH>;
+		};
+		lan4 {
+			label = "lan4";
+			gpios = <&gpios 16 GPIO_ACTIVE_HIGH>;
+		};
+		wifi: wifi {
+			label = "wifi";
+			gpios = <&gpios 15 GPIO_ACTIVE_HIGH>;
+		};
+		adsl: adsl {
+			label = "adsl";
+			gpios = <&gpios 14 GPIO_ACTIVE_HIGH>;
+		};
+		internet: internet {
+			label = "internet";
+			gpios = <&gpios 13 GPIO_ACTIVE_HIGH>;
+		};
+		internet2 {
+			label = "internet2";
+			gpios = <&gpios 12 GPIO_ACTIVE_HIGH>;
+		};
+		voip {
+			label = "voip";
+			gpios = <&gpios 11 GPIO_ACTIVE_HIGH>;
+		};
+		phone {
+			label = "phone";
+			gpios = <&gpios 10 GPIO_ACTIVE_HIGH>;
+		};
+		phone2 {
+			label = "phone2";
+			gpios = <&gpios 9 GPIO_ACTIVE_HIGH>;
+		};
+		usb: usb {
+			label = "usb";
+			gpios = <&gpios 8 GPIO_ACTIVE_HIGH>;
+		};
+		usb2: usb2 {
+			label = "usb2";
+			gpios = <&gpios 7 GPIO_ACTIVE_HIGH>;
+		};
+		usb3 {
+			label = "usb3";
+			gpios = <&gpios 6 GPIO_ACTIVE_HIGH>;
+		};
+		unlabeled {
+			label = "unlabeled";
+			gpios = <&gpios 5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dts

@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "ARV4518PWR01.dtsi"
+
+/ {
+	compatible = "arcadyan,arv4518pwr01", "lantiq,xway", "lantiq,danube";
+	model = "SMC7908A-ISP";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dtsi

@@ -0,0 +1,198 @@
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+
+		led-dsl = &dsl;
+		led-internet = &online;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>; /* 64 KB */
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>; /* 64 KB */
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					boardconfig: partition@400000 {
+						label = "boardconfig";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x0>;
+			};
+
+			ath5k_eep {
+				compatible = "ath5k,eeprom";
+				ath,eep-flash = <&boardconfig 0x400>;
+				ath,mac-offset = <0x16>;
+				ath,mac-increment = <1>;
+				ath,eep-swap;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				pci_in {
+					lantiq,groups = "req1", "req2";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1", "gnt2";
+					lantiq,function = "pci";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+			req-mask = <0xf>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "power";
+			gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		dsl: dsl {
+			label = "dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		online: online {
+			label = "online";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "wifi";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		dsl2 {
+			label = "dsl2";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "usb";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "voice";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "fxs1";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "fxs2";
+			gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "fxo";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01A.dts

@@ -0,0 +1,14 @@
+/dts-v1/;
+
+#include "ARV4518PWR01.dtsi"
+
+/ {
+	compatible = "arcadyan,arv4518pwr01a", "lantiq,xway", "lantiq,danube";
+	model = "SMC7908A-ISP, Airties WAV-221";
+
+	fpi@10000000 {
+		pci@E105400 {
+			lantiq,external-clock;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4519PW.dts

@@ -0,0 +1,195 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv4519pw", "lantiq,xway", "lantiq,danube";
+	model = "Vodafone Netfaster IAD 2, Pirelli P.RG A4201G";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &internet_green;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					boardconfig: partition@3f0000 {
+						label = "boardconfig";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x400>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			lantiq,external-clock;
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+			req-mask = <0xf>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "arv4519pw:green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "arv4519pw:red:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv4519pw:green:wlan";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "arv4519pw:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		internet_green: online {
+			label = "arv4519pw:green:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		online2 {
+			label = "arv4519pw:red:internet";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "arv4519pw:green:usb";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+		voip {
+			label = "arv4519pw:green:voip";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "arv4519pw:green:phone1";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv4519pw:green:phone2";
+			gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "arv4519pw:green:line";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		wps2 {
+			label = "arv4519pw:green:wps";
+			gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "arv4519pw:orange:wps";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		wps3 {
+			label = "arv4519pw:red:wps";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4520PW.dts

@@ -0,0 +1,221 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv4520pw", "lantiq,xway", "lantiq,danube";
+	model = "Easybox 800, WAV-281";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_blue;
+		led-failsafe = &power_red;
+		led-running = &power_blue;
+
+		led-dsl = &dsl;
+		led-internet = &internet_blue;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH
+				&gpiomm 7 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "uboot_env";
+						reg = <0x20000 0x10000>;
+						read-only;
+					};
+
+					partition@30000 {
+						label = "firmware";
+						reg = <0x30000 0x3c0000>;
+					};
+
+					boardconfig: partition@7f0000 {
+						label = "boardconfig";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x400>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			lantiq,external-clock;
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+// gpiomm 10 - switch
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "wps";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_blue: power {
+			label = "arv4520pw:blue:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		dsl: dsl {
+			label = "arv4520pw:blue:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		internet_blue: internet {
+			label = "arv4520pw:blue:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power2 {
+			label = "arv4520pw:red:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "arv4520pw:yellow:wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		wps2 {
+			label = "arv4520pw:red:wps";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+		/*
+			wps green is missing
+		*/
+		fxs1 {
+			label = "arv4520pw:blue:telefon1";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv4520pw:blue:telefon2";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>;
+		};
+		isdn {
+			label = "arv4520pw:blue:isdn";
+			gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "arv4520pw:blue:line";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "arv4520pw:blue:sprache";
+			gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "arv4520pw:blue:usb";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv4520pw:blue:wifi";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+		internet2 {
+			label = "arv4520pw:red:internet";
+			gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>;
+		};
+		/*
+			info is missing
+		*/
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4525PW.dts

@@ -0,0 +1,169 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv4525pw", "lantiq,xway", "lantiq,danube";
+	model = "Speedport W501V Typ A";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		/* we dont have a power led, lets use the online led */
+		led-boot = &online;
+		led-failsafe = &online;
+
+		led-dsl = &dsl;
+		led-internet = &online;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					boardconfig: partition@400000 {
+						label = "boardconfig";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			ath5k_eep {
+				compatible = "ath5k,eeprom";
+				ath,eep-flash = <&boardconfig 0x400>;
+				ath,mac-offset = <0x0>;
+				ath,eep-swap;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				relay {
+					lantiq,pins = "io31";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+/*
+#define ARV4525PW_PHYRESET	13
+#define ARV4525PW_RELAY		31
+*/
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		fxo {
+			label = "arv4525pw:green:festnetz";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		fxs {
+			label = "arv4525pw:green:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "arv4525pw:green:t-dsl";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv4525pw:green:wlan";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		online: online {
+			label = "arv4525pw:green:online";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV452CQW.dts

@@ -0,0 +1,237 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv452cqw", "lantiq,xway", "lantiq,danube";
+	model = "Arcor 801";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_blue;
+		led-failsafe = &power_red;
+		led-running = &power_blue;
+
+		led-dsl = &dsl_blue;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH
+				&gpiomm 7 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x400000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					boardconfig: partition@3f0000 {
+						label = "boardconfig";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			ath5k_eep {
+				compatible = "ath5k,eeprom";
+				ath,eep-flash = <&boardconfig 0x400>;
+				ath,mac-offset = <0x0>;
+				ath,eep-swap;
+			};
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x77f>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				leds {
+					lantiq,pins = "io3", "io5", "io6", "io7", "io9";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			lantiq,external-clock;
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+/*
+#define ARV452CPW_SWITCH_RESET          110
+*/
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power_blue: power0 {
+			label = "arv452cqw:blue:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		dsl_blue: dsl {
+			label = "arv452cqw:blue:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		isdn {
+			label = "arv452cqw:blue:isdn";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power1 {
+			label = "arv452cqw:red:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "arv452cqw:blue:wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		wps1 {
+			label = "arv452cqw:yellow:wps";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "arv452cqw:blue:telefon1";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv452cqw:blue:telefon2";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>;
+		};
+		wps2 {
+			label = "arv452cqw:red:wps";
+			gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "arv452cqw:blue:line";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "arv452cqw:blue:sprache";
+			gpios = <&gpiomm 4 1>;
+		};
+		usb: usb {
+			label = "arv452cqw:blue:usb";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv452cqw:blue:wlan";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+		/*
+			internet blue and internet red are missing
+			dsl2 and dsl3 are not referenced in manual
+		*/
+		dsl2 {
+			label = "arv452cqw:yellow:dsl";
+			gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>;
+		};
+		dsl3 {
+			label = "arv452cqw:red:dsl";
+			gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7506PW11.dts

@@ -0,0 +1,165 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7506pw11", "lantiq,xway", "lantiq,danube";
+	model = "Alice/O2 IAD 4421";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power_red;
+		led-running = &power;
+
+		led-dsl = &dsl;
+		led-internet = &internet;
+		led-wifi = &wlan;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x10000>;
+						read-only;
+					};
+
+					partition@50000 {
+						label = "firmware";
+						reg = <0x50000 0x7a0000>;
+					};
+
+					boardconfig: partition@7f0000 {
+						label = "board_config";
+						reg = <0x7f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				pci {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		/* GPIO 19: switch reset */
+		etop@E180000 {
+			phy-mode = "rmii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		wlan: wlan {
+			label = "arv7506pw11:green:wlan";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+		power: power {
+			label = "arv7506pw11:green:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		dsl: dsl {
+			label = "arv7506pw11:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		internet: internet {
+			label = "arv7506pw11:green:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power_red {
+			label = "arv7506pw11:red:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		internet_red {
+			label = "arv7506pw11:red:internet";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		info {
+			label = "arv7506pw11:green:info";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		telefon {
+			label = "arv7506pw11:green:telefon";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+		info_red {
+			label = "arv7506pw11:red:info";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	lantiq,external-clock;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@1814,3592 {
+		compatible = "pci1814,3592";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <1>;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7510PW22.dts

@@ -0,0 +1,196 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7510pw22", "lantiq,xway", "lantiq,danube";
+	model = "Astoria Networks ARV7510PW22";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+
+		led-dsl = &internet;
+		led-usb = &umts;
+		led-wifi = &wlan;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x1000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x20000>;
+						read-only;
+					};
+
+					partition@60000 {
+						label = "firmware";
+						reg = <0x60000 0xf80000>;
+					};
+
+					boardconfig: partition@fe0000 {
+						label = "board_config";
+						reg = <0xfe0000 0x20000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_in {
+					lantiq,groups = "req1", "req2";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				pins_out {
+					lantiq,pins = "io2", "io4", "io8", "io9", "io10", "io15", "io20";
+					lantiq,output = <1>;
+				};
+				pins_in {
+					lantiq,pins = "io11", "io12", "io28";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		etop@E180000 {
+			/* Switch reset 19 */
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		internet: internet {
+			label = "internet";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		wlan: wlan {
+			label = "wlan";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+		umts: 3g {
+			label = "3g";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+		message {
+			label = "message";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	lantiq,external-clock;
+	interrupt-map = <
+		0x7000 0 0 1 &icu0 30
+		0x7800 0 0 1 &icu0 135
+		0x7800 0 0 2 &icu0 135
+		0x7800 0 0 3 &icu0 135
+	>;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	req-mask = <0x3>;
+
+	wifi@1814,3592 {
+		compatible = "pci1814,3592";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7518PW.dts

@@ -0,0 +1,232 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7518pw", "lantiq,xway", "lantiq,danube";
+	model = "Astoria Networks ARV7518PW";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &online_green;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x7d0000>;
+					};
+
+					boardconfig: partition@400000 {
+						label = "boardconfig";
+						reg = <0x7f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x0>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				leds {
+					lantiq,pins = "io2", "io4", "io5", "io6", "io7", "io8", "io19";
+					lantiq,output = <1>;
+				};
+				keys {
+					lantiq,pins = "io28", "io30";
+					lantiq,output = <0>;
+					lantiq,pull = <2>;
+					lantiq,open-drain = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+/*
+#define SWITCH_RESET          13
+*/
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power_green: power {
+			label = "arv7518pw:green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		dsl: dsl {
+			label = "arv7518pw:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		online_green: online {
+			label = "arv7518pw:green:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv7518pw:green:wlan";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power2 {
+			label = "arv7518pw:red:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		online2 {
+			label = "arv7518pw:red:internet";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "arv7518pw:green:usb";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "arv7518pw:green:voip";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "arv7518pw:green:phone1";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv7518pw:green:phone2";
+			gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>;
+		};
+		unlabeled {
+			label = "arv7518pw:amber:unlabeled";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "arv7518pw:amber:wps";
+			gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>;
+		};
+		wps2 {
+			label = "arv7518pw:green:wps";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		wps3 {
+			label = "arv7518pw:red:wps";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	lantiq,external-clock;
+	req-mask = <0xf>;
+
+	wifi@168c,0029 {
+		compatible = "pci168c,0029";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <1>;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519PW.dts

@@ -0,0 +1,229 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7519pw", "lantiq,xway", "lantiq,danube";
+	model = "Astoria Networks ARV7519PW";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power2;
+		led-running = &power;
+
+		led-dsl = &dsl;
+		led-internet = &online;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x20000>;
+					};
+
+					partition@60000 {
+						label = "firmware";
+						reg = <0x60000 0xf80000>;
+					};
+
+					boardconfig: partition@fe0000 {
+						label = "board_config";
+						reg = <0xfe0000 0x20000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				switch_rst {
+					lantiq,pins = "io19";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+
+		/* warning: passive port
+		only works with active devices */
+		ifxhcd@E101000 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power2: power2 {
+			label = "power2";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+		online: online {
+			label = "online";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+		online2 {
+			label = "online2";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "wifi";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+		wifi2 {
+			label = "wifi2";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+		wifi3 {
+			label = "wifi3";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "voice";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+		wps2 {
+			label = "wps2";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+		wps3 {
+			label = "wps3";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		lan {
+			label = "lan";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+		};
+		tv {
+			label = "tv";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+		upgrade {
+			label = "upgrade";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	/* is there another way to "reserve" the GPIO? */
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		switch {
+			gpio-export,name = "switch";
+			gpio-export,output = <1>;
+			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	lantiq,external-clock;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	req-mask = <0xf>;
+
+	wifi@0,0 {
+		compatible = "pci0,0";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519RW22.dts

@@ -0,0 +1,231 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7519rw22", "lantiq,xway", "lantiq,vr9";
+	model = "Orange Livebox 2.1";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_green;
+		led-running = &power_green;
+
+		led-dsl = &internet_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x60000>;
+						read-only;
+					};
+
+					partition@60000 {
+						label = "uboot-env";
+						reg = <0x60000 0x20000>;
+						read-only;
+					};
+
+					partition@80000 {
+						label = "firmware";
+						reg = <0x80000 0x1f00000>;
+					};
+
+					boardconfig: partition@1f80000 {
+						label = "boardconfig";
+						reg = <0x1f80000 0x80000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				pcie-rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+		};
+
+		pcie@d900000 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy22f_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy22f_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		lan_green {
+			label = "arv7519rw22:green:lan";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+		internet_red {
+			label = "arv7519rw22:red:internet";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power_green {
+			label = "arv7519rw22:green:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		alarm_blue {
+			label = "arv7519rw22:blue:alarm";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+		internet_orange {
+			label = "arv7519rw22:orange:internet";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+		internet_green: internet_green {
+			label = "arv7519rw22:green:internet";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+		};
+		voice_green {
+			label = "arv7519rw22:green:voice";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&boardconfig 0x16>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "mii";
+			phy-handle = <&phy14>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "mii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <3>;
+			phy-mode = "mii";
+			phy-handle = <&phy12>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy12: ethernet-phy@12 {
+			reg = <0x12>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy14: ethernet-phy@14 {
+			reg = <0x14>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7525PW.dts

@@ -0,0 +1,155 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv7525pw", "lantiq,xway", "lantiq,danube";
+	model = "Speedport W303V Typ A";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &power_green;
+		led-internet = &online;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					boardconfig: partition@400000 {
+						label = "board_config";
+						reg = <0x3f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1", "req1";
+					lantiq,function = "pci";
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power_green: power {
+			label = "arv7525pw:green:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power1 {
+			label = "arv7525pw:red:power";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		online: online {
+			label = "arv7525pw:green:online";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "arv7525pw:green:telefonie";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		voice2 {
+			label = "arv7525pw:red:telefonie";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv7525pw:green:wlan";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	interrupt-map = <0x7000 0 0 1 &icu0 135 1>;
+
+	wifi@0,0 {
+		compatible = "pci0,0";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW.dts

@@ -0,0 +1,238 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv752dpw", "lantiq,xway", "lantiq,danube";
+	model = "Arcor 802";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_red;
+		led-failsafe = &power_blue;
+		led-running = &power_red;
+
+		led-dsl = &internet_red;
+		led-usb = &umts;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x7d0000>;
+					};
+
+					boardconfig: partition@7f0000 {
+						label = "board_config";
+						reg = <0x7f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x3>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_in {
+					lantiq,groups = "req2", "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				leds {
+					lantiq,pins = "io3", "io5", "io6", "io8";
+					lantiq,output = <1>;
+					lantiq,pull = <0>;
+				};
+				keys {
+					lantiq,pins = "io11", "io12", "io13", "io28";
+					lantiq,output = <0>;
+					lantiq,pull = <2>;
+					lantiq,open-drain = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+		dsl {
+			label = "dsl";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power_blue: power1 {
+			label = "arv752dpw:blue:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+		internet_red: internet {
+			label = "arv752dpw:red:internet";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		message {
+			label = "arv752dpw:red:message";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power {
+			label = "arv752dpw:red:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		voice1 {
+			label = "arv752dpw:red:voice";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		umts: umts {
+			label = "arv752dpw:red:umts";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv752dpw:red:wifi";
+			gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "arv752dpw:green:tae-n";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv752dpw:green:tae-u";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "arv752dpw:green:isdn";
+			gpios = <&gpiomm 7 GPIO_ACTIVE_LOW>;
+		};
+		internet2 {
+			label = "arv752dpw:blue:internet";
+			gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>;
+		};
+		voice2 {
+			label = "arv752dpw:blue:voice";
+			gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	lantiq,external-clock;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	interrupt-map = <0x7000 0 0 1 &icu0 135>;
+	req-mask = <0x3>;
+
+	wifi@1814,0601 {
+		compatible = "pci1814,0601";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW22.dts

@@ -0,0 +1,259 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv752dpw22", "lantiq,xway", "lantiq,danube";
+	model = "Arcor 803";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_red;
+		led-failsafe = &power_blue;
+		led-running = &power_red;
+
+		led-dsl = &internet_red;
+		led-usb = &umts;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x30000>;
+						read-only;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x30000 0x10000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x40000 0x7b0000>;
+					};
+
+					boardconfig: partition@7f0000 {
+						label = "board_config";
+						reg = <0x7f0000 0x10000>;
+						read-only;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <3>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				ebu {
+					lantiq,groups = "ebu cs1";
+					lantiq,function = "ebu";
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,open-drain = <1>;
+					lantiq,output = <1>;
+				};
+				leds {
+					lantiq,pins = "io3", "io5", "io6", "io8";
+					lantiq,open-drain = <1>;
+					lantiq,output = <1>;
+				};
+				buttons {
+					lantiq,pins = "io11", "io12", "io13", "io28";
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpiomm 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&boardconfig 0x16>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+		dsl {
+			label = "dsl";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power_blue: power1 {
+			label = "arv752dpw22:blue:power";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+		internet_red: internet {
+			label = "arv752dpw22:red:internet";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		message {
+			label = "arv752dpw22:red:message";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power {
+			label = "arv752dpw22:red:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		voice1 {
+			label = "arv752dpw22:red:voice";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		umts: umts {
+			label = "arv752dpw22:red:umts";
+			gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "arv752dpw22:red:wifi";
+			gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>;
+		};
+		fxs1 {
+			label = "arv752dpw22:green:tae-n";
+			gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>;
+		};
+		fxs2 {
+			label = "arv752dpw22:green:tae-u";
+			gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>;
+		};
+		fxo {
+			label = "arv752dpw22:green:isdn";
+			gpios = <&gpiomm 7 GPIO_ACTIVE_LOW>;
+		};
+		internet2 {
+			label = "arv752dpw22:blue:internet";
+			gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>;
+		};
+		voice2 {
+			label = "arv752dpw22:blue:voice";
+			gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>;
+		};
+		eth1 {
+			 label = "arv752dpw22:green:lan1";
+			 gpios = <&gpiomm 11 GPIO_ACTIVE_LOW>;
+		};
+		eth2 {
+			label = "arv752dpw22:green:lan2";
+			gpios = <&gpiomm 12 GPIO_ACTIVE_LOW>;
+		};
+		eth3 {
+			label = "arv752dpw22:green:lan3";
+			gpios = <&gpiomm 13 GPIO_ACTIVE_LOW>;
+		};
+		eth4 {
+			label = "arv752dpw22:green:lan4";
+			gpios = <&gpiomm 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	lantiq,external-clock;
+	interrupt-map = <
+		0x7000 0 0 1 &icu0 30
+		0x7800 0 0 1 &icu0 135
+		0x7800 0 0 2 &icu0 135
+		0x7800 0 0 3 &icu0 135
+	>;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	req-mask = <0x3>;
+
+	wifi@1814,3592 {
+		compatible = "pci1814,3592";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+		mtd-mac-address = <&boardconfig 0x16>;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV8539PW22.dts

@@ -0,0 +1,180 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,arv8539pw22", "lantiq,xway", "lantiq,danube";
+	model = "Speedport W 504V Typ A";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl_green;
+		led-internet = &online_green;
+		led-wifi = &wireless_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x30000>;	/* 192 KiB */
+						read-only;
+					};
+
+					partition@30000 {
+						label = "uboot";
+						reg = <0x30000 0x10000>;	/* 64 KiB */
+						read-only;
+					};
+
+					partition@40000 {
+						label = "firmware";
+						reg = <0x40000 0x7B0000>;       /* 7872 KiB */
+					};
+
+					art: partition@7F0000 {
+						label = "art";
+						reg = <0x7F0000 0x10000>;       /* 64 KiB*/
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+					lantiq,output = <0>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				relay {
+					lantiq,pins = "io31";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&art 0x16>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wlan {
+			label = "wlan";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		/* key DECT is missing */
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power-green {
+			label = "arv8539pw22:green:power";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power-red {
+			label = "arv8539pw22:red:power";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		dsl_green: dsl-green {
+			label = "arv8539pw22:green:dsl";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		online_green: online-green {
+			label = "arv8539pw22:green:online";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		wireless_green: wireless-green {
+			label = "arv8539pw22:green:wlan";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+		/*
+			telefonie green is missing
+		*/
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@168c,0029 {
+		compatible = "pci168c,0029";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+		mtd-mac-address = <&art 0x16>;
+		mtd-mac-address-increment = <1>;
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ASL56026.dts

@@ -0,0 +1,171 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "alphanetworks,asl56026", "lantiq,xway", "lantiq,vr9";
+	model = "BT OpenReach VDSL Modem";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x0800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x30000>;
+					};
+
+					partition@30000 {
+						label = "uboot_env";
+						reg = <0x30000 0x10000>;
+					};
+
+					partition@40000 {
+						label = "firmware";
+						reg = <0x40000 0x750000>;
+					};
+
+					partition@790000 {
+						label = "ddrconfig";
+						reg = <0x790000 0x70000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+			};
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy22f_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy22f_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl: dsl {
+			label = "asl56026:green:dsl";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		/* power-* is a bicolour led */
+		power_green: power_green {
+			label = "asl56026:green:power";
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+
+		power_red: power_red {
+			label = "asl56026:red:power";
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		power_led_blink {
+			gpio-export,name = "power_led_blink";
+			gpio-export,output = <0>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		lantiq,switch;
+
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "mii";
+			phy-handle = <&phy11>;
+		};
+
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <3>;
+			phy-mode = "mii";
+			phy-handle = <&phy14>;
+		};
+
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+
+		phy14: ethernet-phy@14 {
+			reg = <0x14>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV2B.dts

@@ -0,0 +1,262 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "bt,homehub-v2b", "lantiq,xway", "lantiq,danube";
+	model = "BT Home Hub 2B";  /* SoC: Lantiq Danube-S PSB 50712 @ 333MHz V1.3/1.5 */
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_orange;
+		led-failsafe = &power_red;
+		led-running = &power_blue;
+
+		led-dsl = &broadband_blue;
+		led-wifi = &wireless_blue;
+	};
+
+	memory@0 {				  /* RAM: Samsung K4H511638F-LC 64MB */
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {				/* NOR Flash: Spansion S29AL004D 512KB */
+				compatible = "lantiq,nor";	/* "AMD AM29LV400BB" compatible on 3.3.8 */
+				lantiq,cs = <0>;
+				bank-width = <2>;
+				reg = <0 0x0 0x80000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>; /* 256KB */
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x10000>; /* 64KB */
+					};
+
+					partition@50000 {
+						label = "rg_conf_1";
+						reg = <0x50000 0x10000>;
+					};
+
+					partition@60000 {
+						label = "rg_conf_2";
+						reg = <0x60000 0x10000>;
+					};
+
+					partition@70000 {
+						label = "rg_conf_factory";
+						reg = <0x70000 0x10000>;
+					};
+				};
+			};
+
+			nand-parts@0 {		  /* NAND Flash: Samsung K9F5608U0D-JIB0 32MB */
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <1 0x0 0x2000000 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				req-mask = <0x1>;  /* PCI request lines to mask during NAND access */
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					ath9k_cal: partition@0 {
+						label = "art";	   /* Atheros 9160 wifi b/g/n radio EEPROM */
+						reg = <0x00000 0x4000>;
+						read-only;
+					};
+
+					partition@4000 {
+						label = "kernel";
+						reg = <0x4000 0x200000>;
+					};
+
+					partition@164000 {
+						label = "ubi";
+						reg = <0x204000 0x1DFC000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				nand_out {
+					lantiq,groups = "nand cle", "nand ale";
+					lantiq,function = "ebu";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				nand_cs1 {
+					lantiq,groups = "nand cs1";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+				};
+
+				btn_in {
+					lantiq,pins = "io2", "io15", "io22";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+		};
+
+		gpios: stp@E100BB0 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		findhandset {
+			label = "findhandset";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_PHONE>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		upgrading-orange {
+			label = "bthomehubv2b:orange:upgrading";
+			gpios = <&gpios 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		phone-orange {
+			label = "bthomehubv2b:orange:phone";
+			gpios = <&gpios 6 GPIO_ACTIVE_HIGH>;
+		};
+		phone-blue {
+			label = "bthomehubv2b:blue:phone";
+			gpios = <&gpios 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		wireless-orange {
+			label = "bthomehubv2b:orange:wireless";
+			gpios = <&gpios 8 GPIO_ACTIVE_HIGH>;
+		};
+		wireless_blue: wireless-blue {
+			label = "bthomehubv2b:blue:wireless";
+			gpios = <&gpios 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		broadband-red {
+			label = "bthomehubv2b:red:broadband";
+			gpios = <&gpios 10 GPIO_ACTIVE_HIGH>;
+		};
+		broadband-orange {
+			label = "bthomehubv2b:orange:broadband";
+			gpios = <&gpios 11 GPIO_ACTIVE_HIGH>;
+		};
+		broadband_blue: broadband-blue {
+			label = "bthomehubv2b:blue:broadband";
+			gpios = <&gpios 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_red: power-red {
+			label = "bthomehubv2b:red:power";
+			gpios = <&gpios 13 GPIO_ACTIVE_HIGH>;
+		};
+		power_orange: power-orange {
+			label = "bthomehubv2b:orange:power";
+			gpios = <&gpios 14 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		power_blue: power-blue {
+			label = "bthomehubv2b:blue:power";
+			gpios = <&gpios 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@168c,0027 {
+		compatible = "pci168c,0027";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV3A.dts

@@ -0,0 +1,208 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "bt,homehub-v3a", "lantiq,xway", "lantiq,ar9";
+	model = "BT Home Hub 3A";  /* SoC: Lantiq ar9 @ 333MHz */
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_orange;
+		led-failsafe = &power_red;
+		led-running = &power_blue;
+
+		led-dsl = &broadband_blue;
+		led-wifi = &wireless_blue;
+	};
+
+	memory@0 {				  /* RAM: Samsung K4H511638F-LC 64MB */
+		reg = <0x0 0x4000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nand-parts@0 {		  /* NAND Flash: Samsung K9F5608U0D-JIB0 32MB */
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <1 0x0 0x2000000 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				req-mask = <0x1>;  /* PCI request lines to mask during NAND access */
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "preboot";
+						reg = <0x00000 0x8000>;
+						read-only;
+					};
+					partition@8000 {
+						label = "u-boot";
+						reg = <0x8000 0x05c000>;
+						read-only;
+					};
+					partition@64000 {
+						label = "uboot_env";
+						reg = <0x64000 0x004000>;
+					};
+					ath9k_cal: partition@68000 {
+						label = "art-copy";
+						reg = <0x68000 0x004000>;
+					};
+					partition@6c000 {
+						label = "kernel";
+						reg = <0x6c000 0x200000>;
+					};
+					partition@26c000 {
+						label = "ubi";
+						reg = <0x26c000 0x1d94000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				nand_out {
+					lantiq,groups = "nand cle", "nand ale";
+					lantiq,function = "ebu";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				nand_cs1 {
+					lantiq,groups = "nand cs1";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+
+				pci_in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci_out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rgmii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio 52 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		wireless-red {
+			label = "bthomehubv3a:red:wireless";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+		wireless-orange {
+			label = "bthomehubv3a:orange:wireless";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		wireless_blue: wireless-blue {
+			label = "bthomehubv3a:blue:wireless";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+
+		broadband-red {
+			label = "bthomehubv3a:red:broadband";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+		broadband-orange {
+			label = "bthomehubv3a:orange:broadband";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+		};
+		broadband_blue: broadband-blue {
+			label = "bthomehubv3a:blue:broadband";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+
+		power_red: power-red {
+			label = "bthomehubv3a:red:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+		power_orange: power-orange {
+			label = "bthomehubv3a:orange:power";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_blue: power-blue {
+			label = "bthomehubv3a:blue:power";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	ath9k@7000 {
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV5A.dts

@@ -0,0 +1,282 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "bt,homehub-v5a", "lantiq,xway", "lantiq,vr9";
+	model = "BT Home Hub 5A";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_blue;
+
+		led-dsl = &broadband_blue;
+		led-wifi = &wireless_blue;
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nand-parts@0 {
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <0x1 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				nand-on-flash-bbt;
+				nand-ecc-strength = <3>;
+				nand-ecc-step-size = <256>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "u-boot";
+						reg = <0x0 0xa0000>;
+						read-only;
+					};
+					partition@a0000 {
+						label = "uboot-env";
+						reg = <0xa0000 0x20000>;
+						read-only;
+					};
+					partition@c0000 {
+						label = "unused";
+						reg = <0xc0000 0x40000>;
+					};
+					partition@100000 {
+						label = "ubi";
+						reg = <0x100000 0x7e80000>;
+					};
+					/*
+					 * last 512 KiB are for the bad block table, not writable
+					 */
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,output = <1>;
+					lantiq,open-drain;
+				};
+				pcie_rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+					lantiq,open-drain;
+				};
+				usb_vbus {
+					lantiq,pins = "io33";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				nand_out {
+					lantiq,groups = "nand cle", "nand ale";
+					lantiq,function = "ebu";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				nand_cs1 {
+					lantiq,groups = "nand cs1";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy11g_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy11g_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		restart {
+			label = "restart";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		/* broadband-* is a single RGB led */
+		broadband-red {
+			label = "bthomehubv5a:red:broadband";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+		};
+		broadband-green {
+			label = "bthomehubv5a:green:broadband";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+		broadband_blue: broadband-blue {
+			label = "bthomehubv5a:blue:broadband";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		/* wireless-* is a single RGB led */
+		wireless-red {
+			label = "bthomehubv5a:red:wireless";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+		wireless-green {
+			label = "bthomehubv5a:green:wireless";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+		wireless_blue: wireless-blue {
+			label = "bthomehubv5a:blue:wireless";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		/* power-* is a single RGB led */
+		power_red: power-red {
+			label = "bthomehubv5a:red:power";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power-green {
+			label = "bthomehubv5a:green:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_blue: power-blue {
+			label = "bthomehubv5a:blue:power";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		dimmed {
+			label = "dimmed";
+			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@168c,002d {
+		compatible = "pci168c,002d";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+		qca,disable-5ghz;
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN1000B.dts

@@ -0,0 +1,171 @@
+/dts-v1/;
+
+#include "amazonse.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "netgear,dgn1000b", "lantiq,xway", "lantiq,ase";
+	model = "Netgear DGN1000B";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+
+		led-dsl = &dsl;
+		led-internet = &online_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x1000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				asc {
+					lantiq,groups = "asc";
+					lantiq,function = "asc";
+				};
+				keys_in {
+					lantiq,pins = "io0",/* "io25", */"io29";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <1>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs1";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mac-address = [ 00 11 22 33 44 55 ];
+		};
+
+		spi@E100800 {
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pins_spi_default>;
+
+			m25p80@1 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "jedec,spi-nor";
+				reg = <1 0>;
+				spi-max-frequency = <5000000>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						reg = <0x0 0x20000>;
+						label = "SPI (RO) U-Boot Image";
+						read-only;
+					};
+
+					partition@20000 {
+						reg = <0x20000 0x10000>;
+						label = "ENV_MAC";
+						read-only;
+					};
+
+					partition@30000 {
+						reg = <0x30000 0x10000>;
+						label = "DPF";
+						read-only;
+					};
+
+					partition@40000 {
+						reg = <0x40000 0x10000>;
+						label = "NVRAM";
+						read-only;
+					};
+
+					partition@500000 {
+						reg = <0x50000 0x003a0000>;
+						label = "kernel";
+					};
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		dsl: dsl {
+			label = "dgn1000b:green:dsl";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+		online_green: online {
+			label = "dgn1000b:green:online";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+		online2 {
+			label = "dgn1000b:red:online";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+		wps {
+			label = "dgn1000b:green:wps";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+		power: power {
+			label = "dgn1000b:green:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		/*
+			power red is missing
+		*/
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dts

@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "DGN3500.dtsi"
+
+/ {
+	compatible = "netgear,dgn3500", "lantiq,xway", "lantiq,ar9";
+	model = "Netgear DGN3500";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dtsi

@@ -0,0 +1,213 @@
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	chosen {
+		bootargs = "root= console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &internet;
+		led-usb = &usb;
+		led-wifi = &wifi_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1", "req1";
+					lantiq,function = "pci";
+				};
+				pci-in {
+					lantiq,groups = "req1";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci-out {
+					lantiq,groups = "gnt1";
+					lantiq,output = <1>;
+					lantiq,pull = <0>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+		};
+	};
+
+	rtl8366rb {
+		compatible = "realtek,rtl8366rb";
+		gpio-sda = <&gpio 35 GPIO_ACTIVE_HIGH>;
+		gpio-sck = <&gpio 37 GPIO_ACTIVE_HIGH>;
+
+		realtek,initvals = <
+			0x0000 0x0830
+			0x0400 0x8130
+			0x000A 0x83ED
+			0x0F51 0x0017
+			0x02F5 0x0048
+			0x02FA 0xFFDF
+			0x02FB 0xFFE0
+			0x0450 0x0000
+			0x0401 0x0000
+			0x0431 0x0960
+		>;
+	};
+
+
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		internet: internet {
+			label = "dgn3500:green:internet";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+		internet2 {
+			label = "dgn3500:red:internet";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "dgn3500:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "dgn3500:green:usb";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power {
+			label = "dgn3500:green:power";
+			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "dgn3500:red:power";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+		wifi_green: wifi {
+			label = "dgn3500:green:wireless";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+		wifi2 {
+			label = "dgn3500:amber:wireless";
+			gpios = <&gpio 51 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "dgn3500:green:wps";
+			gpios = <&gpio 52 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@168c,0029 {
+		compatible = "pci168c,0029";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <20000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x10000>;
+				label = "uboot";
+				read-only;
+			};
+
+			partition@10000 {
+				reg = <0x10000 0x10000>;
+				label = "uboot-env";
+				read-only;
+			};
+
+			ath9k_cal: partition@20000 {
+				reg = <0x20000 0x10000>;
+				label = "calibration";
+				read-only;
+			};
+
+			partition@50000 {
+				reg = <0x50000 0xfa0000>;
+				label = "firmware";
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500B.dts

@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "DGN3500.dtsi"
+
+/ {
+	compatible = "netgear,dgn3500b", "lantiq,xway", "lantiq,ar9";
+	model = "Netgear DGN3500B";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DM200.dts

@@ -0,0 +1,215 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "netgear,dm200", "lantiq,xway", "lantiq,vr9";
+	model = "Netgear DM200";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_amber;
+		led-running = &power_green;
+
+		led-dsl = &dsl_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+			};
+
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk", "spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		pcie@d900000 {
+			status = "disabled";
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy22f_a22.bin";
+		phys = [ 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		annexa {
+			gpio-export,name = "annexa";
+			gpio-export,output = <0>;
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+		annexb {
+			gpio-export,name = "annexb";
+			gpio-export,output = <0>;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_amber: power_amber {
+			label = "dm200:amber:power";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+		power_green: power_green {
+			label = "dm200:green:power";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		lan_amber {
+			label = "dm200:amber:lan";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+		lan_green {
+			label = "dm200:green:lan";
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		dsl_amber {
+			label = "dm200:amber:dsl";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+		};
+		dsl_green: dsl_green {
+			label = "dm200:green:dsl";
+			gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "uboot";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0x10000>;
+				label = "gphyfirmware";
+				read-only;
+			};
+
+			partition@30000 {
+				reg = <0x30000 0x7b0000>;
+				label = "firmware";
+			};
+
+			partition@7e0000 {
+				reg = <0x7e0000 0x10000>;
+				label = "sysconfig";
+				read-only;
+			};
+
+			partition@7f0000 {
+				reg = <0x7f0000 0x2000>;
+				label = "ubootconfig";
+				read-only;
+			};
+
+			partition@7f2000 {
+				reg = <0x7f2000 0x1000>;
+				label = "ART";
+				read-only;
+			};
+
+			partition@7f3000 {
+				reg = <0x7f3000 0x1000>;
+				label = "pot";
+				read-only;
+			};
+
+			partition@7f4000 {
+				reg = <0x7f4000 0xc000>;
+				label = "ret";
+				read-only;
+			};
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50712.dts

@@ -0,0 +1,83 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+/ {
+	compatible = "lantiq,easy50712", "lantiq,xway", "lantiq,danube";
+	model = "Intel EASY50712 Nand";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>; /* 64 KB */
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>; /* 64 KB */
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					partition@400000 {
+						label = "rootfs";
+						reg = <0x400000 0x400000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+				};
+				conf_out {
+					lantiq,pins = "io4", "io5", "io6"; /* stp */
+					lantiq,open-drain;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50810.dts

@@ -0,0 +1,93 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+/ {
+	compatible = "lantiq,easy50810", "lantiq,xway", "lantiq,ar9";
+	model = "Lantiq EASY50810";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>; /* 64 KB */
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>; /* 64 KB */
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x3d0000>;
+					};
+
+					partition@400000 {
+						label = "rootfs";
+						reg = <0x400000 0x400000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+				};
+				conf_out {
+					lantiq,pins = "io4", "io5", "io6"; /* stp */
+					lantiq,open-drain;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		stp0: stp@E100BB0 {
+			#gpio-cells = <2>;
+			compatible = "lantiq,gpio-stp-xway";
+			gpio-controller;
+			reg = <0xE100BB0 0x40>;
+
+			lantiq,shadow = <0xfff>;
+			lantiq,groups = <0x3>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920.dtsi

@@ -0,0 +1,298 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+
+		led-usb = &usb1;
+		led-usb2 = &usb2;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin3 {
+					lantiq,groups = "exin3";
+					lantiq,function = "exin";
+				};
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+				};
+				nand {
+					lantiq,groups = "nand cle", "nand ale",
+							"nand rd", "nand rdy";
+					lantiq,function = "ebu";
+				};
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				pci {
+					lantiq,groups = "gnt1", "req1";
+					lantiq,function = "pci";
+				};
+				conf_out {
+					lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
+							"io4", "io5", "io6", /* stp */
+							"io21",
+							"io33";
+					lantiq,open-drain;
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				conf_in {
+					lantiq,pins = "io39", /* exin3 */
+							"io48"; /* nand rdy */
+					lantiq,pull = <2>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		stp: stp@E100BB0 {
+			compatible = "lantiq,gpio-stp-xway";
+			reg = <0xE100BB0 0x40>;
+			#gpio-cells = <2>;
+			gpio-controller;
+
+			lantiq,shadow = <0xffff>;
+			lantiq,groups = <0x7>;
+			lantiq,dsl = <0x3>;
+			lantiq,phy1 = <0x7>;
+			lantiq,phy2 = <0x7>;
+			/* lantiq,rising; */
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy11g_a14.bin";
+		firmware2 = "lantiq/xrx200_phy11g_a22.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+/*		reset {
+			label = "reset";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};*/
+		paging {
+			label = "paging";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_PHONE>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power: power {
+			label = "easy80920:green:power";
+			gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		warning {
+			label = "easy80920:green:warning";
+			gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
+		};
+		fxs1 {
+			label = "easy80920:green:fxs1";
+			gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
+		};
+		fxs2 {
+			label = "easy80920:green:fxs2";
+			gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
+		};
+		fxo {
+			label = "easy80920:green:fxo";
+			gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
+		};
+		usb1: usb1 {
+			label = "easy80920:green:usb1";
+			gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
+		};
+		usb2: usb2 {
+			label = "easy80920:green:usb2";
+			gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
+		};
+		sd {
+			label = "easy80920:green:sd";
+			gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
+		};
+		wps {
+			label = "easy80920:green:wps";
+			gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <1000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "SPI (RO) U-Boot Image";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0x10000>;
+				label = "ENV_MAC";
+				read-only;
+			};
+
+			partition@30000 {
+				reg = <0x30000 0x10000>;
+				label = "DPF";
+				read-only;
+			};
+
+			partition@40000 {
+				reg = <0x40000 0x10000>;
+				label = "NVRAM";
+				read-only;
+			};
+
+			partition@500000 {
+				reg = <0x50000 0x003a0000>;
+				label = "kernel";
+			};
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		lantiq,switch;
+
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+	};
+
+	wan: interface@1 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+		lantiq,wan;
+
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NAND.dts

@@ -0,0 +1,68 @@
+/dts-v1/;
+
+
+#include "EASY80920.dtsi"
+
+/ {
+	compatible = "lantiq,easy80920-nand", "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
+	model = "Intel EASY80920 Nand";
+
+	chosen {
+		bootargs = "ubi.mtd=ubi ubi.block=0,rootfsA root=/dev/ubiblock0_1";
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			ranges = <0 0 0x4000000 0x3ffffff>;
+			nand-parts@0 {
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x100000>; /* 1024 KB */
+					};
+
+					partition@100000 {
+						label = "uboot_env";
+						reg = <0x100000 0x40000>; /* 256 KB */
+					};
+
+					partition@140000 {
+						label = "ubootconfigB";
+						reg = <0x140000 0x40000>; /* 256 KB */
+					};
+
+					partition@180000 {
+						label = "gphyfirmware";
+						reg = <0x180000 0x40000>; /* 256 KB */
+					};
+
+					partition@1c0000 {
+						label = "ubi";
+						reg = <0x1c0000 0xc800000>;
+					};
+
+					partition@c9c0000 {
+						label = "calibration";
+						reg = <0xc9c0000 0x100000>;
+					};
+
+					partition@cac0000 {
+						label = "res";
+						reg = <0xcac0000 0x13540000>;
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NOR.dts

@@ -0,0 +1,43 @@
+/dts-v1/;
+
+
+#include "EASY80920.dtsi"
+
+/ {
+	compatible = "lantiq,easy80920-nor", "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
+	model = "Intel EASY80920 Nor";
+
+	fpi@10000000 {
+		localbus@0 {
+			ranges = <0 0 0x0 0x3ffffff>;
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x10000>;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x10000 0x10000>;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x7e0000>;
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88388.dts

@@ -0,0 +1,106 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon FTTDP8 Reference Board";
+	compatible = "lantiq,easy88388", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <0x198>;
+		};
+	};
+
+	pinctrl {
+		led_pins: led-pins {
+			lantiq,pins = "io34", "io35", "io36", "io37", "io38", 
+					"io39", "io40", "io41";
+			lantiq,function = "gpio";
+		};
+	};
+
+	easy88388-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins &bootled_pins>;
+
+		GPON {
+			label = "easy88388:green:gpon";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		TEST {
+			label = "easy88388:green:test";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		STATUS {
+			label = "easy88388:green:status";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		ERROR {
+			label = "easy88388:red:error";
+			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		DSL1 {
+			label = "easy88388:dsl:1";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL2 {
+			label = "easy88388:dsl:2";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL3 {
+			label = "easy88388:dsl:3";
+			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL4 {
+			label = "easy88388:dsl:4";
+			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL5 {
+			label = "easy88388:dsl:5";
+			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL6 {
+			label = "easy88388:dsl:6";
+			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL7 {
+			label = "easy88388:dsl:7";
+			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		DSL8 {
+			label = "easy88388:dsl:8";
+			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88444.dts

@@ -0,0 +1,80 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon FTTdp G.FAST Reference Board";
+	compatible = "lantiq,easy88444", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <0x198>;
+		};
+	};
+
+	pinctrl {
+		led_pins: led-pins {
+			lantiq,pins = "io34", "io35", "io37";
+			lantiq,function = "gpio";
+		};
+	};
+
+	easy88444-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins &bootled_pins>;
+
+		GPON {
+			label = "easy88444:green:gpon";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		TEST {
+			label = "easy88444:green:test";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		STATUS {
+			label = "easy88444:green:status";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		GFAST1 {
+			label = "easy88444:gfast:1";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GFAST2 {
+			label = "easy88444:gfast:2";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GFAST3 {
+			label = "easy88444:gfast:3";
+			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GFAST4 {
+			label = "easy88444:gfast:4";
+			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000-base.dtsi

@@ -0,0 +1,110 @@
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "lantiq,easy98000", "lantiq,falcon";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;
+	};
+
+	easy98000-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bootled_pins>;
+
+		LED_0 {
+			label = "easy98000:green:gpon";
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_1 {
+			label = "easy98000:red:gpon";
+			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_2 {
+			label = "easy98000:green:gpon_tx";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_3 {
+			label = "easy98000:green:gpon_rx";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_4 {
+			label = "easy98000:green:voice";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_5 {
+			label = "easy98000:green:status";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+	};
+};
+
+&ebu_cs1 {
+	eth0: ethernet@0000000 {
+		compatible = "davicom,dm9000";
+		device_type = "network";
+		reg = <0x0000003 0x1>, <0x0000001 0x1>;
+		reg-names = "addr", "data";
+		interrupt-parent = <&gpio1>;
+		#interrupt-cells = <2>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		local-mac-address = [ 00 00 00 00 00 00 ];
+	};
+
+	cpld@3c00000 {
+		compatible = "lantiq,easy98000_addon";
+		reg = <0x3c00000 0x2>;
+	};
+
+	cpld@3c0000c {
+		compatible = "lantiq,easy98000_cpld_led";
+		reg = <0x3c0000c 0x2>,  <0x3c00012 0x2>;
+	};
+};
+
+/* // enable this for second uart:
+&serial1 {
+	status = "okay";
+};*/
+
+&spi {
+	status = "okay";
+
+	eeprom@1 {
+		compatible = "atmel,at25", "atmel,at25160n";
+		reg = <2>;
+		spi-max-frequency = <1000000>;
+		spi-cpha;
+		spi-cpol;
+
+		pagesize = <32>;
+		size = <2048>;
+		address-width = <16>;
+	};
+};
+
+&i2c {
+	status = "okay";
+
+	clock-frequency = <100000>;
+
+	/* eeprom-emulation by OMU */
+	eeprom@50 {
+		compatible = "at,24c02";
+		reg = <0x50>;
+	};
+	eeprom@51 {
+		compatible = "at,24c02";
+		reg = <0x51>;
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NAND.dts

@@ -0,0 +1,40 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "EASY98000-base.dtsi"
+
+/ {
+	model = "Lantiq Falcon (NAND)";
+	compatible = "lantiq,easy98000-nand", "lantiq,easy98000", "lantiq,falcon";
+
+	aliases {
+		spi0 = &spi;
+	};
+};
+
+&ebu_cs0 {
+	gen_nand@0 {
+		compatible = "gen_nand", "lantiq,nand-falcon";
+		bank-width = <1>;
+		reg = <0x0 0x40000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		linux,mtd-name = "gen_nand";
+		bbt-use-flash;
+
+		partition@0 {
+			label = "uboot";
+			reg = <0x00000 0x40000>;
+		};
+
+		partition@10000 {
+			label = "uboot_env";
+			reg = <0x40000 0x40000>;
+		};
+
+		partition@20000 {
+			label = "linux";
+			reg = <0x80000 0x3d0000>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NOR.dts

@@ -0,0 +1,38 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "EASY98000-base.dtsi"
+
+/ {
+	model = "Lantiq Falcon (NOR)";
+	compatible = "lantiq,easy98000-nor", "lantiq,easy98000", "lantiq,falcon";
+
+	aliases {
+		spi0 = &spi;
+	};
+};
+
+&ebu_cs0 {
+	cfi@0 {
+		compatible = "lantiq,nor";
+		bank-width = <2>;
+		reg = <0x0 0x4000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "uboot";
+			reg = <0x00000 0x40000>;
+		};
+
+		partition@10000 {
+			label = "uboot_env";
+			reg = <0x40000 0x40000>;
+		};
+
+		partition@20000 {
+			label = "linux";
+			reg = <0x80000 0x3d0000>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000SFLASH.dts

@@ -0,0 +1,16 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "EASY98000-base.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon (SFLASH)";
+	compatible = "lantiq,easy98000-sflash", "lantiq,easy98000", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+		spi1 = &spi;
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020.dts

@@ -0,0 +1,95 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon Reference Board";
+	compatible = "lantiq,easy98020", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <0x198>;
+		};
+	};
+
+	pinctrl {
+		led_pins: phy-led-pins {
+			lantiq,pins = "io42", "io41", "io38", "io37";
+			lantiq,function = "gpio";
+		};
+	};
+
+	easy98020-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bootled_pins>;
+
+		GPON {
+			label = "easy98020:green:gpon";
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		TEST {
+			label = "easy98020:green:test";
+			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		ETH {
+			label = "easy98020:green:status";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		VOICE {
+			label = "easy98020:green:voice";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		VIDEO {
+			label = "easy98020:green:video";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+	};
+
+	easy98020-phy-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins>;
+
+		GE0_ACT {
+			label = "easy98020:ge0_act";
+			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GE0_LINK {
+			label = "easy98020:ge0_link";
+			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GE1_ACT {
+			label = "easy98020:ge1_act";
+			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+		GE1_LINK {
+			label = "easy98020:ge1_link";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020V18.dts

@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon Reference Board V1.8";
+	compatible = "lantiq,easy98020-v18", "lantiq,easy98020", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <0x198>;
+		};
+	};
+
+	pinctrl {
+		led_pins: led-pins {
+			lantiq,pins = "io11", "io14", "io36", "io37", "io38";
+			lantiq,function = "gpio";
+		};
+	};
+
+	easy98020-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins &bootled_pins>;
+
+		GPON {
+			label = "easy98020:green:gpon";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		TEST {
+			label = "easy98020:green:test";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		ETH {
+			label = "easy98020:green:status";
+			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		VOICE {
+			label = "easy98020:green:voice";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		VIDEO {
+			label = "easy98020:green:video";
+			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98021.dts

@@ -0,0 +1,81 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon HGU Reference Board";
+	compatible = "lantiq,easy98021", "lantiq,easy98020", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <0x198>;
+		};
+	};
+
+	gpio-mmc {
+		/* Place-holder for SIM-Card connector,
+		   to list the used GPIOs, no official binding */
+		compatible = "gpio-mmc";
+		gpios =  <&gpio0 3 GPIO_ACTIVE_HIGH>,
+			 <&gpio0 3 GPIO_ACTIVE_HIGH>,
+			 <&gpio0 2 GPIO_ACTIVE_HIGH>,
+			 <0>; /* no CS */
+		gpio-names = "di", "do", "clk", "cs";
+		reset-gpio =  <&gpio3 24 GPIO_ACTIVE_HIGH>;
+	};
+
+	pinctrl {
+		led_pins: led-pins {
+			lantiq,pins = "io11", "io14", "io36", "io37", "io38";
+			lantiq,function = "gpio";
+		};
+	};
+
+	easy98021-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins &bootled_pins>;
+
+		GPON {
+			label = "easy98021:green:gpon";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		TEST {
+			label = "easy98021:red:test";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		ETH {
+			label = "easy98021:green:status";
+			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		VOICE {
+			label = "easy98021:green:voice";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		SIMCARD {
+			label = "easy98021:green:simcard";
+			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE.dts

@@ -0,0 +1,76 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon SFP Stick with SyncE";
+	compatible = "lantiq,easy98035synce", "lantiq,falcon-sfp", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	pinctrl {
+		compatible = "lantiq,pinctrl-falcon";
+
+		asc0_func1: func1 {
+			func1_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+			func1_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <0>;
+			};
+		};
+		asc0_func2: func2 {
+			func2_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <0>;
+			};
+			func2_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+		asc0_func3: func3 {
+			func3_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+			func3_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+	};
+
+	pinselect-asc0 {
+		compatible = "lantiq,pinselect-asc0";
+		pinctrl-names = "asc0", "func1", "func2", "func3";
+		pinctrl-0 = <&asc0_pins>;
+		pinctrl-1 = <&asc0_func1>;
+		pinctrl-2 = <&asc0_func2>;
+		pinctrl-3 = <&asc0_func3>;
+	};
+};
+
+&serial0 {
+	pinctrl-names = "default";
+	/* use "empty" pinctrl to leave setting from u-boot enabled */
+	pinctrl-0 = < >;
+};
+
+&i2c {
+	status = "okay";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE1588.dts

@@ -0,0 +1,76 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon SFP Stick with SyncE/1588";
+	compatible = "lantiq,easy98035synce1588", "lantiq,falcon-sfp", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	pinctrl {
+		compatible = "lantiq,pinctrl-falcon";
+
+		asc0_func1: func1 {
+			func1_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+			func1_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <0>;
+			};
+		};
+		asc0_func2: func2 {
+			func2_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <0>;
+			};
+			func2_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+		asc0_func3: func3 {
+			func3_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+			func3_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+	};
+
+	pinselect-asc0 {
+		compatible = "lantiq,pinselect-asc0";
+		pinctrl-names = "asc0", "func1", "func2", "func3";
+		pinctrl-0 = <&asc0_pins>;
+		pinctrl-1 = <&asc0_func1>;
+		pinctrl-2 = <&asc0_func2>;
+		pinctrl-3 = <&asc0_func3>;
+	};
+};
+
+&serial0 {
+	pinctrl-names = "default";
+	/* use "empty" pinctrl to leave setting from u-boot enabled */
+	pinctrl-0 = < >;
+};
+
+&i2c {
+	status = "okay";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-MDU.dts

@@ -0,0 +1,53 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon / Vinax MDU Board";
+	compatible = "lantiq,falcon-mdu", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	mdu-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bootled_pins>;
+
+		LED_0 {
+			label = "mdu:green:gpon";
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_1 {
+			label = "mdu:green:status";
+			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_2 {
+			label = "mdu:green:2";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_3 {
+			label = "mdu:green:3";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		LED_4 {
+			label = "mdu:green:4";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+	};
+};
+

target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-SFP.dts

@@ -0,0 +1,76 @@
+/dts-v1/;
+
+#include "falcon.dtsi"
+#include "falcon-sflash-16M.dtsi"
+
+/ {
+	model = "Lantiq Falcon SFP Stick";
+	compatible = "lantiq,falcon-sfp", "lantiq,falcon";
+
+	aliases {
+		spi0 = &ebu_cs0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;  // 64M at 0x0
+	};
+
+	pinctrl {
+		compatible = "lantiq,pinctrl-falcon";
+
+		asc0_func1: func1 {
+			func1_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,output = <0>;
+			};
+			func1_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <0>;
+			};
+		};
+		asc0_func2: func2 {
+			func2_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <0>;
+			};
+			func2_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+		asc0_func3: func3 {
+			func3_tx {
+				lantiq,pins = "io32";
+				lantiq,mux = <1>;
+				lantiq,output = <0>;
+			};
+			func3_rx {
+				lantiq,pins = "io33";
+				lantiq,mux = <1>;
+				lantiq,input = <0>;
+			};
+		};
+	};
+
+	pinselect-asc0 {
+		compatible = "lantiq,pinselect-asc0";
+		pinctrl-names = "asc0", "func1", "func2", "func3";
+		pinctrl-0 = <&asc0_pins>;
+		pinctrl-1 = <&asc0_func1>;
+		pinctrl-2 = <&asc0_func2>;
+		pinctrl-3 = <&asc0_func3>;
+	};
+};
+
+&serial0 {
+	pinctrl-names = "default";
+	/* use "empty" pinctrl to leave setting from u-boot enabled */
+	pinctrl-0 = < >;
+};
+
+&i2c {
+	status = "okay";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ3370.dts

@@ -0,0 +1,288 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "avm,fritz3370", "lantiq,xway", "lantiq,vr9";
+	model = "Fritz!Box WLAN 3370";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200 ubi.mtd=1,512 root=/dev/mtdblock9";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &info_green;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nand-parts@0 {
+				compatible = "lantiq,nand-xway";
+				bank-width = <2>;
+				reg = <1 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "kernel";
+						reg = <0x0 0x400000>;
+					};
+
+					partition@400000 {
+						label = "rootfs_ubi";
+						reg = <0x400000 0x3000000>;
+					};
+
+					partition@3400000 {
+						label = "vr9_firmware";
+						reg = <0x3400000 0x400000>;
+					};
+					partition@3800000 {
+						label = "reserved";
+						reg = <0x3800000 0x3000000>;
+					};
+					partition@6800000 {
+						label = "config";
+						reg = <0x6800000 0x200000>;
+					};
+					partition@6a00000 {
+						label = "nand-filesystem";
+						reg = <0x6a00000 0x1600000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				nand {
+					lantiq,groups = "nand cle", "nand ale",
+							"nand rd", "nand cs1", "nand rdy";
+					lantiq,function = "ebu";
+					lantiq,pull = <1>;
+				};
+				phy-rst {
+					lantiq,pins = "io37", "io44";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 5 GPIO_ACTIVE_HIGH
+				&gpio 14 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy11g_a14.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		power {
+			label = "power";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_POWER>;
+		};
+/*		wifi {
+			label = "wifi";
+			gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+			linux,code = <BTN_1>;
+		};*/
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "fritz3370:green:power";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "fritz3370:red:power";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
+		};
+		info_red {
+			label = "fritz3370:red:info";
+			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "fritz3370:green:wlan";
+			gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "fritz3370:green:dsl";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+		lan {
+			label = "fritz3370:green:lan";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+		info_green: info_green {
+			label = "fritz3370:green:info";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <1000000>;
+
+		urlader: partition@0 {
+			reg = <0x0 0x20000>;
+			label = "urlader";
+			read-only;
+		};
+
+		partition@20000 {
+			reg = <0x20000 0x10000>;
+			label = "tffs (1)";
+			read-only;
+		};
+
+		partition@30000 {
+			reg = <0x30000 0x10000>;
+			label = "tffs (2)";
+			read-only;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&urlader 0x987>;
+		mtd-mac-address-increment = <(-2)>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};
+
+&pcie0 {
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+
+		wifi@0,0 {
+			compatible = "pci0,0";
+			reg = <0 0 0 0 0>;
+			qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7320.dts

@@ -0,0 +1,161 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "avm,fritz7320", "lantiq,xway", "lantiq,ar9";
+	model = "1&1 HomeServer";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+
+		led-internet = &info_green;
+		led-dsl = &power;
+		led-wifi = &wlan;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x1000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					ath9k_cal: partition@0 {
+						label = "urlader";
+						reg = <0x00000 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0xf60000>;
+					};
+
+					partition@f80000 {
+						label = "tffs (1)";
+						reg = <0xf80000 0x40000>;
+						read-only;
+					};
+
+					partition@fc0000 {
+						label = "tffs (2)";
+						reg = <0xfc0000 0x40000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				pci {
+					lantiq,groups = "gnt1", "req1", "req2", "req3", "req4", "gnt2", "gnt3", "gnt4";
+					lantiq,function = "pci";
+				};
+				pci-in {
+					lantiq,groups = "req1", "req2", "req3", "req4";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci-out {
+					lantiq,groups = "gnt1", "gnt2", "gnt3", "gnt4";
+					lantiq,output = <1>;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "mii";
+			mtd-mac-address = <&ath9k_cal 0xa91>;
+			mtd-mac-address-increment = <(-2)>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		dect {
+			label = "dect";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_PHONE>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "fritz7320:green:power";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		voice {
+			label = "fritz7320:green:fon";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+		};
+		dect {
+			label = "fritz7320:green:dect";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+		wlan: wlan {
+			label = "fritz7320:green:wlan";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+		info_green: info_green {
+			label = "fritz7320:green:info";
+			gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
+		};
+		info_red {
+			label = "fritz7320:red:info";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	req-mask = <0xf>;
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@0,0 {
+		compatible = "pci0,0";
+		reg = <0x7000 0 0 0 0>;
+		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7360SL.dts

@@ -0,0 +1,228 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9";
+	model = "1&1 HomeServer";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &info_green;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x1000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					urlader: partition@0 {
+						label = "urlader";
+						reg = <0x00000 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0xf60000>;
+					};
+
+					partition@f80000 {
+						label = "tffs (1)";
+						reg = <0xf80000 0x40000>;
+						read-only;
+					};
+
+					partition@fc0000 {
+						label = "tffs (2)";
+						reg = <0xfc0000 0x40000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				phy-rst {
+					lantiq,pins = "io37", "io44";
+					lantiq,pull = <0>;
+					lantiq,open-drain;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy11g_a22.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		dect {
+			label = "dect";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_PHONE>;
+		};
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_WLAN>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "fritz7360sl:green:power";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "fritz7360sl:red:power";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
+		};
+		info_red {
+			label = "fritz7360sl:red:info";
+			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+		};
+		info_green: info_green {
+			label = "fritz7360sl:green:info";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "fritz7360sl:green:wlan";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+		dect {
+			label = "fritz7360sl:green:dect";
+			gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&urlader 0xa91>;
+		mtd-mac-address-increment = <(-2)>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x00>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x01>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};
+
+&pcie0 {
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+
+		wifi@168c,002e {
+			compatible = "pci168c,002e";
+			reg = <0 0 0 0 0>;
+			qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/GIGASX76X.dts

@@ -0,0 +1,122 @@
+/dts-v1/;
+
+#include "danube.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "siemens,gigaset-sx76x", "lantiq,xway", "lantiq,danube";
+	model = "Gigaset SX761,SX762,SX763";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x30000>;
+					};
+
+					partition@10000 {
+						label = "uboot_env";
+						reg = <0x30000 0x10000>;
+					};
+
+					partition@40000 {
+						label = "firmware";
+						reg = <0x40000 0x7c0000>;
+					};
+				};
+			};
+
+			gpiomm: gpiomm@4000000 {
+				compatible = "lantiq,gpio-mm";
+				reg = <1 0x0 0x10 >;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				lantiq,shadow = <0x3>;
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+				};
+			};
+		};
+
+		gpios: stp@E100BB0 {
+			status = "okay";
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		switch {
+			gpio-export,name = "switch";
+			gpio-export,output = <1>;
+			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/H201L.dts

@@ -0,0 +1,159 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zte,h201l", "lantiq,xway", "lantiq,ar9";
+	model = "ZTE H210L";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_green;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &online;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "uboot_env";
+						reg = <0x20000 0x10000>;
+						read-only;
+					};
+
+					partition@30000 {
+						label = "firmware";
+						reg = <0x30000 0x7d0000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rgmii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 55 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "h201l:green:power";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		online: online {
+			label = "h201l:green:internet";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "h201l:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		phone {
+			label = "h201l:green:phone";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "h201l:green:wps";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "h201l:green:wlan";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "h201l:green:usb";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		switch {
+			gpio-export,name = "switch";
+			gpio-export,output = <1>;
+			gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
+		};
+		usb {
+			gpio-export,name = "usb";
+			gpio-export,output = <1>;
+			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+		};
+		wifi {
+			gpio-export,name = "wifi";
+			gpio-export,output = <1>;
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2601HNFX.dts

@@ -0,0 +1,190 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zyxel,p-2601hn", "lantiq,xway", "lantiq,ar9";
+	model = "ZyXEL P-2601HN-Fx";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &online;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x20000>;
+						read-only;
+					};
+
+					partition@60000 {
+						label = "firmware";
+						reg = <0x60000 0xfa0000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				exin {
+					lantiq,groups = "exin1";
+					lantiq,function = "exin";
+				};
+				pci {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+				};
+				conf_out {
+					lantiq,pins = "io4", "io5", "io6";
+					lantiq,open-drain;
+					lantiq,pull = <0>;
+				};
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rmii";
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		stp: stp@E100BB0 {
+			#gpio-cells = <2>;
+			compatible = "lantiq,gpio-stp-xway";
+			gpio-controller;
+			reg = <0xE100BB0 0x40>;
+
+			lantiq,shadow = <0xfff>;
+			lantiq,groups = <0x3>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "p2601hnfx:green:power";
+			gpios = <&stp 11 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "p2601hnfx:red:power";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+		};
+		online: online {
+			label = "p2601hnfx:green:internet";
+			gpios = <&stp 13 GPIO_ACTIVE_LOW>;
+		};
+		online2 {
+			label = "p2601hnfx:red:internet";
+			gpios = <&stp 12 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "p2601hnfx:green:dsl";
+			gpios = <&stp 14 GPIO_ACTIVE_LOW>;
+		};
+		phone {
+			label = "p2601hnfx:green:phone";
+			gpios = <&stp 9 GPIO_ACTIVE_LOW>;
+		};
+		phone2 {
+			label = "p2601hnfx:orange:phone";
+			gpios = <&stp 8 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "p2601hnfx:green:wireless";
+			gpios = <&stp 15 GPIO_ACTIVE_LOW>;
+		};
+		wifi2 {
+			label = "p2601hnfx:orange:wireless";
+			gpios = <&stp 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		switch {
+			gpio-export,name = "switch";
+			gpio-export,output = <1>;
+			gpios = <&gpio 50 GPIO_ACTIVE_HIGH>;
+		};
+		usb {
+			gpio-export,name = "wifi";
+			gpio-export,output = <1>;
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF1.dts

@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "P2812HNUFX.dtsi"
+
+/ {
+	compatible = "zyxel,p-2812hnu-f1", "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
+	model = "ZyXEL P-2812HNU-F1";
+
+	aliases {
+		led-usb = &usb1;
+		led-usb2 = &usb2;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nand-parts@0 {
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+					};
+					partition@40000 {
+						label = "uboot-env";
+						reg = <0x40000 0x20000>;
+					};
+					partition@60000 {
+						label = "kernel";
+						reg = <0x60000 0x200000>;
+					};
+					partition@260000 {
+						label = "ubi";
+						reg = <0x260000 0x7da0000>;
+					};
+				};
+			};
+		};
+
+		pcie@d900000 {
+			status = "disabled";
+		};
+	};
+
+	gpio-leds {
+		usb1: usb1 {
+			label = "p2812hnuf1:green:usb1";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+		usb2: usb2 {
+			label = "p2812hnuf1:green:usb2";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	wifi@1814,3062 {
+		compatible = "pci1814,3062";
+		reg = <0x7000 0 0 0 0>;
+		ralink,eeprom = "RT3062.eeprom";
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF3.dts

@@ -0,0 +1,66 @@
+/dts-v1/;
+
+#include "P2812HNUFX.dtsi"
+
+/ {
+	compatible = "zyxel,p-2812hnu-f3", "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
+	model = "ZyXEL P-2812HNU-F3";
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x50000>;
+						read-only;
+					};
+					partition@50000 {
+						label = "uboot-env";
+						reg = <0x50000 0x10000>;
+					};
+					partition@60000 {
+						label = "unused";
+						reg = <0x60000 0x7a0000>;
+					};
+				};
+			};
+
+			nand-parts@0 {
+				compatible = "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <1 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					label = "kernel";
+					reg = <0x0 0x200000>;
+				};
+				partition@200000 {
+					label = "ubi";
+					reg = <0x200000 0x7e00000>;
+				};
+			};
+		};
+	};
+};
+
+&pci0 {
+	wifi@1814,3092 {
+		compatible = "pci1814,3092";
+		reg = <0x7000 0 0 0 0>;
+		ralink,eeprom = "RT3092.eeprom";
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi

@@ -0,0 +1,280 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl_green;
+		led-internet = &internet_green;
+		led-wifi = &wireless_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				exin3 {
+					lantiq,groups = "exin3";
+					lantiq,function = "exin";
+				};
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led1", "gphy1 led1",
+							"gphy0 led2", "gphy1 led2";
+					lantiq,function = "gphy";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pci-in {
+					lantiq,groups = "req1";
+					lantiq,function = "pci";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci-out {
+					lantiq,groups = "gnt1";
+					lantiq,function = "pci";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <2>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				ifxhcd-rst {
+					lantiq,pins = "io33";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				nand_out {
+					lantiq,groups = "nand cle", "nand ale";
+					lantiq,function = "ebu";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				nand_cs1 {
+					lantiq,groups = "nand cs1";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+			};
+		};
+
+		stp: stp@E100BB0 {
+			compatible = "lantiq,gpio-stp-xway";
+			reg = <0xE100BB0 0x40>;
+			#gpio-cells = <2>;
+			gpio-controller;
+
+			lantiq,shadow = <0xffffff>;
+			lantiq,groups = <0x7>;
+			lantiq,dsl = <0x0>;
+			lantiq,phy1 = <0x0>;
+			lantiq,phy2 = <0x0>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy11g_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy11g_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		internet_red {
+			label = "p2812hnufx:red:internet";
+			gpios = <&stp 16 GPIO_ACTIVE_LOW>;
+		};
+		internet_green: internet_green {
+			label = "p2812hnufx:green:internet";
+			gpios = <&stp 17 GPIO_ACTIVE_LOW>;
+		};
+		dsl_green: dsl_green {
+			label = "p2812hnufx:green:dsl";
+			gpios = <&stp 18 GPIO_ACTIVE_LOW>;
+		};
+		dsl_orange {
+			label = "p2812hnufx:orange:dsl";
+			gpios = <&stp 19 GPIO_ACTIVE_LOW>;
+		};
+		wireless_orange {
+			label = "p2812hnufx:orange:wlan";
+			gpios = <&stp 20 GPIO_ACTIVE_LOW>;
+		};
+		wireless_green: wireless_green {
+			label = "p2812hnufx:green:wlan";
+			gpios = <&stp 21 GPIO_ACTIVE_LOW>;
+		};
+		power_red: power {
+			label = "p2812hnufx:red:power";
+			gpios = <&stp 22 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power2 {
+			label = "p2812hnufx:green:power";
+			gpios = <&stp 23 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		phone1 {
+			label = "p2812hnufx:green:phone";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+		phone1warn {
+			label = "p2812hnufx:orange:phone";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+		phone2warn {
+			label = "p2812hnufx:orange:phone2";
+			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+		};
+		phone2 {
+			label = "p2812hnufx:green:phone2";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mac-address = [ 00 11 22 33 44 55 ];
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8970.dts

@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "TDW89X0.dtsi"
+
+/ {
+	compatible = "tplink,tdw8970", "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
+	model = "TP-LINK TD-W8970";
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8980.dts

@@ -0,0 +1,35 @@
+/dts-v1/;
+
+#include "TDW89X0.dtsi"
+
+/ {
+	compatible = "tplink,tdw8980", "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
+	model = "TP-LINK TD-W8980";
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			state_default: pinmux {
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,output = <1>;
+					lantiq,open-drain;
+				};
+			};
+		};
+
+		pci@E105400 {
+			status = "okay";
+			lantiq,bus-clock = <33333333>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-leds {
+		wifi2 {
+			label = "tdw8980:green:wlan5ghz";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW89X0.dtsi

@@ -0,0 +1,274 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		/* the power led can't be controlled, use the wps led instead */
+		led-boot = &wps;
+		led-failsafe = &wps;
+
+		led-dsl = &dsl;
+		led-internet = &internet;
+		led-wifi = &wifi;
+		led-usb = &usb0;
+		led-usb2 = &usb2;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led1", "gphy1 led1";
+					lantiq,function = "gphy";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				phy-rst {
+					lantiq,pins = "io42";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy11g_a22.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RFKILL>;
+			linux,input-type = <EV_SW>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		/*
+			power is not controllable via gpio
+		*/
+		dsl: dsl {
+			label = "tdw89x0:green:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
+		};
+		internet: internet {
+			label = "tdw89x0:green:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+		};
+		usb0: usb0 {
+			label = "tdw89x0:green:usb";
+			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
+		};
+		usb2: usb2 {
+			label = "tdw89x0:green:usb2";
+			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+		};
+		wps: wps {
+			label = "tdw89x0:green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	wifi-leds {
+		compatible = "gpio-leds";
+
+		wifi: wifi {
+			label = "tdw89x0:green:wifi";
+			gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <33250000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "u-boot";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0x7a0000>;
+				label = "firmware";
+			};
+
+			partition@7c0000 {
+				reg = <0x7c0000 0x10000>;
+				label = "config";
+				read-only;
+			};
+
+			ath9k_cal: partition@7d0000 {
+				reg = <0x7d0000 0x30000>;
+				label = "boardconfig";
+				read-only;
+			};
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&ath9k_cal 0xf100>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+			// gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};
+
+&pcie0 {
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+
+		ath9k: wifi@168c,002e {
+			compatible = "pci168c,002e";
+			reg = <0 0 0 0 0>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			qca,no-eeprom;
+			qca,disable-5ghz;
+			mtd-mac-address = <&ath9k_cal 0xf100>;
+			mtd-mac-address-increment = <2>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VG3503J.dts

@@ -0,0 +1,163 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9";
+	model = "BT OpenReach VDSL Modem";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+	};
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			ranges = <0 0 0x0 0x3ffffff>;
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x20000>;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x20000 0x7d0000>;
+					};
+
+					partition@7f0000 {
+						label = "uboot-env";
+						reg = <0x7f0000 0x10000>;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led0", "gphy0 led1",
+							"gphy0 led2", "gphy1 led0",
+							"gphy1 led1", "gphy1 led2";
+					lantiq,function = "gphy";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy11g_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy11g_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_red: power2 {
+			label = "vg3503j:red:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "vg3503j:green:dsl";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power {
+			label = "vg3503j:green:power";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+	};
+};
+
+&eth0 {
+	interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		lantiq,switch;
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "mii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+			lantiq,led1h = <0x70>;
+			lantiq,led1l = <0x00>;
+			lantiq,led2h = <0x00>;
+			lantiq,led2l = <0x03>;
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+			lantiq,led1h = <0x70>;
+			lantiq,led1l = <0x00>;
+			lantiq,led2h = <0x00>;
+			lantiq,led2l = <0x03>;
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22.dtsi

@@ -0,0 +1,253 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &internet_green;
+		led-wifi = &wifi;
+	};
+
+	sram@1F000000 {
+		vmmc@107000 {
+			status = "okay";
+			gpios = <&gpio 30 GPIO_ACTIVE_HIGH  //fxs relay
+					 &gpio 31 GPIO_ACTIVE_HIGH  //still unknown
+					 &gpio 3  GPIO_ACTIVE_HIGH>; //reset_slic?
+		};
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x1000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					boardconfig: partition@fe0000 {
+						label = "board_config";
+						reg = <0xfe0000 0x20000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				gphy-leds {
+					lantiq,groups = "gphy0 led0", "gphy0 led1",
+							"gphy1 led0", "gphy1 led1";
+					lantiq,function = "gphy";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <2>;
+					lantiq,output = <1>;
+				};
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				pci-rst {
+					lantiq,pins = "io21";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
+		};
+
+		pcie@d900000 {
+			status = "disabled";
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy22f_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy22f_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl: dsl {
+			label = "vgv7510kw22:green:dsl";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+
+		internet_red {
+			label = "vgv7510kw22:red:internet";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		info_red {
+			label = "vgv7510kw22:red:info";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+
+		power_green: power {
+			label = "vgv7510kw22:green:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+
+		info_green {
+			label = "vgv7510kw22:green:info";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		internet_green: internet_green {
+			label = "vgv7510kw22:green:internet";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi: wifi {
+			label = "vgv7510kw22:green:wlan";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+
+		power_red: power2 {
+			label = "vgv7510kw22:red:power";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+		};
+
+		phone {
+			label = "vgv7510kw22:green:telefon";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@1814,3592 {
+		compatible = "pci1814,3592";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <1>;
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&boardconfig 0x16>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "mii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "mii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <3>;
+			phy-mode = "mii";
+			phy-handle = <&phy12>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "mii";
+			phy-handle = <&phy14>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy12: ethernet-phy@12 {
+			reg = <0x12>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy14: ethernet-phy@14 {
+			reg = <0x14>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22BRN.dts

@@ -0,0 +1,67 @@
+/dts-v1/;
+
+#include "VGV7510KW22.dtsi"
+
+/ {
+	compatible = "arcadyan,vgv7510kw22-brn", "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9";
+	model = "o2 Box 6431";
+
+	sram@1F000000 {
+		cgu@103000 {
+			lantiq,phy-clk-src = <0x2>;
+		};
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				partitions {
+					partition@0 {
+						label = "Boot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "Configuration";
+						reg = <0x40000 0x40000>;
+						read-only;
+					};
+
+					partition@80000 {
+						label = "Certificate";
+						reg = <0x80000 0x20000>;
+						read-only;
+					};
+
+					partition@a0000 {
+						label = "Special_Area";
+						reg = <0xa0000 0x20000>;
+						read-only;
+					};
+
+					partition@c0000 {
+						compatible = "brnboot,root-selector";
+						label = "Primary_Setting";
+						reg = <0xc0000 0x20000>;
+						read-only;
+					};
+
+					partition@e0000 {
+						label = "Code_Image_0";
+						reg = <0xe0000 0x780000>;
+						brnboot,root-id = <0x00>;
+						read-only;
+					};
+
+					partition@860000 {
+						label = "Code_Image_1";
+						reg = <0x860000 0x780000>;
+						brnboot,root-id = <0x01>;
+						read-only;
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22NOR.dts

@@ -0,0 +1,33 @@
+/dts-v1/;
+
+#include "VGV7510KW22.dtsi"
+
+/ {
+	compatible = "arcadyan,vgv7510kw22-nor", "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9";
+	model = "o2 Box 6431";
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				partitions {
+					partition@0 {
+						label = "uboot";
+						reg = <0x0 0x60000>; /* 384 KiB */
+						read-only;
+					};
+
+					partition@60000 {
+						label = "uboot-env";
+						reg = <0x60000 0x20000>; /* 128 KiB */
+						read-only;
+					};
+
+					partition@80000 {
+						label = "firmware";
+						reg = <0x80000 0xf60000>; /* 15744 KiB */
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519.dtsi

@@ -0,0 +1,298 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &broadband_green;
+		led-internet = &internet_green;
+		led-wifi = &wireless_green;
+	};
+
+	sram@1F000000 {
+	        vmmc@107000 {
+	                status = "okay";
+	                gpios = <&gpio 30 GPIO_ACTIVE_HIGH  //fxs relay
+	                         &gpio 31 GPIO_ACTIVE_HIGH  //still unknown
+	                         &gpio 3  GPIO_ACTIVE_HIGH>; //reset_slic?
+	        };
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x800000>, <1 0x800000 0x800000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					boardconfig: partition@40000 {
+						label = "board_config";
+						reg = <0x40000 0x10000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+					lantiq,pull = <0>;
+				};
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				pci-rst {
+					lantiq,pins = "io21";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led1", "gphy1 led0";
+					lantiq,function = "gphy";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		stp: stp@E100BB0 {
+			compatible = "lantiq,gpio-stp-xway";
+			reg = <0xE100BB0 0x40>;
+			#gpio-cells = <2>;
+			gpio-controller;
+
+			lantiq,shadow = <0xffff>;
+			lantiq,groups = <0x3>;
+			lantiq,dsl = <0x0>;
+			lantiq,phy1 = <0x0>;
+			lantiq,phy2 = <0x0>;
+			/* lantiq,rising; */
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+		};
+
+		pcie@d900000 {
+			status = "disabled";
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware1 = "lantiq/xrx200_phy11g_a14.bin";	/*VR9 1.1*/
+		firmware2 = "lantiq/xrx200_phy11g_a22.bin";	/*VR9 1.2*/
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		eco {
+			label = "eco";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		eco {
+			label = "vgv7519:blue:eco";
+			gpios = <&stp 2 GPIO_ACTIVE_LOW>;
+		};
+		wps_red {
+			label = "vgv7519:red:wps";
+			gpios = <&stp 3 GPIO_ACTIVE_LOW>;
+		};
+		wps_green {
+			label = "vgv7519:green:wps";
+			gpios = <&stp 4 GPIO_ACTIVE_LOW>;
+		};
+		upgrade {
+			label = "vgv7519:blue:upgrade";
+			gpios = <&stp 5 GPIO_ACTIVE_LOW>;
+		};
+		tv {
+			label = "vgv7519:green:tv";
+			gpios = <&stp 6 GPIO_ACTIVE_LOW>;
+		};
+		internet_green: internet_green {
+			label = "vgv7519:green:internet";
+			gpios = <&stp 7 GPIO_ACTIVE_LOW>;
+		};
+		internet_red {
+			label = "vgv7519:red:internet";
+			gpios = <&stp 8 GPIO_ACTIVE_LOW>;
+		};
+		broadband_red {
+			label = "vgv7519:red:broadband";
+			gpios = <&stp 9 GPIO_ACTIVE_LOW>;
+		};
+		broadband_green: broadband_green {
+			label = "vgv7519:green:broadband";
+			gpios = <&stp 10 GPIO_ACTIVE_LOW>;
+		};
+		voice {
+			label = "vgv7519:green:voice";
+			gpios = <&stp 11 GPIO_ACTIVE_LOW>;
+		};
+		wireless_red {
+			label = "vgv7519:red:wireless";
+			gpios = <&stp 12 GPIO_ACTIVE_LOW>;
+		};
+		wireless_green: wireless_green {
+			label = "vgv7519:green:wireless";
+			gpios = <&stp 13 GPIO_ACTIVE_LOW>;
+		};
+		power_green: power2 {
+			label = "vgv7519:green:power";
+			gpios = <&stp 14 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power {
+			label = "vgv7519:red:power";
+			gpios = <&stp 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pci0 {
+	status = "okay";
+	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
+	wifi@1814,3091 {
+		compatible = "pci1814,3091";
+		reg = <0x7000 0 0 0 0>;
+		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		ralink,mtd-eeprom-swap;
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <1>;
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&boardconfig 0x16>;
+		mtd-mac-address-increment = <1>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519BRN.dts

@@ -0,0 +1,73 @@
+/dts-v1/;
+
+
+#include "VGV7519.dtsi"
+
+/ {
+	compatible = "arcadyan,vgv7519-brn", "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9";
+	model = "KPN Experiabox V8";
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				partitions {
+					partition@0 {
+						label = "Boot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@50000 {
+						label = "Certificate";
+						reg = <0x50000 0x10000>;
+						read-only;
+					};
+					partition@60000 {
+						label = "Special_Area";
+						reg = <0x60000 0x10000>;
+						read-only;
+					};
+
+					partition@70000 {
+						label = " Reserve_0";
+						reg = <0x70000 0x10000>;
+						read-only;
+					};
+
+					partition@80000 {
+						label = "Code_Image_0";
+						reg = <0x80000 0x780000>;
+						brnboot,root-id = <0x00>;
+						read-only;
+					};
+
+					partition@4000000 {
+						compatible = "brnboot,root-selector";
+						label = "Primary_Setting";
+						reg = <0x4000000 0x10000>;
+						read-only;
+					};
+
+					partition@4010000 {
+						label = "Configuration";
+						reg = <0x4010000 0x60000>;
+						read-only;
+					};
+
+					partition@4070000 {
+						label = " Reserve_1";
+						reg = <0x4070000 0x10000>;
+						read-only;
+					};
+
+					partition@4080000 {
+						label = "Code_Image_1";
+						reg = <0x4080000 0x780000>;
+						brnboot,root-id = <0x01>;
+						read-only;
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519NOR.dts

@@ -0,0 +1,32 @@
+/dts-v1/;
+
+
+#include "VGV7519.dtsi"
+
+/ {
+	compatible = "arcadyan,vgv7519-nor", "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9";
+	model = "KPN Experiabox V8";
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				partitions {
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+					partition@60000 {
+						label = "uboot_env";
+						reg = <0x60000 0x10000>;
+						read-only;
+					};
+					partition@80000 {
+						label = "firmware";
+						reg = <0x80000 0xf80000>;
+					};
+				};
+			};
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/VR200v.dts

@@ -0,0 +1,283 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,vr200v", "lantiq,xway", "lantiq,vr9";
+	model = "TP-LINK Archer VR200v";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+
+		led-dsl = &dsl;
+		led-internet = &internet;
+		led-usb = &usb;
+		led-usb2 = &usb;
+	};
+
+	memory@0 {
+		reg = <0x0 0x7f00000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led1", "gphy1 led1";
+					lantiq,function = "gphy";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				phy-rst {
+					lantiq,pins = "io42";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci0: pci@E105400 {
+			status = "okay";
+			gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy11g_a22.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RFKILL>;
+			linux,input-type = <EV_SW>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		dect_paging {
+			label = "dect_paging";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_PHONE>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		power: power {
+			label = "vr200v:blue:power";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "vr200v:blue:dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+		internet: internet {
+			label = "vr200v:blue:internet";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "vr200v:blue:usb";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+		};
+		eth {
+			label = "vr200v:blue:lan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+		wlan {
+			label = "vr200v:blue:wlan";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+		};
+		wlan5g {
+			label = "vr200v:blue:wlan5g";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+		phone {
+			label = "vr200v:blue:phone";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <33250000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "u-boot";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0xf90000>;
+				label = "firmware";
+			};
+
+			partition@fb0000 {
+				reg = <0xfb0000 0x10000>;
+				label = "radioDECT";
+				read-only;
+			};
+
+			partition@fc0000 {
+				reg = <0xfc0000 0x10000>;
+				label = "config";
+				read-only;
+			};
+
+			romfile: partition@fd0000 {
+				reg = <0xfd0000 0x10000>;
+				label = "romfile";
+				read-only;
+			};
+
+			partition@fe0000 {
+				reg = <0xfe0000 0x10000>;
+				label = "rom";
+				read-only;
+			};
+
+			partition@ff0000 {
+				reg = <0xff0000 0x10000>;
+				label = "radio";
+				read-only;
+			};
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		mtd-mac-address = <&romfile 0xf100>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+			// gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR.dts

@@ -0,0 +1,185 @@
+/dts-v1/;
+
+#include "ar9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "buffalo,wbmr-hp-g300h", "lantiq,xway", "lantiq,ar9";
+	model = "Buffalo WBMR-HP-G300H";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+
+		led-dsl = &dsl;
+		led-internet = &online_green;
+		led-usb = &usb;
+		led-wifi = &wifi;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		localbus@0 {
+			nor-boot@0 {
+				compatible = "lantiq,nor";
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "uboot";
+						reg = <0x00000 0x40000>;
+						read-only;
+					};
+
+					partition@40000 {
+						label = "uboot_env";
+						reg = <0x40000 0x20000>;
+						read-only;
+					};
+
+					partition@20000 {
+						label = "firmware";
+						reg = <0x60000 0x1f20000>;
+					};
+
+					boardconfig: partition@1fc0000 {
+						label = "board";
+						reg = <0x1fc0000 0x20000>;
+						read-only;
+					};
+
+					partition@1fe0000 {
+						label = "calibration";
+						reg = <0x1fe0000 0x20000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				pci-in {
+					lantiq,groups = "req1";
+					lantiq,output = <0>;
+					lantiq,open-drain = <1>;
+					lantiq,pull = <2>;
+				};
+				pci-out {
+					lantiq,groups = "gnt1";
+					lantiq,output = <1>;
+					lantiq,pull = <0>;
+				};
+				pci_rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		etop@E180000 {
+			phy-mode = "rgmii";
+			mtd-mac-address = <&boardconfig 0x10024>;
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci@E105400 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		eject {
+			label = "eject";
+			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_EJECTCD>;
+		};
+		movie {
+			label = "movie";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_VIDEO>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green: power {
+			label = "wbmr:green:power";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+		power_red: power2 {
+			label = "wbmr:red:power";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+		security {
+			label = "wbmr:yellow:security";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+		wifi: wifi {
+			label = "wbmr:green:wireless";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+		dsl: dsl {
+			label = "wbmr:green:dsl";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+		online_green: online {
+			label = "wbmr:green:internet";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+		};
+		online2 {
+			label = "wbmr:red:internet";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+		movie {
+			label = "wbmr:blue:movie";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+		usb: usb {
+			label = "wbmr:green:usb";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR300.dts

@@ -0,0 +1,306 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "buffalo,wbmr-300hpd", "lantiq,xway", "lantiq,vr9";
+	model = "Buffalo WBMR-300HPD";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_g;
+		led-failsafe = &diag_r;
+		led-running = &power_g;
+
+		led-dsl = &dsl;
+		led-internet = &router_g;
+		led-wifi = &wifi_g;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	fpi@10000000 {
+		gpio: pinmux@E100B10 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				phy-rst {
+					lantiq,pins = "io42";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pcie-rst {
+					lantiq,pins = "io38";
+					lantiq,pull = <0>;
+					lantiq,output = <1>;
+				};
+			};
+			pins_spi_default: pins_spi_default {
+				spi_in {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				spi_out {
+					lantiq,groups = "spi_do", "spi_clk",
+						"spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+			lantiq,portmask = <0x3>;
+		};
+
+		ifxhcd@E106000 {
+			status = "okay";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/xrx200_phy22f_a22.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio_poweroff {
+		compatible = "gpio-poweroff";
+		gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		power {
+			label = "power";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		auto {
+			label = "auto";
+			gpios = <&gpio 48 GPIO_ACTIVE_HIGH>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		router {
+			label = "router";
+			gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+			linux,code = <BTN_1>;
+			linux,input-type = <EV_SW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		diag_r: diag_r {
+			label = "wbmr300:red:diag";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+			default_state = "off";
+		};
+
+		wifi_g: wifi_g {
+			label = "wbmr300:green:wifi";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		dsl: dsl {
+			label = "dsl";
+			gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
+		};
+
+		router_y: router_y {
+			label = "wbmr300:yellow:router";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		wifi_y: wifi_y {
+			label = "wbmr300:yellow:wifi";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		lan1: lan1 {
+			label = "wbmr300:green:lan1";
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan: wan {
+			label = "wbmr300:green:wan";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		lan3: lan3 {
+			label = "wbmr300:green:lan3";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		lan2: lan2 {
+			label = "wbmr300:green:lan2";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+
+		internet_g: internet_g {
+			label = "wbmr300:green:internet";
+			gpios = <&gpio 34 GPIO_ACTIVE_HIGH>;
+		};
+
+		internet_y: internet_y {
+			label = "wbmr300:yellow:internet";
+			gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
+		};
+
+		router_g: router_g {
+			label = "wbmr300:green:router";
+			gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_g: power_g {
+			label = "wbmr300:green:power";
+			gpios = <&gpio 49 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	status = "ok";
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <20000000>;
+
+		partition@0 {
+			reg = <0x0 0x10000>;
+			label = "u-boot";
+			read-only;
+		};
+
+		partition@10000 {
+			reg = <0x10000 0x10000>;
+			label = "gphyfirmware";
+			read-only;
+		};
+
+		partition@20000 {
+			reg = <0x20000 0x80000>;
+			label = "dsl_fw";
+		};
+
+		partition@de0000 {
+			reg = <0xa0000 0xf40000>;
+			label = "firmware";
+		};
+
+		partition@fe0000 {
+			reg = <0xfe0000 0x10000>;
+			label = "sysconfig";
+			read-only;
+		};
+
+		partition@ff0000 {
+			reg = <0xff0000 0x2000>;
+			label = "ubootconfig";
+		};
+
+		partition@ff3000 {
+			reg = <0xff3000 0x2000>;
+			label = "board_config";
+			read-only;
+		};
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		lantiq,switch;
+
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "mii";
+			phy-handle = <&phy14>;
+		};
+		ethernet@3 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "mii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <3>;
+			phy-mode = "mii";
+			phy-handle = <&phy12>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy12: ethernet-phy@12 {
+			reg = <0x12>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+		phy14: ethernet-phy@14 {
+			reg = <0x14>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/amazonse.dtsi

@@ -0,0 +1,174 @@
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,xway", "lantiq,ase";
+
+	aliases {
+		serial0 = &asc1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips4Kc";
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+	};
+
+	biu@1F800000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,biu", "simple-bus";
+		reg = <0x1F800000 0x800000>;
+		ranges = <0x0 0x1F800000 0x7FFFFF>;
+
+		icu0: icu@80200 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,icu";
+			reg = <0x80200 0x28
+				0x80228 0x28
+				0x80250 0x28
+				0x80278 0x28
+				0x802a0 0x28>;
+		};
+
+		watchdog@803F0 {
+			compatible = "lantiq,wdt";
+			reg = <0x803F0 0x10>;
+		};
+	};
+
+	sram@1F000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,sram", "simple-bus";
+		reg = <0x1F000000 0x800000>;
+		ranges = <0x0 0x1F000000 0x7FFFFF>;
+
+		eiu0: eiu@101000 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,eiu-xway";
+			reg = <0x101000 0x1000>;
+			interrupt-parent = <&icu0>;
+			lantiq,eiu-irqs = <29 30 31>;
+		};
+
+		pmu0: pmu@102000 {
+			compatible = "lantiq,pmu-xway";
+			reg = <0x102000 0x1000>;
+		};
+
+		cgu0: cgu@103000 {
+			compatible = "lantiq,cgu-xway";
+			reg = <0x103000 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		rcu0: rcu@203000 {
+			compatible = "lantiq,rcu-xway";
+			reg = <0x203000 0x1000>;
+		};
+	};
+
+	fpi@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		ranges = <0x0 0x10000000 0xEEFFFFF>;
+		reg = <0x10000000 0xEF00000>;
+
+		localbus@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
+				1 0 0x4000000 0x4000010>; /* addsel1 */
+			compatible = "lantiq,localbus", "simple-bus";
+		};
+
+		spi@E100800 {
+			compatible = "lantiq,ase-spi";
+			reg = <0xE100800 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <24 25 26>;
+			interrupt-names = "spi_rx", "spi_tx", "spi_err",
+					"spi_frm";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
+
+		gptu@E100A00 {
+			compatible = "lantiq,gptu-xway";
+			reg = <0xE100A00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <33 34 35 36 37 38>;
+		};
+
+		gpio: pinmux@E100B10 {
+			compatible = "lantiq,ase-pinctrl";
+			#gpio-cells = <2>;
+			gpio-controller;
+			reg = <0xE100B10 0xA0>;
+		};
+
+		asc1: serial@E100C00 {
+			compatible = "lantiq,asc";
+			reg = <0xE100C00 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <72 74 75>;
+		};
+
+		mei@E116000 {
+			compatible = "lantiq,mei-xway";
+			interrupt-parent = <&icu0>;
+			interrupts = <81>;
+		};
+
+		ifxhcd@E101000 {
+			compatible = "lantiq,ase-usb", "lantiq,ifxhcd-ase";
+			reg = <0xE101000 0x1000
+				0xE120000 0x3f000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <39>;
+			dr_mode = "host";
+			status = "disabled";
+		};
+
+		dma0: dma@E104100 {
+			compatible = "lantiq,dma-xway";
+			reg = <0xE104100 0x800>;
+		};
+
+		ebu0: ebu@E105300 {
+			compatible = "lantiq,ebu-xway";
+			reg = <0xE105300 0x100>;
+		};
+
+		ppe@E234000 {
+			compatible = "lantiq,ppe-ase";
+			interrupt-parent = <&icu0>;
+			interrupts = <85>;
+		};
+
+		etop@E180000 {
+			compatible = "lantiq,etop-xway";
+			reg = <0xE180000 0x40000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <105 109>;
+		};
+	};
+
+	adsl {
+		compatible = "lantiq,adsl-ase";
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/ar9.dtsi

@@ -0,0 +1,216 @@
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,xway", "lantiq,ar9";
+
+	aliases {
+		serial0 = &asc1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips34K";
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+	};
+
+	biu@1F800000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,biu", "simple-bus";
+		reg = <0x1F800000 0x800000>;
+		ranges = <0x0 0x1F800000 0x7FFFFF>;
+
+		icu0: icu@80200 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,icu";
+			reg = <0x80200 0x28
+				0x80228 0x28
+				0x80250 0x28
+				0x80278 0x28
+				0x802a0 0x28>;
+		};
+
+		watchdog@803F0 {
+			compatible = "lantiq,wdt";
+			reg = <0x803F0 0x10>;
+		};
+	};
+
+	sram@1F000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,sram", "simple-bus";
+		reg = <0x1F000000 0x800000>;
+		ranges = <0x0 0x1F000000 0x7FFFFF>;
+
+		eiu0: eiu@101000 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,eiu-xway";
+			reg = <0x101000 0x1000>;
+			interrupt-parent = <&icu0>;
+			lantiq,eiu-irqs = <166 135 66 40 41 42>;
+		};
+
+		pmu0: pmu@102000 {
+			compatible = "lantiq,pmu-xway";
+			reg = <0x102000 0x1000>;
+		};
+
+		cgu0: cgu@103000 {
+			compatible = "lantiq,cgu-xway";
+			reg = <0x103000 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		rcu0: rcu@203000 {
+			compatible = "lantiq,rcu-xway";
+			reg = <0x203000 0x1000>;
+		};
+	};
+
+	fpi@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		ranges = <0x0 0x10000000 0xEEFFFFF>;
+		reg = <0x10000000 0xEF00000>;
+
+		localbus@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
+				1 0 0x4000000 0x4000010>; /* addsel1 */
+			compatible = "lantiq,localbus", "simple-bus";
+		};
+
+		gptu@E100A00 {
+			compatible = "lantiq,gptu-xway";
+			reg = <0xE100A00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <126 127 128 129 130 131>;
+		};
+
+		asc0: serial@E100400 {
+			compatible = "lantiq,asc";
+			reg = <0xE100400 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <104 105 106>;
+			status = "disabled";
+		};
+
+		spi: spi@E100800 {
+			compatible = "lantiq,xrx100-spi";
+			reg = <0xE100800 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <22 23 24>;
+			interrupt-names = "spi_rx", "spi_tx", "spi_err",
+					"spi_frm";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
+
+		gpio: pinmux@E100B10 {
+			compatible = "lantiq,xrx100-pinctrl";
+			#gpio-cells = <2>;
+			gpio-controller;
+			reg = <0xE100B10 0xA0>;
+		};
+
+		asc1: serial@E100C00 {
+			compatible = "lantiq,asc";
+			reg = <0xE100C00 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <112 113 114>;
+		};
+
+		ifxhcd@E101000 {
+			compatible = "lantiq,arx100-usb", "lantiq,ifxhcd-arx100";
+			reg = <0xE101000 0x1000
+				0xE120000 0x3f000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <62 91>;
+			dr_mode = "host";
+			status = "disabled";
+		};
+
+		ifxhcd@E106000 {
+			compatible = "lantiq,arx100-usb";
+			reg = <0xE106000 0x1000
+				0xE1E0000 0x3f000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <91>;
+			dr_mode = "host";
+			status = "disabled";
+		};
+
+		deu@E103100 {
+			compatible = "lantiq,deu-arx100";
+			reg = <0xE103100 0xf00>;
+		};
+
+		dma0: dma@E104100 {
+			compatible = "lantiq,dma-xway";
+			reg = <0xE104100 0x800>;
+		};
+
+		ebu0: ebu@E105300 {
+			compatible = "lantiq,ebu-xway";
+			reg = <0xE105300 0x100>;
+		};
+
+		mei@E116000 {
+			compatible = "lantiq,mei-xway";
+			interrupt-parent = <&icu0>;
+			interrupts = <63>;
+		};
+
+		etop@E180000 {
+			compatible = "lantiq,etop-xway";
+			reg = <0xE180000 0x40000
+				0xE108000 0x200>;
+			interrupt-parent = <&icu0>;
+			interrupts = <73 72>;
+			mac-address = [ 00 11 22 33 44 55 ];
+		};
+
+		ppe@E234000 {
+			compatible = "lantiq,ppe-arx100";
+			interrupt-parent = <&icu0>;
+			interrupts = <96>;
+		};
+
+		pci0: pci@E105400 {
+			status = "disabled";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			compatible = "lantiq,pci-xway";
+			bus-range = <0x0 0x0>;
+			ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000	/* pci memory */
+				  0x1000000 0 0x00000000 0xAE00000 0 0x200000>;	/* io space */
+			reg = <0x7000000 0x8000		/* config space */
+				0xE105400 0x400>;	/* pci bridge */
+			lantiq,bus-clock = <33333333>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
+			req-mask = <0x1>;
+		};
+	};
+
+	adsl {
+		compatible = "lantiq,adsl-arx100";
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/danube.dtsi

@@ -0,0 +1,212 @@
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,xway", "lantiq,danube";
+
+	aliases {
+		serial0 = &asc1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips24Kc";
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+	};
+
+	biu@1F800000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,biu", "simple-bus";
+		reg = <0x1F800000 0x800000>;
+		ranges = <0x0 0x1F800000 0x7FFFFF>;
+
+		icu0: icu@80200 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,icu";
+			reg = <0x80200 0x28
+				0x80228 0x28
+				0x80250 0x28
+				0x80278 0x28
+				0x802a0 0x28>;
+		};
+
+		watchdog@803F0 {
+			compatible = "lantiq,wdt";
+			reg = <0x803F0 0x10>;
+		};
+	};
+
+	sram@1F000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,sram", "simple-bus";
+		reg = <0x1F000000 0x800000>;
+		ranges = <0x0 0x1F000000 0x7FFFFF>;
+
+		eiu0: eiu@101000 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,eiu-xway";
+			reg = <0x101000 0x1000>;
+			interrupt-parent = <&icu0>;
+			lantiq,eiu-irqs = <166 135 66>;
+		};
+
+		pmu0: pmu@102000 {
+			compatible = "lantiq,pmu-xway";
+			reg = <0x102000 0x1000>;
+		};
+
+		cgu0: cgu@103000 {
+			compatible = "lantiq,cgu-xway";
+			reg = <0x103000 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		vmmc@107000 {
+			status = "disabled";
+			compatible = "lantiq,vmmc-xway";
+			reg = <0x103000 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <150 151 152 153 154 155>;
+		};
+
+		rcu0: rcu@203000 {
+			compatible = "lantiq,rcu-xway";
+			reg = <0x203000 0x1000>;
+		};
+	};
+
+	fpi@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		ranges = <0x0 0x10000000 0xEEFFFFF>;
+		reg = <0x10000000 0xEF00000>;
+
+		localbus@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
+				1 0 0x4000000 0x4000010>; /* addsel1 */
+			compatible = "lantiq,localbus", "simple-bus";
+		};
+
+		gptu@E100A00 {
+			compatible = "lantiq,gptu-xway";
+			reg = <0xE100A00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <126 127 128 129 130 131>;
+		};
+
+		gpios: stp@E100BB0 {
+			#gpio-cells = <2>;
+			compatible = "lantiq,gpio-stp-xway";
+			gpio-controller;
+			reg = <0xE100BB0 0x40>;
+			lantiq,shadow = <0xfff>;
+			lantiq,groups = <0x3>;
+			status = "disabled";
+		};
+
+		asc0: serial@E100400 {
+			compatible = "lantiq,asc";
+			reg = <0xE100400 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <104 105 106>;
+			status = "disabled";
+		};
+
+		gpio: pinmux@E100B10 {
+			compatible = "lantiq,danube-pinctrl";
+			#gpio-cells = <2>;
+			gpio-controller;
+			reg = <0xE100B10 0xA0>;
+		};
+
+		asc1: serial@E100C00 {
+			compatible = "lantiq,asc";
+			reg = <0xE100C00 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <112 113 114>;
+		};
+
+		ifxhcd@E101000 {
+			compatible = "lantiq,danube-usb", "lantiq,ifxhcd-danube";
+			reg = <0xE101000 0x1000
+				0xE120000 0x3f000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <62>;
+			dr_mode = "host";
+			status = "disabled";
+		};
+
+		deu@E103100 {
+			compatible = "lantiq,deu-danube";
+			reg = <0xE103100 0xf00>;
+		};
+
+		dma0: dma@E104100 {
+			compatible = "lantiq,dma-xway";
+			reg = <0xE104100 0x800>;
+		};
+
+		ebu0: ebu@E105300 {
+			compatible = "lantiq,ebu-xway";
+			reg = <0xE105300 0x100>;
+		};
+
+		mei@E116000 {
+			compatible = "lantiq,mei-xway";
+			interrupt-parent = <&icu0>;
+			interrupts = <63>;
+		};
+
+		etop@E180000 {
+			compatible = "lantiq,etop-xway";
+			reg = <0xE180000 0x40000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <73 78>;
+			mac-address = [ 00 11 22 33 44 55 ];
+		};
+
+		ppe@E234000 {
+			compatible = "lantiq,ppe-danube";
+			interrupt-parent = <&icu0>;
+			interrupts = <96>;
+		};
+
+		pci0: pci@E105400 {
+			status = "disabled";
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			compatible = "lantiq,pci-xway";
+			bus-range = <0x0 0x0>;
+			ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000	/* pci memory */
+				  0x1000000 0 0x00000000 0xAE00000 0 0x200000>;	/* io space */
+			reg = <0x7000000 0x8000		/* config space */
+				0xE105400 0x400>;	/* pci bridge */
+			lantiq,bus-clock = <33333333>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
+			req-mask = <0x1>; /* GNT1 */
+		};
+	};
+
+	adsl {
+		compatible = "lantiq,adsl-danube";
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon-sflash-16M.dtsi

@@ -0,0 +1,37 @@
+
+&ebu_cs0 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,sflash-falcon", "simple-bus";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl129p0", "spansion,s25fl129p1";
+		reg = <0 0>;
+		linux,mtd-name = "sflash";
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partition@0 {
+			reg = <0x0 0x40000>;
+			label = "uboot";
+			read-only;
+		};
+
+		partition@40000 {
+			reg = <0x40000 0x80000>;
+			label = "uboot_env";
+		};
+
+		partition@C0000 {
+			reg = <0xC0000 0x740000>;
+			label = "image0";
+		};
+
+		partition@800000 {
+			reg = <0x800000 0x800000>;
+			label = "image1";
+		};
+	};
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon.dtsi

@@ -0,0 +1,392 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,falcon";
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips34kc";
+		};
+	};
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		gpio4 = &gpio4;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		compatible = "simple-bus";
+
+		cpu_clk: cpu {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <400000000>;
+			clock-output-names = "cpu";
+		};
+
+		io_clk: io {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+			clock-output-names = "io";
+		};
+
+		fpi_clk: fpi {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <100000000>;
+			clock-output-names = "fpi";
+		};
+	};
+
+	ebu_cs0: localbus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,localbus", "simple-bus";
+		reg = <0x10000000 0x4000000>;
+		ranges = <0x0 0x10000000 0x4000000>;
+	};
+	ebu_cs1: localbus@14000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,localbus", "simple-bus";
+		reg = <0x14000000 0x4000000>;
+		ranges = <0x0 0x14000000 0x4000000>;
+	};
+
+	ebu@18000000 {
+		compatible = "lantiq,ebu-falcon";
+		reg = <0x18000000 0x100>;
+	};
+
+	sbs2@1D000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,sysb2", "simple-bus";
+		reg = <0x1D000000 0x1000000>;
+		ranges = <0x0 0x1D000000 0x1000000>;
+
+		clock_sysgpe: clock-controller@700000 {
+			compatible = "lantiq,sysgpe-falcon";
+			reg = <0x700000 0x100>;
+			#clock-cells = <1>;
+		};
+
+		mps@4000 {
+			compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
+			reg = <0x4000 0x1000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <154 155>;
+			lantiq,mbx = <&mpsmbx>;
+		};
+
+		gpio0: gpio@810000 {
+			compatible = "lantiq,falcon-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&icu0>;
+			interrupts = <44>;
+			reg = <0x810000 0x80>;
+			clocks = <&clock_syseth 16>;
+		};
+
+		gpio2: gpio@810100 {
+			compatible = "lantiq,falcon-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&icu0>;
+			interrupts = <46>;
+			reg = <0x810100 0x80>;
+			clocks = <&clock_syseth 17>;
+		};
+
+		clock_syseth: clock-controller@B00000 {
+			compatible = "lantiq,syseth-falcon";
+			reg = <0xB00000 0x100>;
+			#clock-cells = <1>;
+		};
+
+		pad@B01000 {
+			compatible = "lantiq,pad-falcon";
+			reg = <0xB01000 0x100>;
+			lantiq,bank = <0>;
+			clocks = <&clock_syseth 20>;
+		};
+
+		pad@B02000 {
+			compatible = "lantiq,pad-falcon";
+			reg = <0xB02000 0x100>;
+			lantiq,bank = <2>;
+			clocks = <&clock_syseth 21>;
+		};
+	};
+
+	fpi@1E000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		reg = <0x1E000000 0x1000000>;
+		ranges = <0x0 0x1E000000 0x1000000>;
+
+		serial1: serial@100B00 {
+			status = "disabled";
+			compatible = "lantiq,asc";
+			reg = <0x100B00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <112 113 114>;
+			line = <1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&asc1_pins>;
+			clocks = <&clock_sys1 11>;
+		};
+
+		serial0: serial@100C00 {
+			compatible = "lantiq,asc";
+			reg = <0x100C00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <104 105 106>;
+			line = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&asc0_pins>;
+			clocks = <&clock_sys1 12>;
+		};
+
+		spi: spi@100D00 {
+			status = "disabled";
+			compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
+			interrupts = <22 23 24 25>;
+			interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x100D00 0x100>;
+			interrupt-parent = <&icu0>;
+			clocks = <&clock_sys1 13>;
+			base_cs = <1>;
+			num_cs = <2>;
+		};
+
+		gptc@100E00 {
+			compatible = "lantiq,gptc-falcon";
+			reg = <0x100E00 0x100>;
+		};
+
+		i2c: i2c@200000 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "lantiq,lantiq-i2c";
+			reg = <0x200000 0x10000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <18 19 20 21>;
+			gpios = <&gpio1 7 0 &gpio1 8 0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c_pins>;
+			clocks = <&clock_sys1 14>;
+		};
+
+		gpio1: gpio@800100 {
+			compatible = "lantiq,falcon-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&icu0>;
+			interrupts = <45>;
+			reg = <0x800100 0x100>;
+			clocks = <&clock_sys1 16>;
+		};
+
+		gpio3: gpio@800200 {
+			compatible = "lantiq,falcon-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&icu0>;
+			interrupts = <47>;
+			reg = <0x800200 0x100>;
+			clocks = <&clock_sys1 17>;
+		};
+
+		gpio4: gpio@800300 {
+			compatible = "lantiq,falcon-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&icu0>;
+			interrupts = <48>;
+			reg = <0x800300 0x100>;
+			clocks = <&clock_sys1 18>;
+		};
+
+		pad@800400 {
+			compatible = "lantiq,pad-falcon";
+			reg = <0x800400 0x100>;
+			lantiq,bank = <1>;
+			clocks = <&clock_sys1 20>;
+		};
+
+		pad@800500 {
+			compatible = "lantiq,pad-falcon";
+			reg = <0x800500 0x100>;
+			lantiq,bank = <3>;
+			clocks = <&clock_sys1 21>;
+		};
+
+		pad@800600 {
+			compatible = "lantiq,pad-falcon";
+			reg = <0x800600 0x100>;
+			lantiq,bank = <4>;
+			clocks = <&clock_sys1 22>;
+		};
+
+		status@802000 {
+			compatible = "lantiq,status-falcon";
+			reg = <0x802000 0x80>;
+		};
+
+		clock_sys1: clock-controller@F00000 {
+			compatible = "lantiq,sys1-falcon";
+			reg = <0xF00000 0x100>;
+			#clock-cells = <1>;
+		};
+	};
+
+	sbs0@1F000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		reg = <0x1F000000 0x400000>;
+		ranges = <0x0 0x1F000000 0x400000>;
+
+		mpsmbx: mpsmbx@200000 {
+			reg = <0x200000 0x200>;
+		};
+	};
+
+	sbs1@1F700000 {
+
+	};
+
+	biu@1F800000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,biu", "simple-bus";
+		reg = <0x1F800000 0x800000>;
+		ranges = <0x0 0x1F800000 0x800000>;
+
+		icu0: icu@80200 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,icu";
+			reg = <0x80200 0x28
+				0x80228 0x28
+				0x80250 0x28
+				0x80278 0x28
+				0x802a0 0x28>;
+		};
+
+		watchdog@803F0 {
+			compatible = "lantiq,wdt";
+			reg = <0x803F0 0x10>;
+			clocks = <&io_clk>; /* currently no effect */
+		};
+	};
+
+	pinctrl {
+		compatible = "lantiq,pinctrl-falcon";
+		pinctrl-names = "default";
+		pinctrl-0 = <&state_default>;
+
+		state_default: pinctrl0 {
+			/*ntr {
+				lantiq,groups = "ntr8k";
+				lantiq,function = "ntr";
+			};*/
+			hrst {
+				lantiq,groups = "hrst";
+				lantiq,function = "rst";
+			};
+		};
+
+		asc0_pins: asc0 {
+			asc0 {
+				lantiq,groups = "asc0";
+				lantiq,function = "asc";
+			};
+		};
+		asc1_pins: asc1 {
+			asc1 {
+				lantiq,groups = "asc1";
+				lantiq,function = "asc";
+			};
+		};
+		i2c_pins: i2c {
+			i2c {
+				lantiq,groups = "i2c";
+				lantiq,function = "i2c";
+			};
+		};
+		bootled_pins: bootled {
+			bootled {
+				lantiq,groups = "bootled";
+				lantiq,function = "led";
+			};
+		};
+		ntr_ntr8k: ntr8k {
+			ntr8k {
+				lantiq,groups = "ntr8k";
+				lantiq,function = "ntr";
+			};
+		};
+		ntr_pps: pps {
+			pps {
+				lantiq,groups = "pps";
+				lantiq,function = "ntr";
+			};
+		};
+		ntr_gpio: gpio {
+			gpio {
+				lantiq,pins = "io5";
+				lantiq,mux = <1>;
+				lantiq,output = <0>;
+			};
+		};
+		slic_pins: slic {
+			slic {
+				lantiq,groups = "slic";
+				lantiq,function = "slic";
+			};
+		};
+	};
+
+	pinselect-ntr {
+		compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
+		pinctrl-names = "ntr8k", "pps", "gpio";
+		pinctrl-0 = <&ntr_ntr8k>;
+		pinctrl-1 = <&ntr_pps>;
+		pinctrl-2 = <&ntr_gpio>;
+	};
+
+	pinselect-asc1 {
+		compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
+		pinctrl-names = "default", "asc1";
+		pinctrl-0 = <&slic_pins>;
+		pinctrl-1 = <&asc1_pins>;
+	};
+
+};

target/linux/lantiq/files-4.14/arch/mips/boot/dts/vr9.dtsi

@@ -0,0 +1,260 @@
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "lantiq,xway", "lantiq,vr9";
+
+	aliases {
+		serial0 = &asc1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips34Kc";
+		};
+	};
+
+	memory@0 {
+		device_type = "memory";
+	};
+
+	cputemp@0 {
+		compatible = "lantiq,cputemp";
+	};
+
+	biu@1F800000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,biu", "simple-bus";
+		reg = <0x1F800000 0x800000>;
+		ranges = <0x0 0x1F800000 0x7FFFFF>;
+
+		icu0: icu@80200 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,icu";
+			reg = <0x80200 0x28
+				0x80228 0x28
+				0x80250 0x28
+				0x80278 0x28
+				0x802a0 0x28>;
+		};
+
+		watchdog@803F0 {
+			compatible = "lantiq,wdt";
+			reg = <0x803F0 0x10>;
+		};
+	};
+
+	sram@1F000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,sram", "simple-bus";
+		reg = <0x1F000000 0x800000>;
+		ranges = <0x0 0x1F000000 0x7FFFFF>;
+
+		eiu0: eiu@101000 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			compatible = "lantiq,eiu-xway";
+			reg = <0x101000 0x1000>;
+			interrupt-parent = <&icu0>;
+			lantiq,eiu-irqs = <166 135 66 40 41 42>;
+		};
+
+		pmu0: pmu@102000 {
+			compatible = "lantiq,pmu-xway";
+			reg = <0x102000 0x1000>;
+		};
+
+		cgu0: cgu@103000 {
+			compatible = "lantiq,cgu-xway";
+			reg = <0x103000 0x1000>;
+		};
+
+		dcdc@106a00 {
+			compatible = "lantiq,dcdc-xrx200";
+			reg = <0x106a00 0x200>;
+		};
+
+		vmmc@107000 {
+			status = "disabled";
+			compatible = "lantiq,vmmc-xway";
+			reg = <0x103000 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <150 151 152 153 154 155>;
+		};
+
+		rcu0: rcu@203000 {
+			compatible = "lantiq,rcu-xrx200";
+			reg = <0x203000 0x1000>;
+			/* irq for thermal sensor */
+			interrupt-parent = <&icu0>;
+			interrupts = <115>;
+		};
+
+		xbar0: xbar@400000 {
+			compatible = "lantiq,xbar-xway";
+			reg = <0x400000 0x1000>;
+		};
+	};
+
+	fpi@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		ranges = <0x0 0x10000000 0xEEFFFFF>;
+		reg = <0x10000000 0xEF00000>;
+
+		localbus@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
+				1 0 0x4000000 0x4000010>; /* addsel1 */
+			compatible = "lantiq,localbus", "simple-bus";
+		};
+
+		gptu@E100A00 {
+			compatible = "lantiq,gptu-xway";
+			reg = <0xE100A00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <126 127 128 129 130 131>;
+		};
+
+		asc0: serial@E100400 {
+			compatible = "lantiq,asc";
+			reg = <0xE100400 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <104 105 106>;
+			status = "disabled";
+		};
+
+		spi: spi@E100800 {
+			compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
+			reg = <0xE100800 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <22 23 24>;
+			interrupt-names = "spi_rx", "spi_tx", "spi_err",
+					"spi_frm";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
+
+		gpio: pinmux@E100B10 {
+			compatible = "lantiq,xrx200-pinctrl";
+			#gpio-cells = <2>;
+			gpio-controller;
+			reg = <0xE100B10 0xA0>;
+		};
+
+		asc1: serial@E100C00 {
+			compatible = "lantiq,asc";
+			reg = <0xE100C00 0x400>;
+			interrupt-parent = <&icu0>;
+			interrupts = <112 113 114>;
+		};
+
+		deu@E103100 {
+			compatible = "lantiq,deu-xrx200";
+			reg = <0xE103100 0xf00>;
+		};
+
+		dma0: dma@E104100 {
+			compatible = "lantiq,dma-xway";
+			reg = <0xE104100 0x800>;
+		};
+
+		ebu0: ebu@E105300 {
+			compatible = "lantiq,ebu-xway";
+			reg = <0xE105300 0x100>;
+		};
+
+		ifxhcd@E101000 {
+			status = "disabled";
+			compatible = "lantiq,xrx200-usb", "lantiq,ifxhcd-xrx200";
+			reg = <0xE101000 0x1000
+				0xE120000 0x3f000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <62 91>;
+			dr_mode = "host";
+		};
+
+		ifxhcd@E106000 {
+			status = "disabled";
+			compatible = "lantiq,xrx200-usb";
+			reg = <0xE106000 0x1000>;
+			interrupt-parent = <&icu0>;
+			interrupts = <91>;
+			dr_mode = "host";
+		};
+
+		eth0: eth@E108000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "lantiq,xrx200-net";
+			reg = <	0xE108000 0x3000 /* switch */
+				0xE10B100 0x70 /* mdio */
+				0xE10B1D8 0x30 /* mii */
+				0xE10B308 0x30 /* pmac */
+			>;
+			interrupt-parent = <&icu0>;
+			interrupts = <75 73 72>;
+		};
+
+		mei@E116000 {
+			compatible = "lantiq,mei-xrx200";
+			reg = <0xE116000 0x9c>;
+			interrupt-parent = <&icu0>;
+			interrupts = <63>;
+		};
+
+		ppe@E234000 {
+			compatible = "lantiq,ppe-xrx200";
+			interrupt-parent = <&icu0>;
+			interrupts = <96>;
+		};
+
+		pcie0: pcie@d900000 {
+			compatible = "lantiq,pcie-xrx200";
+
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+
+			interrupt-parent = <&icu0>;
+			interrupts = <161 144>;
+
+			device_type = "pci";
+
+			gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+		};
+
+		pci0: pci@E105400 {
+			status = "disabled";
+
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			compatible = "lantiq,pci-xway";
+			bus-range = <0x0 0x0>;
+			ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
+				0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
+			reg = <0x7000000 0x8000         /* config space */
+				0xE105400 0x400>;       /* pci bridge */
+			lantiq,bus-clock = <33333333>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
+			req-mask = <0x1>; /* GNT1 */
+		};
+	};
+
+	vdsl {
+		compatible = "lantiq,vdsl-vrx200";
+	};
+};

target/linux/lantiq/patches-4.14/0004-MIPS-lantiq-add-atm-hack.patch

@@ -0,0 +1,500 @@
+From 9afadf01b1be371ee88491819aa67364684461f9 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Fri, 3 Aug 2012 10:27:25 +0200
+Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/include/asm/mach-lantiq/lantiq_atm.h |  196 +++++++++++++++++++++++
+ arch/mips/include/asm/mach-lantiq/lantiq_ptm.h |  203 ++++++++++++++++++++++++
+ arch/mips/lantiq/irq.c                         |    2 +
+ arch/mips/mm/cache.c                           |    2 +
+ include/uapi/linux/atm.h                       |    6 +
+ net/atm/common.c                               |    6 +
+ net/atm/proc.c                                 |    2 +-
+ 7 files changed, 416 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_atm.h
+ create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
+
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
+@@ -0,0 +1,196 @@
++/******************************************************************************
++**
++** FILE NAME    : ifx_atm.h
++** PROJECT      : UEIP
++** MODULES      : ATM
++**
++** DATE         : 17 Jun 2009
++** AUTHOR       : Xu Liang
++** DESCRIPTION  : Global ATM driver header file
++** COPYRIGHT    :       Copyright (c) 2006
++**                      Infineon Technologies AG
++**                      Am Campeon 1-12, 85579 Neubiberg, Germany
++**
++**    This program is free software; you can redistribute it and/or modify
++**    it under the terms of the GNU General Public License as published by
++**    the Free Software Foundation; either version 2 of the License, or
++**    (at your option) any later version.
++**
++** HISTORY
++** $Date        $Author         $Comment
++** 07 JUL 2009  Xu Liang        Init Version
++*******************************************************************************/
++
++#ifndef IFX_ATM_H
++#define IFX_ATM_H
++
++
++
++/*!
++  \defgroup IFX_ATM UEIP Project - ATM driver module
++  \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
++ */
++
++/*!
++  \defgroup IFX_ATM_IOCTL IOCTL Commands
++  \ingroup IFX_ATM
++  \brief IOCTL Commands used by user application.
++ */
++
++/*!
++  \defgroup IFX_ATM_STRUCT Structures
++  \ingroup IFX_ATM
++  \brief Structures used by user application.
++ */
++
++/*!
++  \file ifx_atm.h
++  \ingroup IFX_ATM
++  \brief ATM driver header file
++ */
++
++
++
++/*
++ * ####################################
++ *              Definition
++ * ####################################
++ */
++
++/*!
++  \addtogroup IFX_ATM_STRUCT
++ */
++/*@{*/
++
++/*
++ *  ATM MIB
++ */
++
++/*!
++  \struct atm_cell_ifEntry_t
++  \brief Structure used for Cell Level MIB Counters.
++
++  User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
++ */
++typedef struct {
++	__u32	ifHCInOctets_h;     /*!< byte counter of ingress cells (upper 32 bits, total 64 bits)   */
++	__u32	ifHCInOctets_l;     /*!< byte counter of ingress cells (lower 32 bits, total 64 bits)   */
++	__u32	ifHCOutOctets_h;    /*!< byte counter of egress cells (upper 32 bits, total 64 bits)    */
++	__u32	ifHCOutOctets_l;    /*!< byte counter of egress cells (lower 32 bits, total 64 bits)    */
++	__u32	ifInErrors;         /*!< counter of error ingress cells     */
++	__u32	ifInUnknownProtos;  /*!< counter of unknown ingress cells   */
++	__u32	ifOutErrors;        /*!< counter of error egress cells      */
++} atm_cell_ifEntry_t;
++
++/*!
++  \struct atm_aal5_ifEntry_t
++  \brief Structure used for AAL5 Frame Level MIB Counters.
++
++  User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
++ */
++typedef struct {
++	__u32	ifHCInOctets_h;     /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
++	__u32	ifHCInOctets_l;     /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
++	__u32	ifHCOutOctets_h;    /*!< byte counter of egress packets (upper 32 bits, total 64 bits)  */
++	__u32	ifHCOutOctets_l;    /*!< byte counter of egress packets (lower 32 bits, total 64 bits)  */
++	__u32	ifInUcastPkts;      /*!< counter of ingress packets         */
++	__u32	ifOutUcastPkts;     /*!< counter of egress packets          */
++	__u32	ifInErrors;         /*!< counter of error ingress packets   */
++	__u32	ifInDiscards;       /*!< counter of dropped ingress packets */
++	__u32	ifOutErros;         /*!< counter of error egress packets    */
++	__u32	ifOutDiscards;      /*!< counter of dropped egress packets  */
++} atm_aal5_ifEntry_t;
++
++/*!
++  \struct atm_aal5_vcc_t
++  \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
++
++  This structure is a part of structure "atm_aal5_vcc_x_t".
++ */
++typedef struct {
++	__u32	aal5VccCrcErrors;       /*!< counter of ingress packets with CRC error  */
++	__u32	aal5VccSarTimeOuts;     /*!< counter of ingress packets with Re-assemble timeout    */  //no timer support yet
++	__u32	aal5VccOverSizedSDUs;   /*!< counter of oversized ingress packets       */
++} atm_aal5_vcc_t;
++
++/*!
++  \struct atm_aal5_vcc_x_t
++  \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
++
++  User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
++ */
++typedef struct {
++	int             vpi;        /*!< VPI of the VCC to get MIB counters */
++	int             vci;        /*!< VCI of the VCC to get MIB counters */
++	atm_aal5_vcc_t  mib_vcc;    /*!< structure to get MIB counters      */
++} atm_aal5_vcc_x_t;
++
++/*@}*/
++
++
++
++/*
++ * ####################################
++ *                IOCTL
++ * ####################################
++ */
++
++/*!
++  \addtogroup IFX_ATM_IOCTL
++ */
++/*@{*/
++
++/*
++ *  ioctl Command
++ */
++/*!
++  \brief ATM IOCTL Magic Number
++ */
++#define PPE_ATM_IOC_MAGIC       'o'
++/*!
++  \brief ATM IOCTL Command - Get Cell Level MIB Counters
++
++   This command is obsolete. User can get cell level MIB from DSL API.
++   This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
++ */
++#define PPE_ATM_MIB_CELL        _IOW(PPE_ATM_IOC_MAGIC,  0, atm_cell_ifEntry_t)
++/*!
++  \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
++
++   Get AAL5 packet counters.
++   This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
++ */
++#define PPE_ATM_MIB_AAL5        _IOW(PPE_ATM_IOC_MAGIC,  1, atm_aal5_ifEntry_t)
++/*!
++  \brief ATM IOCTL Command - Get Per PVC MIB Counters
++
++   Get AAL5 packet counters for each PVC.
++   This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
++ */
++#define PPE_ATM_MIB_VCC         _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
++/*!
++  \brief Total Number of ATM IOCTL Commands
++ */
++#define PPE_ATM_IOC_MAXNR       3
++
++/*@}*/
++
++
++
++/*
++ * ####################################
++ *                 API
++ * ####################################
++ */
++
++#ifdef __KERNEL__
++struct port_cell_info {
++    unsigned int    port_num;
++    unsigned int    tx_link_rate[2];
++};
++#endif
++
++
++
++#endif  //  IFX_ATM_H
++
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
+@@ -0,0 +1,203 @@
++/******************************************************************************
++**
++** FILE NAME    : ifx_ptm.h
++** PROJECT      : UEIP
++** MODULES      : PTM
++**
++** DATE         : 17 Jun 2009
++** AUTHOR       : Xu Liang
++** DESCRIPTION  : Global PTM driver header file
++** COPYRIGHT    :       Copyright (c) 2006
++**                      Infineon Technologies AG
++**                      Am Campeon 1-12, 85579 Neubiberg, Germany
++**
++**    This program is free software; you can redistribute it and/or modify
++**    it under the terms of the GNU General Public License as published by
++**    the Free Software Foundation; either version 2 of the License, or
++**    (at your option) any later version.
++**
++** HISTORY
++** $Date        $Author         $Comment
++** 07 JUL 2009  Xu Liang        Init Version
++*******************************************************************************/
++
++#ifndef IFX_PTM_H
++#define IFX_PTM_H
++
++
++
++/*!
++  \defgroup IFX_PTM UEIP Project - PTM driver module
++  \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
++ */
++
++/*!
++  \defgroup IFX_PTM_IOCTL IOCTL Commands
++  \ingroup IFX_PTM
++  \brief IOCTL Commands used by user application.
++ */
++
++/*!
++  \defgroup IFX_PTM_STRUCT Structures
++  \ingroup IFX_PTM
++  \brief Structures used by user application.
++ */
++
++/*!
++  \file ifx_ptm.h
++  \ingroup IFX_PTM
++  \brief PTM driver header file
++ */
++
++
++
++/*
++ * ####################################
++ *              Definition
++ * ####################################
++ */
++
++
++
++/*
++ * ####################################
++ *                IOCTL
++ * ####################################
++ */
++
++/*!
++  \addtogroup IFX_PTM_IOCTL
++ */
++/*@{*/
++
++/*
++ *  ioctl Command
++ */
++/*!
++  \brief PTM IOCTL Command - Get codeword MIB counters.
++
++  This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
++ */
++#define IFX_PTM_MIB_CW_GET              SIOCDEVPRIVATE + 1
++/*!
++  \brief PTM IOCTL Command - Get packet MIB counters.
++
++  This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
++ */
++#define IFX_PTM_MIB_FRAME_GET           SIOCDEVPRIVATE + 2
++/*!
++  \brief PTM IOCTL Command - Get firmware configuration (CRC).
++
++  This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
++ */
++#define IFX_PTM_CFG_GET                 SIOCDEVPRIVATE + 3
++/*!
++  \brief PTM IOCTL Command - Set firmware configuration (CRC).
++
++  This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
++ */
++#define IFX_PTM_CFG_SET                 SIOCDEVPRIVATE + 4
++/*!
++  \brief PTM IOCTL Command - Program priority value to TX queue mapping.
++
++  This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
++ */
++#define IFX_PTM_MAP_PKT_PRIO_TO_Q       SIOCDEVPRIVATE + 14
++
++/*@}*/
++
++
++/*!
++  \addtogroup IFX_PTM_STRUCT
++ */
++/*@{*/
++
++/*
++ *  ioctl Data Type
++ */
++
++/*!
++  \typedef PTM_CW_IF_ENTRY_T
++  \brief Wrapping of structure "ptm_cw_ifEntry_t".
++ */
++/*!
++  \struct ptm_cw_ifEntry_t
++  \brief Structure used for CodeWord level MIB counters.
++ */
++typedef struct ptm_cw_ifEntry_t {
++    uint32_t    ifRxNoIdleCodewords;    /*!< output, number of ingress user codeword */
++    uint32_t    ifRxIdleCodewords;      /*!< output, number of ingress idle codeword */
++    uint32_t    ifRxCodingViolation;    /*!< output, number of error ingress codeword */
++    uint32_t    ifTxNoIdleCodewords;    /*!< output, number of egress user codeword */
++    uint32_t    ifTxIdleCodewords;      /*!< output, number of egress idle codeword */
++} PTM_CW_IF_ENTRY_T;
++
++/*!
++  \typedef PTM_FRAME_MIB_T
++  \brief Wrapping of structure "ptm_frame_mib_t".
++ */
++/*!
++  \struct ptm_frame_mib_t
++  \brief Structure used for packet level MIB counters.
++ */
++typedef struct ptm_frame_mib_t {
++    uint32_t    RxCorrect;      /*!< output, number of ingress packet */
++    uint32_t    TC_CrcError;    /*!< output, number of egress packet with CRC error */
++    uint32_t    RxDropped;      /*!< output, number of dropped ingress packet */
++    uint32_t    TxSend;         /*!< output, number of egress packet */
++} PTM_FRAME_MIB_T;
++
++/*!
++  \typedef IFX_PTM_CFG_T
++  \brief Wrapping of structure "ptm_cfg_t".
++ */
++/*!
++  \struct ptm_cfg_t
++  \brief Structure used for ETH/TC CRC configuration.
++ */
++typedef struct ptm_cfg_t {
++    uint32_t    RxEthCrcPresent;    /*!< input/output, ingress packet has ETH CRC */
++    uint32_t    RxEthCrcCheck;      /*!< input/output, check ETH CRC of ingress packet */
++    uint32_t    RxTcCrcCheck;       /*!< input/output, check TC CRC of ingress codeword */
++    uint32_t    RxTcCrcLen;         /*!< input/output, length of TC CRC of ingress codeword */
++    uint32_t    TxEthCrcGen;        /*!< input/output, generate ETH CRC for egress packet */
++    uint32_t    TxTcCrcGen;         /*!< input/output, generate TC CRC for egress codeword */
++    uint32_t    TxTcCrcLen;         /*!< input/output, length of TC CRC of egress codeword */
++} IFX_PTM_CFG_T;
++
++/*!
++  \typedef IFX_PTM_PRIO_Q_MAP_T
++  \brief Wrapping of structure "ppe_prio_q_map".
++ */
++/*!
++  \struct ppe_prio_q_map
++  \brief Structure used for Priority Value to TX Queue mapping.
++ */
++typedef struct ppe_prio_q_map {
++    int             pkt_prio;
++    int             qid;
++    int             vpi;    //  ignored in eth interface
++    int             vci;    //  ignored in eth interface
++} IFX_PTM_PRIO_Q_MAP_T;
++
++/*@}*/
++
++
++
++/*
++ * ####################################
++ *                 API
++ * ####################################
++ */
++
++#ifdef __KERNEL__
++struct port_cell_info {
++    unsigned int    port_num;
++    unsigned int    tx_link_rate[2];
++};
++#endif
++
++
++
++#endif  //  IFX_PTM_H
++
+--- a/arch/mips/lantiq/irq.c
++++ b/arch/mips/lantiq/irq.c
+@@ -14,6 +14,7 @@
+ #include <linux/of_platform.h>
+ #include <linux/of_address.h>
+ #include <linux/of_irq.h>
++#include <linux/module.h>
+ 
+ #include <asm/bootinfo.h>
+ #include <asm/irq_cpu.h>
+@@ -100,6 +101,7 @@ void ltq_mask_and_ack_irq(struct irq_dat
+ 	ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
+ 	ltq_icu_w32(im, BIT(offset), isr);
+ }
++EXPORT_SYMBOL(ltq_mask_and_ack_irq);
+ 
+ static void ltq_ack_irq(struct irq_data *d)
+ {
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -63,6 +63,8 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+ 
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_wback);
++EXPORT_SYMBOL(_dma_cache_inv);
+ 
+ #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
+ 
+--- a/include/uapi/linux/atm.h
++++ b/include/uapi/linux/atm.h
+@@ -130,8 +130,14 @@
+ #define ATM_ABR		4
+ #define ATM_ANYCLASS	5		/* compatible with everything */
+ 
++#define ATM_VBR_NRT     ATM_VBR
++#define ATM_VBR_RT      6
++#define ATM_UBR_PLUS    7
++#define ATM_GFR         8
++
+ #define ATM_MAX_PCR	-1		/* maximum available PCR */
+ 
++
+ struct atm_trafprm {
+ 	unsigned char	traffic_class;	/* traffic class (ATM_UBR, ...) */
+ 	int		max_pcr;	/* maximum PCR in cells per second */
+--- a/net/atm/common.c
++++ b/net/atm/common.c
+@@ -62,11 +62,17 @@ static void vcc_remove_socket(struct soc
+ 	write_unlock_irq(&vcc_sklist_lock);
+ }
+ 
++struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
++EXPORT_SYMBOL(ifx_atm_alloc_tx);
++
+ static struct sk_buff *alloc_tx(struct atm_vcc *vcc, unsigned int size)
+ {
+ 	struct sk_buff *skb;
+ 	struct sock *sk = sk_atm(vcc);
+ 
++	if (ifx_atm_alloc_tx != NULL)
++		return ifx_atm_alloc_tx(vcc, size);
++
+ 	if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) {
+ 		pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n",
+ 			 sk_wmem_alloc_get(sk), size, sk->sk_sndbuf);
+--- a/net/atm/proc.c
++++ b/net/atm/proc.c
+@@ -154,7 +154,7 @@ static void *vcc_seq_next(struct seq_fil
+ static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
+ {
+ 	static const char *const class_name[] = {
+-		"off", "UBR", "CBR", "VBR", "ABR"};
++		"off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
+ 	static const char *const aal_name[] = {
+ 		"---",	"1",	"2",	"3/4",	/*  0- 3 */
+ 		"???",	"5",	"???",	"???",	/*  4- 7 */

target/linux/lantiq/patches-4.14/0018-MTD-nand-lots-of-xrx200-fixes.patch

@@ -0,0 +1,122 @@
+From 997a8965db8417266bea3fbdcfa3e5655a1b52fa Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Tue, 9 Sep 2014 23:12:15 +0200
+Subject: [PATCH 18/36] MTD: nand: lots of xrx200 fixes
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/mtd/nand/xway_nand.c |   63 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 63 insertions(+)
+
+--- a/drivers/mtd/nand/xway_nand.c
++++ b/drivers/mtd/nand/xway_nand.c
+@@ -63,6 +63,24 @@
+ #define NAND_CON_CSMUX		(1 << 1)
+ #define NAND_CON_NANDM		1
+ 
++#define DANUBE_PCI_REG32( addr )    (*(volatile u32 *)(addr))
++#define PCI_CR_PR_OFFSET	    (KSEG1+0x1E105400)
++#define PCI_CR_PC_ARB		    (PCI_CR_PR_OFFSET + 0x0080)
++
++/*
++ * req_mask provides a mechanism to prevent interference between
++ * nand and pci (probably only relevant for the BT Home Hub 2B).
++ * Setting it causes the corresponding pci req pins to be masked
++ * during nand access, and also moves ebu locking from the read/write
++ * functions to the chip select function to ensure that the whole
++ * operation runs with interrupts disabled.
++ * In addition it switches on some extra waiting in xway_cmd_ctrl().
++ * This seems to be necessary if the ebu_cs1 pin has open-drain disabled,
++ * which in turn seems to be necessary for the nor chip to be recognised
++ * reliably, on a board (Home Hub 2B again) which has both nor and nand.
++ */
++static __be32 req_mask = 0;
++
+ struct xway_nand_data {
+ 	struct nand_chip	chip;
+ 	unsigned long		csflags;
+@@ -94,10 +112,22 @@ static void xway_select_chip(struct mtd_
+ 	case -1:
+ 		ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
+ 		ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
++
++		if (req_mask) {
++			/* Unmask all external PCI request */
++			DANUBE_PCI_REG32(PCI_CR_PC_ARB) &= ~(req_mask << 16);
++		}
++
+ 		spin_unlock_irqrestore(&ebu_lock, data->csflags);
+ 		break;
+ 	case 0:
+ 		spin_lock_irqsave(&ebu_lock, data->csflags);
++
++		if (req_mask) {
++			/* Mask all external PCI request */
++			DANUBE_PCI_REG32(PCI_CR_PC_ARB) |= (req_mask << 16);
++		}
++
+ 		ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
+ 		ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
+ 		break;
+@@ -108,6 +138,12 @@ static void xway_select_chip(struct mtd_
+ 
+ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+ {
++
++	if (req_mask) {
++		if (cmd != NAND_CMD_STATUS)
++			ltq_ebu_w32(0, EBU_NAND_WAIT); /* Clear nand ready */
++	}
++
+ 	if (cmd == NAND_CMD_NONE)
+ 		return;
+ 
+@@ -118,6 +154,24 @@ static void xway_cmd_ctrl(struct mtd_inf
+ 
+ 	while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
+ 		;
++
++	if (req_mask) {
++	       /*
++		* program and erase have their own busy handlers
++		* status and sequential in needs no delay
++		*/
++		switch (cmd) {
++			case NAND_CMD_ERASE1:
++			case NAND_CMD_SEQIN:
++			case NAND_CMD_STATUS:
++			case NAND_CMD_READID:
++			return;
++		}
++
++		/* wait until command is processed */
++		while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_RD) == 0)
++			;
++	}
+ }
+ 
+ static int xway_dev_ready(struct mtd_info *mtd)
+@@ -157,6 +211,7 @@ static int xway_nand_probe(struct platfo
+ 	int err;
+ 	u32 cs;
+ 	u32 cs_flag = 0;
++	const __be32 *req_mask_ptr;
+ 
+ 	/* Allocate memory for the device structure (and zero it) */
+ 	data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data),
+@@ -192,6 +247,15 @@ static int xway_nand_probe(struct platfo
+ 	if (!err && cs == 1)
+ 		cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1;
+ 
++	req_mask_ptr = of_get_property(pdev->dev.of_node,
++					"req-mask", NULL);
++
++	/*
++	 * Load the PCI req lines to mask from the device tree. If the
++	 * property is not present, setting req_mask to 0 disables masking.
++	 */
++	req_mask = (req_mask_ptr ? *req_mask_ptr : 0);
++
+ 	/* setup the EBU to run in NAND mode on our base addr */
+ 	ltq_ebu_w32(CPHYSADDR(data->nandaddr)
+ 		    | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1);

target/linux/lantiq/patches-4.14/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch

@@ -0,0 +1,25 @@
+From e3b20f04e9f9cae1babe091fdc1d08d7703ae344 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Thu, 7 Aug 2014 18:18:00 +0200
+Subject: [PATCH 20/36] MTD: lantiq: handle NO_XIP on cfi0001 flash
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/mtd/maps/lantiq-flash.c |    6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/maps/lantiq-flash.c
++++ b/drivers/mtd/maps/lantiq-flash.c
+@@ -137,7 +137,11 @@ ltq_mtd_probe(struct platform_device *pd
+ 	if (!ltq_mtd->map)
+ 		return -ENOMEM;
+ 
+-	ltq_mtd->map->phys = ltq_mtd->res->start;
++	if (of_find_property(pdev->dev.of_node, "lantiq,noxip", NULL))
++		ltq_mtd->map->phys = NO_XIP;
++	else
++		ltq_mtd->map->phys = ltq_mtd->res->start;
++	ltq_mtd->res->start;
+ 	ltq_mtd->map->size = resource_size(ltq_mtd->res);
+ 	ltq_mtd->map->virt = devm_ioremap_resource(&pdev->dev, ltq_mtd->res);
+ 	if (IS_ERR(ltq_mtd->map->virt))

target/linux/lantiq/patches-4.14/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch

@@ -0,0 +1,44 @@
+From 4400e1f593ea40a51912128adb4f53d59e62cad8 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Wed, 10 Sep 2014 22:40:18 +0200
+Subject: [PATCH 22/36] MTD: m25p80: allow loading mtd name from OF
+
+In accordance with the physmap flash we should honour the linux,mtd-name
+property when deciding what name the mtd device has.
+
+Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/mtd/devices/m25p80.c |    6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -19,6 +19,7 @@
+ #include <linux/errno.h>
+ #include <linux/module.h>
+ #include <linux/device.h>
++#include <linux/of.h>
+ 
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+@@ -198,6 +199,10 @@ static int m25p_probe(struct spi_device
+ 	enum read_mode mode = SPI_NOR_NORMAL;
+ 	char *flash_name;
+ 	int ret;
++	const char __maybe_unused	*of_mtd_name = NULL;
++
++	of_property_read_string(spi->dev.of_node,
++		"linux,mtd-name", &of_mtd_name);
+ 
+ 	data = dev_get_platdata(&spi->dev);
+ 
+@@ -227,6 +232,8 @@ static int m25p_probe(struct spi_device
+ 
+ 	if (data && data->name)
+ 		nor->mtd.name = data->name;
++	else if (of_mtd_name)
++		nor->mtd.name = of_mtd_name;
+ 
+ 	/* For some (historical?) reason many platforms provide two different
+ 	 * names in flash_platform_data: "name" and "type". Quite often name is

target/linux/lantiq/patches-4.14/0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch

@@ -0,0 +1,294 @@
+From 0a63ab263725c427051a8bbaa0732b749627da27 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Thu, 7 Aug 2014 18:15:36 +0200
+Subject: [PATCH 23/36] NET: PHY: adds driver for lantiq PHY11G
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/net/phy/Kconfig  |    5 +
+ drivers/net/phy/Makefile |    1 +
+ drivers/net/phy/lantiq.c |  231 ++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 237 insertions(+)
+ create mode 100644 drivers/net/phy/lantiq.c
+
+--- a/drivers/net/phy/intel-xway.c
++++ b/drivers/net/phy/intel-xway.c
+@@ -152,6 +152,51 @@
+ #define PHY_ID_PHY11G_VR9		0xD565A409
+ #define PHY_ID_PHY22F_VR9		0xD565A419
+ 
++#if IS_ENABLED(CONFIG_OF_MDIO)
++static int vr9_gphy_of_reg_init(struct phy_device *phydev)
++{
++	u32 tmp;
++
++	/* store the led values if one was passed by the devicetree */
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledch", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LEDCH, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledcl", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LEDCL, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0h", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED0H, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0l", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED0L, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1h", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED1H, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1l", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED1L, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2h", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED3H, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2l", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED3L, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3h", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED3H, MDIO_MMD_VEND2, tmp);
++
++	if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3l", &tmp))
++		phy_write_mmd_indirect(phydev, XWAY_MMD_LED3L, MDIO_MMD_VEND2, tmp);
++
++	return 0;
++}
++#else
++static int vr9_gphy_of_reg_init(struct phy_device *phydev)
++{
++	return 0;
++}
++#endif /* CONFIG_OF_MDIO */
++
+ static int xway_gphy_config_init(struct phy_device *phydev)
+ {
+ 	int err;
+@@ -190,6 +235,7 @@ static int xway_gphy_config_init(struct
+ 	phy_write_mmd_indirect(phydev, XWAY_MMD_LED2H, MDIO_MMD_VEND2, ledxh);
+ 	phy_write_mmd_indirect(phydev, XWAY_MMD_LED2L, MDIO_MMD_VEND2, ledxl);
+ 
++	vr9_gphy_of_reg_init(phydev);
+ 	return 0;
+ }
+ 
+--- /dev/null
++++ b/Documentation/devicetree/bindings/phy/phy-lanitq.txt
+@@ -0,0 +1,216 @@
++Lanitq PHY binding
++============================================
++
++This devicetree binding controls the lantiq ethernet phys led functionality.
++
++Example:
++	mdio@0 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		compatible = "lantiq,xrx200-mdio";
++			phy5: ethernet-phy@5 {
++			reg = <0x1>;
++			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
++		};
++		phy11: ethernet-phy@11 {
++			reg = <0x11>;
++			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
++			lantiq,led2h = <0x00>;
++			lantiq,led2l = <0x03>;
++		};
++		phy12: ethernet-phy@12 {
++			reg = <0x12>;
++			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
++			lantiq,led1h = <0x00>;
++			lantiq,led1l = <0x03>;
++		};
++		phy13: ethernet-phy@13 {
++			reg = <0x13>;
++			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
++			lantiq,led2h = <0x00>;
++			lantiq,led2l = <0x03>;
++		};
++		phy14: ethernet-phy@14 {
++			reg = <0x14>;
++			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
++			lantiq,led1h = <0x00>;
++			lantiq,led1l = <0x03>;
++		};
++	};
++
++Register Description
++============================================
++
++LEDCH:
++
++Name	Hardware Reset Value
++LEDCH	0x00C5
++
++| 15 |    |    |    |    |    |    |  8 |
++=========================================
++|		RES			|
++=========================================
++
++|  7 |    |    |    |    |    |    |  0 |
++=========================================
++|   FBF   |   SBF   |RES |     NACS     |
++=========================================
++
++Field	Bits	Type	Description
++FBF	7:6	RW	Fast Blink Frequency
++			---
++			0x0 (00b) F02HZ 2 Hz blinking frequency
++			0x1 (01b) F04HZ 4 Hz blinking frequency
++			0x2 (10b) F08HZ 8 Hz blinking frequency
++			0x3 (11b) F16HZ 16 Hz blinking frequency
++
++SBF	5:4	RW	Slow Blink Frequency
++			---
++			0x0 (00b) F02HZ 2 Hz blinking frequency
++			0x1 (01b) F04HZ 4 Hz blinking frequency
++			0x2 (10b) F08HZ 8 Hz blinking frequency
++			0x3 (11b) F16HZ 16 Hz blinking frequency
++
++NACS	2:0	RW	Inverse of Scan Function
++			---
++			0x0 (000b) NONE No Function
++			0x1 (001b) LINK Complex function enabled when link is up
++			0x2 (010b) PDOWN Complex function enabled when device is powered-down
++			0x3 (011b) EEE Complex function enabled when device is in EEE mode
++			0x4 (100b) ANEG Complex function enabled when auto-negotiation is running
++			0x5 (101b) ABIST Complex function enabled when analog self-test is running
++			0x6 (110b) CDIAG Complex function enabled when cable diagnostics are running
++			0x7 (111b) TEST Complex function enabled when test mode is running
++
++LEDCL:
++
++Name	Hardware Reset Value
++LEDCL	0x0067
++
++| 15 |    |    |    |    |    |    |  8 |
++=========================================
++|		RES			|
++=========================================
++
++|  7 |    |    |    |    |    |    |  0 |
++=========================================
++|RES |     SCAN     |RES |    CBLINK    |
++=========================================
++
++Field	Bits	Type	Description
++SCAN	6:4	RW	Complex Scan Configuration
++			---
++			000 B NONE No Function
++			001 B LINK Complex function enabled when link is up
++			010 B PDOWN Complex function enabled when device is powered-down
++			011 B EEE Complex function enabled when device is in EEE mode
++			100 B ANEG Complex function enabled when auto-negotiation is running
++			101 B ABIST Complex function enabled when analog self-test is running
++			110 B CDIAG Complex function enabled when cable diagnostics are running
++			111 B TEST Complex function enabled when test mode is running
++
++CBLINK	2:0	RW	Complex Blinking Configuration
++			---
++			000 B NONE No Function
++			001 B LINK Complex function enabled when link is up
++			010 B PDOWN Complex function enabled when device is powered-down
++			011 B EEE Complex function enabled when device is in EEE mode
++			100 B ANEG Complex function enabled when auto-negotiation is running
++			101 B ABIST Complex function enabled when analog self-test is running
++			110 B CDIAG Complex function enabled when cable diagnostics are running
++			111 B TEST Complex function enabled when test mode is running
++
++LEDxH:
++
++Name	Hardware Reset Value
++LED0H	0x0070
++LED1H	0x0020
++LED2H	0x0040
++LED3H	0x0040
++
++| 15 |    |    |    |    |    |    |  8 |
++=========================================
++|		RES			|
++=========================================
++
++|  7 |    |    |    |    |    |    |  0 |
++=========================================
++|        CON        |       BLINKF      |
++=========================================
++
++Field	Bits	Type	Description
++CON	7:4	RW	Constant On Configuration
++			---
++			0x0 (0000b) NONE LED does not light up constantly
++			0x1 (0001b) LINK10 LED is on when link is 10 Mbit/s
++			0x2 (0010b) LINK100 LED is on when link is 100 Mbit/s
++			0x3 (0011b) LINK10X LED is on when link is 10/100 Mbit/s
++			0x4 (0100b) LINK1000 LED is on when link is 1000 Mbit/s
++			0x5 (0101b) LINK10_0 LED is on when link is 10/1000 Mbit/s
++			0x6 (0110b) LINK100X LED is on when link is 100/1000 Mbit/s
++			0x7 (0111b) LINK10XX LED is on when link is 10/100/1000 Mbit/s
++			0x8 (1000b) PDOWN LED is on when device is powered-down
++			0x9 (1001b) EEE LED is on when device is in EEE mode
++			0xA (1010b) ANEG LED is on when auto-negotiation is running
++			0xB (1011b) ABIST LED is on when analog self-test is running
++			0xC (1100b) CDIAG LED is on when cable diagnostics are running
++
++BLINKF	3:0	RW	Fast Blinking Configuration
++			---
++			0x0 (0000b) NONE No Blinking
++			0x1 (0001b) LINK10 Blink when link is 10 Mbit/s
++			0x2 (0010b) LINK100 Blink when link is 100 Mbit/s
++			0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s
++			0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s
++			0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s
++			0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s
++			0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s
++			0x8 (1000b) PDOWN Blink when device is powered-down
++			0x9 (1001b) EEE Blink when device is in EEE mode
++			0xA (1010b) ANEG Blink when auto-negotiation is running
++			0xB (1011b) ABIST Blink when analog self-test is running
++			0xC (1100b) CDIAG Blink when cable diagnostics are running
++
++LEDxL:
++
++Name	Hardware Reset Value
++LED0L	0x0003
++LED1L	0x0000
++LED2L	0x0000
++LED3L	0x0020
++
++| 15 |    |    |    |    |    |    |  8 |
++=========================================
++|		RES			|
++=========================================
++
++|  7 |    |    |    |    |    |    |  0 |
++=========================================
++|      BLINKS       |       PULSE       |
++=========================================
++
++Field	Bits	Type	Description
++BLINKS	7:4	RW	Slow Blinkin Configuration
++			---
++			0x0 (0000b) NONE No Blinking
++			0x1 (0001b) LINK10 Blink when link is 10 Mbit/s
++			0x2 (0010b) LINK100 Blink when link is 100 Mbit/s
++			0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s
++			0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s
++			0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s
++			0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s
++			0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s
++			0x8 (1000b) PDOWN Blink when device is powered-down
++			0x9 (1001b) EEE Blink when device is in EEE mode
++			0xA (1010b) ANEG Blink when auto-negotiation is running
++			0xB (1011b) ABIST Blink when analog self-test is running
++			0xC (1100b) CDIAG Blink when cable diagnostics are runningning
++
++PULSE	3:0	RW	Pulsing Configuration
++			The pulse field is a mask field by which certain events can be combined
++			---
++			0x0 (0000b) NONE No pulsing
++			0x1 (0001b) TXACT Transmit activity
++			0x2 (0010b) RXACT Receive activity
++			0x4 (0100b) COL Collision
++			0x8 (1000b) RES Reserved

target/linux/lantiq/patches-4.14/0024-NET-lantiq-adds-PHY11G-firmware-blobs.patch

@@ -0,0 +1,364 @@
+From 77e89d5a28be35058041c79e9874ab26f222c603 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Mon, 22 Oct 2012 09:26:24 +0200
+Subject: [PATCH 24/36] NET: lantiq: adds PHY11G firmware blobs
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ firmware/Makefile       |    4 +
+ firmware/lantiq/COPYING |  286 +++++++++++++++++++++++++++++++++++++++++++++++
+ firmware/lantiq/README  |   45 ++++++++
+ 3 files changed, 335 insertions(+)
+ create mode 100644 firmware/lantiq/COPYING
+ create mode 100644 firmware/lantiq/README
+
+--- a/firmware/Makefile
++++ b/firmware/Makefile
+@@ -134,6 +134,10 @@ fw-shipped-$(CONFIG_USB_SERIAL_KEYSPAN_P
+ fw-shipped-$(CONFIG_USB_SERIAL_XIRCOM) += keyspan_pda/xircom_pgs.fw
+ fw-shipped-$(CONFIG_USB_VICAM) += vicam/firmware.fw
+ fw-shipped-$(CONFIG_VIDEO_CPIA2) += cpia2/stv0672_vp4.bin
++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy11g_a14.bin
++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy11g_a22.bin
++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy22f_a14.bin
++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy22f_a22.bin
+ fw-shipped-$(CONFIG_YAM) += yam/1200.bin yam/9600.bin
+ 
+ fw-shipped-all := $(fw-shipped-y) $(fw-shipped-m) $(fw-shipped-)
+--- /dev/null
++++ b/firmware/lantiq/COPYING
+@@ -0,0 +1,286 @@
++All firmware files are copyrighted by Lantiq Deutschland GmbH.
++The files have been extracted from header files found in Lantiq BSPs.
++If not stated otherwise all files are licensed under GPL.
++
++=======================================================================
++
++		    GNU GENERAL PUBLIC LICENSE
++		       Version 2, June 1991
++
++ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
++     59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ Everyone is permitted to copy and distribute verbatim copies
++ of this license document, but changing it is not allowed.
++
++			    Preamble
++
++  The licenses for most software are designed to take away your
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++specifies a version number of this License which applies to it and "any
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++REPAIR OR CORRECTION.
++
++  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
++WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
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++PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
++POSSIBILITY OF SUCH DAMAGES.
++
++		     END OF TERMS AND CONDITIONS
+--- /dev/null
++++ b/firmware/lantiq/README
+@@ -0,0 +1,45 @@
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++# (C) Copyright 2007 - 2012
++# Lantiq Deutschland GmbH
++#
++# (C) Copyright 2012
++# Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
++#
++
++#
++# How to use
++#
++Configure kernel with:
++CONFIG_FW_LOADER=y
++CONFIG_EXTRA_FIRMWARE_DIR="FIRMWARE_DIR"
++CONFIG_EXTRA_FIRMWARE="FIRMWARE_FILES"
++
++where FIRMWARE_DIR should point to this git tree and FIRMWARE_FILES is a list
++of space separated files from list below.
++
++#
++# Firmware files
++#
++
++# GPHY core on Lantiq XWAY VR9 v1.1
++lantiq/xrx200_phy11g_a14.bin
++lantiq/xrx200_phy22f_a14.bin
++
++# GPHY core on Lantiq XWAY VR9 v1.2
++lantiq/xrx200_phy11g_a22.bin
++lantiq/xrx200_phy22f_a22.bin

target/linux/lantiq/patches-4.14/0026-NET-multi-phy-support.patch

@@ -0,0 +1,53 @@
+From c6feeeb407a3b8a6597ae377ba4dd138e185e3dd Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sun, 27 Jul 2014 09:38:50 +0100
+Subject: [PATCH 26/36] NET: multi phy support
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/net/phy/phy.c |    9 ++++++---
+ include/linux/phy.h   |    1 +
+ 2 files changed, 7 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/phy.c
++++ b/drivers/net/phy/phy.c
+@@ -1032,7 +1032,8 @@ void phy_state_machine(struct work_struc
+ 		/* If the link is down, give up on negotiation for now */
+ 		if (!phydev->link) {
+ 			phydev->state = PHY_NOLINK;
+-			netif_carrier_off(phydev->attached_dev);
++			if (!phydev->no_auto_carrier_off)
++				netif_carrier_off(phydev->attached_dev);
+ 			phydev->adjust_link(phydev->attached_dev);
+ 			break;
+ 		}
+@@ -1124,7 +1125,8 @@ void phy_state_machine(struct work_struc
+ 			netif_carrier_on(phydev->attached_dev);
+ 		} else {
+ 			phydev->state = PHY_NOLINK;
+-			netif_carrier_off(phydev->attached_dev);
++			if (!phydev->no_auto_carrier_off)
++				netif_carrier_off(phydev->attached_dev);
+ 		}
+ 
+ 		phydev->adjust_link(phydev->attached_dev);
+@@ -1136,7 +1138,8 @@ void phy_state_machine(struct work_struc
+ 	case PHY_HALTED:
+ 		if (phydev->link) {
+ 			phydev->link = 0;
+-			netif_carrier_off(phydev->attached_dev);
++			if (!phydev->no_auto_carrier_off)
++				netif_carrier_off(phydev->attached_dev);
+ 			phydev->adjust_link(phydev->attached_dev);
+ 			do_suspend = true;
+ 		}
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -369,6 +369,7 @@ struct phy_device {
+ 	bool is_pseudo_fixed_link;
+ 	bool has_fixups;
+ 	bool suspended;
++	bool no_auto_carrier_off;
+ 
+ 	enum phy_state state;
+ 

target/linux/lantiq/patches-4.14/0028-NET-lantiq-various-etop-fixes.patch

@@ -0,0 +1,880 @@
+From 870ed9cae083ff8a60a739ef7e74c5a1800533be Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Tue, 9 Sep 2014 22:45:34 +0200
+Subject: [PATCH 28/36] NET: lantiq: various etop fixes
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/net/ethernet/lantiq_etop.c |  555 +++++++++++++++++++++++++-----------
+ 1 file changed, 389 insertions(+), 166 deletions(-)
+
+--- a/drivers/net/ethernet/lantiq_etop.c
++++ b/drivers/net/ethernet/lantiq_etop.c
+@@ -11,7 +11,7 @@
+  *   You should have received a copy of the GNU General Public License
+  *   along with this program; if not, see <http://www.gnu.org/licenses/>.
+  *
+- *   Copyright (C) 2011 John Crispin <blogic@openwrt.org>
++ *   Copyright (C) 2011-12 John Crispin <blogic@openwrt.org>
+  */
+ 
+ #include <linux/kernel.h>
+@@ -30,11 +30,16 @@
+ #include <linux/mm.h>
+ #include <linux/platform_device.h>
+ #include <linux/ethtool.h>
++#include <linux/if_vlan.h>
+ #include <linux/init.h>
+ #include <linux/delay.h>
+ #include <linux/io.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/of_net.h>
++#include <linux/of_irq.h>
++#include <linux/of_platform.h>
+ 
+ #include <asm/checksum.h>
+ 
+@@ -42,7 +47,7 @@
+ #include <xway_dma.h>
+ #include <lantiq_platform.h>
+ 
+-#define LTQ_ETOP_MDIO		0x11804
++#define LTQ_ETOP_MDIO_ACC	0x11804
+ #define MDIO_REQUEST		0x80000000
+ #define MDIO_READ		0x40000000
+ #define MDIO_ADDR_MASK		0x1f
+@@ -51,44 +56,91 @@
+ #define MDIO_REG_OFFSET		0x10
+ #define MDIO_VAL_MASK		0xffff
+ 
+-#define PPE32_CGEN		0x800
+-#define LQ_PPE32_ENET_MAC_CFG	0x1840
++#define LTQ_ETOP_MDIO_CFG       0x11800
++#define MDIO_CFG_MASK           0x6
++
++#define LTQ_ETOP_CFG            0x11808
++#define LTQ_ETOP_IGPLEN         0x11820
++#define LTQ_ETOP_MAC_CFG	0x11840
+ 
+ #define LTQ_ETOP_ENETS0		0x11850
+ #define LTQ_ETOP_MAC_DA0	0x1186C
+ #define LTQ_ETOP_MAC_DA1	0x11870
+-#define LTQ_ETOP_CFG		0x16020
+-#define LTQ_ETOP_IGPLEN		0x16080
++
++#define MAC_CFG_MASK		0xfff
++#define MAC_CFG_CGEN		(1 << 11)
++#define MAC_CFG_DUPLEX		(1 << 2)
++#define MAC_CFG_SPEED		(1 << 1)
++#define MAC_CFG_LINK		(1 << 0)
+ 
+ #define MAX_DMA_CHAN		0x8
+ #define MAX_DMA_CRC_LEN		0x4
+ #define MAX_DMA_DATA_LEN	0x600
+ 
+ #define ETOP_FTCU		BIT(28)
+-#define ETOP_MII_MASK		0xf
+-#define ETOP_MII_NORMAL		0xd
+-#define ETOP_MII_REVERSE	0xe
+ #define ETOP_PLEN_UNDER		0x40
+-#define ETOP_CGEN		0x800
++#define ETOP_CFG_MII0		0x01
+ 
+-/* use 2 static channels for TX/RX */
+-#define LTQ_ETOP_TX_CHANNEL	1
+-#define LTQ_ETOP_RX_CHANNEL	6
+-#define IS_TX(x)		(x == LTQ_ETOP_TX_CHANNEL)
+-#define IS_RX(x)		(x == LTQ_ETOP_RX_CHANNEL)
++#define ETOP_CFG_MASK           0xfff
++#define ETOP_CFG_FEN0		(1 << 8)
++#define ETOP_CFG_SEN0		(1 << 6)
++#define ETOP_CFG_OFF1		(1 << 3)
++#define ETOP_CFG_REMII0		(1 << 1)
++#define ETOP_CFG_OFF0		(1 << 0)
++
++#define LTQ_GBIT_MDIO_CTL	0xCC
++#define LTQ_GBIT_MDIO_DATA	0xd0
++#define LTQ_GBIT_GCTL0		0x68
++#define LTQ_GBIT_PMAC_HD_CTL	0x8c
++#define LTQ_GBIT_P0_CTL		0x4
++#define LTQ_GBIT_PMAC_RX_IPG	0xa8
++#define LTQ_GBIT_RGMII_CTL	0x78
++
++#define PMAC_HD_CTL_AS		(1 << 19)
++#define PMAC_HD_CTL_RXSH	(1 << 22)
++
++/* Switch Enable (0=disable, 1=enable) */
++#define GCTL0_SE		0x80000000
++/* Disable MDIO auto polling (0=disable, 1=enable) */
++#define PX_CTL_DMDIO		0x00400000
++
++/* MDC clock divider, clock = 25MHz/((MDC_CLOCK + 1) * 2) */
++#define MDC_CLOCK_MASK		0xff000000
++#define MDC_CLOCK_OFFSET	24
++
++/* register information for the gbit's MDIO bus */
++#define MDIO_XR9_REQUEST	0x00008000
++#define MDIO_XR9_READ		0x00000800
++#define MDIO_XR9_WRITE		0x00000400
++#define MDIO_XR9_REG_MASK	0x1f
++#define MDIO_XR9_ADDR_MASK	0x1f
++#define MDIO_XR9_RD_MASK	0xffff
++#define MDIO_XR9_REG_OFFSET	0
++#define MDIO_XR9_ADDR_OFFSET	5
++#define MDIO_XR9_WR_OFFSET	16
+ 
++#define LTQ_DMA_ETOP	((of_machine_is_compatible("lantiq,ase")) ? \
++			(INT_NUM_IM3_IRL0) : (INT_NUM_IM2_IRL0))
++
++/* the newer xway socks have a embedded 3/7 port gbit multiplexer */
+ #define ltq_etop_r32(x)		ltq_r32(ltq_etop_membase + (x))
+ #define ltq_etop_w32(x, y)	ltq_w32(x, ltq_etop_membase + (y))
+ #define ltq_etop_w32_mask(x, y, z)	\
+ 		ltq_w32_mask(x, y, ltq_etop_membase + (z))
+ 
+-#define DRV_VERSION	"1.0"
++#define ltq_gbit_r32(x)		ltq_r32(ltq_gbit_membase + (x))
++#define ltq_gbit_w32(x, y)	ltq_w32(x, ltq_gbit_membase + (y))
++#define ltq_gbit_w32_mask(x, y, z)	\
++		ltq_w32_mask(x, y, ltq_gbit_membase + (z))
++
++#define DRV_VERSION	"1.2"
+ 
+ static void __iomem *ltq_etop_membase;
++static void __iomem *ltq_gbit_membase;
+ 
+ struct ltq_etop_chan {
+-	int idx;
+ 	int tx_free;
++	int irq;
+ 	struct net_device *netdev;
+ 	struct napi_struct napi;
+ 	struct ltq_dma_channel dma;
+@@ -98,21 +150,34 @@ struct ltq_etop_chan {
+ struct ltq_etop_priv {
+ 	struct net_device *netdev;
+ 	struct platform_device *pdev;
+-	struct ltq_eth_data *pldata;
+ 	struct resource *res;
+ 
+ 	struct mii_bus *mii_bus;
+ 
+-	struct ltq_etop_chan ch[MAX_DMA_CHAN];
+-	int tx_free[MAX_DMA_CHAN >> 1];
++	struct ltq_etop_chan txch;
++	struct ltq_etop_chan rxch;
++
++	int tx_irq;
++	int rx_irq;
++
++	unsigned char mac[6];
++	int mii_mode;
+ 
+ 	spinlock_t lock;
++
++	struct clk *clk_ppe;
++	struct clk *clk_switch;
++	struct clk *clk_ephy;
++	struct clk *clk_ephycgu;
+ };
+ 
++static int ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr,
++				int phy_reg, u16 phy_data);
++
+ static int
+ ltq_etop_alloc_skb(struct ltq_etop_chan *ch)
+ {
+-	ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN);
++	ch->skb[ch->dma.desc] = dev_alloc_skb(MAX_DMA_DATA_LEN);
+ 	if (!ch->skb[ch->dma.desc])
+ 		return -ENOMEM;
+ 	ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL,
+@@ -147,8 +212,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan
+ 	spin_unlock_irqrestore(&priv->lock, flags);
+ 
+ 	skb_put(skb, len);
++	skb->dev = ch->netdev;
+ 	skb->protocol = eth_type_trans(skb, ch->netdev);
+ 	netif_receive_skb(skb);
++	ch->netdev->stats.rx_packets++;
++	ch->netdev->stats.rx_bytes += len;
+ }
+ 
+ static int
+@@ -156,7 +224,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
+ {
+ 	struct ltq_etop_chan *ch = container_of(napi,
+ 				struct ltq_etop_chan, napi);
++	struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
+ 	int work_done = 0;
++	unsigned long flags;
+ 
+ 	while (work_done < budget) {
+ 		struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
+@@ -168,7 +238,9 @@ ltq_etop_poll_rx(struct napi_struct *nap
+ 	}
+ 	if (work_done < budget) {
+ 		napi_complete_done(&ch->napi, work_done);
++		spin_lock_irqsave(&priv->lock, flags);
+ 		ltq_dma_ack_irq(&ch->dma);
++		spin_unlock_irqrestore(&priv->lock, flags);
+ 	}
+ 	return work_done;
+ }
+@@ -180,12 +252,14 @@ ltq_etop_poll_tx(struct napi_struct *nap
+ 		container_of(napi, struct ltq_etop_chan, napi);
+ 	struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
+ 	struct netdev_queue *txq =
+-		netdev_get_tx_queue(ch->netdev, ch->idx >> 1);
++		netdev_get_tx_queue(ch->netdev, ch->dma.nr >> 1);
+ 	unsigned long flags;
+ 
+ 	spin_lock_irqsave(&priv->lock, flags);
+ 	while ((ch->dma.desc_base[ch->tx_free].ctl &
+ 			(LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
++		ch->netdev->stats.tx_packets++;
++		ch->netdev->stats.tx_bytes += ch->skb[ch->tx_free]->len;
+ 		dev_kfree_skb_any(ch->skb[ch->tx_free]);
+ 		ch->skb[ch->tx_free] = NULL;
+ 		memset(&ch->dma.desc_base[ch->tx_free], 0,
+@@ -198,7 +272,9 @@ ltq_etop_poll_tx(struct napi_struct *nap
+ 	if (netif_tx_queue_stopped(txq))
+ 		netif_tx_start_queue(txq);
+ 	napi_complete(&ch->napi);
++	spin_lock_irqsave(&priv->lock, flags);
+ 	ltq_dma_ack_irq(&ch->dma);
++	spin_unlock_irqrestore(&priv->lock, flags);
+ 	return 1;
+ }
+ 
+@@ -206,9 +282,10 @@ static irqreturn_t
+ ltq_etop_dma_irq(int irq, void *_priv)
+ {
+ 	struct ltq_etop_priv *priv = _priv;
+-	int ch = irq - LTQ_DMA_CH0_INT;
+-
+-	napi_schedule(&priv->ch[ch].napi);
++	if (irq == priv->txch.dma.irq)
++		napi_schedule(&priv->txch.napi);
++	else
++		napi_schedule(&priv->rxch.napi);
+ 	return IRQ_HANDLED;
+ }
+ 
+@@ -220,7 +297,7 @@ ltq_etop_free_channel(struct net_device
+ 	ltq_dma_free(&ch->dma);
+ 	if (ch->dma.irq)
+ 		free_irq(ch->dma.irq, priv);
+-	if (IS_RX(ch->idx)) {
++	if (ch == &priv->txch) {
+ 		int desc;
+ 		for (desc = 0; desc < LTQ_DESC_NUM; desc++)
+ 			dev_kfree_skb_any(ch->skb[ch->dma.desc]);
+@@ -231,65 +308,133 @@ static void
+ ltq_etop_hw_exit(struct net_device *dev)
+ {
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+-	int i;
+ 
+-	ltq_pmu_disable(PMU_PPE);
+-	for (i = 0; i < MAX_DMA_CHAN; i++)
+-		if (IS_TX(i) || IS_RX(i))
+-			ltq_etop_free_channel(dev, &priv->ch[i]);
++	clk_disable(priv->clk_ppe);
++
++	if (of_machine_is_compatible("lantiq,ar9"))
++		clk_disable(priv->clk_switch);
++
++	if (of_machine_is_compatible("lantiq,ase")) {
++		clk_disable(priv->clk_ephy);
++		clk_disable(priv->clk_ephycgu);
++	}
++
++	ltq_etop_free_channel(dev, &priv->txch);
++	ltq_etop_free_channel(dev, &priv->rxch);
++}
++
++static void
++ltq_etop_gbit_init(struct net_device *dev)
++{
++	struct ltq_etop_priv *priv = netdev_priv(dev);
++
++	clk_enable(priv->clk_switch);
++
++	/* enable gbit port0 on the SoC */
++	ltq_gbit_w32_mask((1 << 17), (1 << 18), LTQ_GBIT_P0_CTL);
++
++	ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0);
++	/* disable MDIO auto polling mode */
++	ltq_gbit_w32_mask(0, PX_CTL_DMDIO, LTQ_GBIT_P0_CTL);
++	/* set 1522 packet size */
++	ltq_gbit_w32_mask(0x300, 0, LTQ_GBIT_GCTL0);
++	/* disable pmac & dmac headers */
++	ltq_gbit_w32_mask(PMAC_HD_CTL_AS | PMAC_HD_CTL_RXSH, 0,
++		LTQ_GBIT_PMAC_HD_CTL);
++	/* Due to traffic halt when burst length 8,
++		replace default IPG value with 0x3B */
++	ltq_gbit_w32(0x3B, LTQ_GBIT_PMAC_RX_IPG);
++	/* set mdc clock to 2.5 MHz */
++	ltq_gbit_w32_mask(MDC_CLOCK_MASK, 4 << MDC_CLOCK_OFFSET,
++		LTQ_GBIT_RGMII_CTL);
+ }
+ 
+ static int
+ ltq_etop_hw_init(struct net_device *dev)
+ {
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+-	int i;
++	int mii_mode = priv->mii_mode;
++
++	clk_enable(priv->clk_ppe);
+ 
+-	ltq_pmu_enable(PMU_PPE);
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		ltq_etop_gbit_init(dev);
++		/* force the etops link to the gbit to MII */
++		mii_mode = PHY_INTERFACE_MODE_MII;
++	}
++	ltq_etop_w32_mask(MDIO_CFG_MASK, 0, LTQ_ETOP_MDIO_CFG);
++	ltq_etop_w32_mask(MAC_CFG_MASK, MAC_CFG_CGEN | MAC_CFG_DUPLEX |
++			MAC_CFG_SPEED | MAC_CFG_LINK, LTQ_ETOP_MAC_CFG);
+ 
+-	switch (priv->pldata->mii_mode) {
++	switch (mii_mode) {
+ 	case PHY_INTERFACE_MODE_RMII:
+-		ltq_etop_w32_mask(ETOP_MII_MASK,
+-			ETOP_MII_REVERSE, LTQ_ETOP_CFG);
++		ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_REMII0 | ETOP_CFG_OFF1 |
++			ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG);
+ 		break;
+ 
+ 	case PHY_INTERFACE_MODE_MII:
+-		ltq_etop_w32_mask(ETOP_MII_MASK,
+-			ETOP_MII_NORMAL, LTQ_ETOP_CFG);
++		ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_OFF1 |
++			ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG);
+ 		break;
+ 
+ 	default:
++		if (of_machine_is_compatible("lantiq,ase")) {
++			clk_enable(priv->clk_ephy);
++			/* disable external MII */
++			ltq_etop_w32_mask(0, ETOP_CFG_MII0, LTQ_ETOP_CFG);
++			/* enable clock for internal PHY */
++			clk_enable(priv->clk_ephycgu);
++			/* we need to write this magic to the internal phy to
++			   make it work */
++			ltq_etop_mdio_wr(NULL, 0x8, 0x12, 0xC020);
++			pr_info("Selected EPHY mode\n");
++			break;
++		}
+ 		netdev_err(dev, "unknown mii mode %d\n",
+-			priv->pldata->mii_mode);
++			mii_mode);
+ 		return -ENOTSUPP;
+ 	}
+ 
+-	/* enable crc generation */
+-	ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG);
++	return 0;
++}
++
++static int
++ltq_etop_dma_init(struct net_device *dev)
++{
++	struct ltq_etop_priv *priv = netdev_priv(dev);
++	int tx = priv->tx_irq - LTQ_DMA_ETOP;
++	int rx = priv->rx_irq - LTQ_DMA_ETOP;
++	int err;
+ 
+ 	ltq_dma_init_port(DMA_PORT_ETOP);
+ 
+-	for (i = 0; i < MAX_DMA_CHAN; i++) {
+-		int irq = LTQ_DMA_CH0_INT + i;
+-		struct ltq_etop_chan *ch = &priv->ch[i];
+-
+-		ch->idx = ch->dma.nr = i;
+-
+-		if (IS_TX(i)) {
+-			ltq_dma_alloc_tx(&ch->dma);
+-			request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv);
+-		} else if (IS_RX(i)) {
+-			ltq_dma_alloc_rx(&ch->dma);
+-			for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM;
+-					ch->dma.desc++)
+-				if (ltq_etop_alloc_skb(ch))
+-					return -ENOMEM;
+-			ch->dma.desc = 0;
+-			request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv);
++	priv->txch.dma.nr = tx;
++	ltq_dma_alloc_tx(&priv->txch.dma);
++	err = request_irq(priv->tx_irq, ltq_etop_dma_irq, 0, "eth_tx", priv);
++	if (err) {
++		netdev_err(dev, "failed to allocate tx irq\n");
++		goto err_out;
++	}
++	priv->txch.dma.irq = priv->tx_irq;
++
++	priv->rxch.dma.nr = rx;
++	ltq_dma_alloc_rx(&priv->rxch.dma);
++	for (priv->rxch.dma.desc = 0; priv->rxch.dma.desc < LTQ_DESC_NUM;
++			priv->rxch.dma.desc++) {
++		if (ltq_etop_alloc_skb(&priv->rxch)) {
++			netdev_err(dev, "failed to allocate skbs\n");
++			err = -ENOMEM;
++			goto err_out;
+ 		}
+-		ch->dma.irq = irq;
+ 	}
+-	return 0;
++	priv->rxch.dma.desc = 0;
++	err = request_irq(priv->rx_irq, ltq_etop_dma_irq, 0, "eth_rx", priv);
++	if (err)
++		netdev_err(dev, "failed to allocate rx irq\n");
++	else
++		priv->rxch.dma.irq = priv->rx_irq;
++err_out:
++	return err;
+ }
+ 
+ static void
+@@ -303,7 +448,10 @@ ltq_etop_get_drvinfo(struct net_device *
+ static int
+ ltq_etop_nway_reset(struct net_device *dev)
+ {
+-	return phy_start_aneg(dev->phydev);
++	if (dev->phydev)
++		return phy_start_aneg(dev->phydev);
++	else
++		return 0;
+ }
+ 
+ static const struct ethtool_ops ltq_etop_ethtool_ops = {
+@@ -314,6 +462,39 @@ static const struct ethtool_ops ltq_etop
+ };
+ 
+ static int
++ltq_etop_mdio_wr_xr9(struct mii_bus *bus, int phy_addr,
++		int phy_reg, u16 phy_data)
++{
++	u32 val = MDIO_XR9_REQUEST | MDIO_XR9_WRITE |
++		(phy_data << MDIO_XR9_WR_OFFSET) |
++		((phy_addr & MDIO_XR9_ADDR_MASK) << MDIO_XR9_ADDR_OFFSET) |
++		((phy_reg & MDIO_XR9_REG_MASK) << MDIO_XR9_REG_OFFSET);
++
++	while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST)
++		;
++	ltq_gbit_w32(val, LTQ_GBIT_MDIO_CTL);
++	while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST)
++		;
++	return 0;
++}
++
++static int
++ltq_etop_mdio_rd_xr9(struct mii_bus *bus, int phy_addr, int phy_reg)
++{
++	u32 val = MDIO_XR9_REQUEST | MDIO_XR9_READ |
++		((phy_addr & MDIO_XR9_ADDR_MASK) << MDIO_XR9_ADDR_OFFSET) |
++		((phy_reg & MDIO_XR9_REG_MASK) << MDIO_XR9_REG_OFFSET);
++
++	while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST)
++		;
++	ltq_gbit_w32(val, LTQ_GBIT_MDIO_CTL);
++	while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST)
++		;
++	val = ltq_gbit_r32(LTQ_GBIT_MDIO_DATA) & MDIO_XR9_RD_MASK;
++	return val;
++}
++
++static int
+ ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data)
+ {
+ 	u32 val = MDIO_REQUEST |
+@@ -321,9 +502,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in
+ 		((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) |
+ 		phy_data;
+ 
+-	while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
++	while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST)
+ 		;
+-	ltq_etop_w32(val, LTQ_ETOP_MDIO);
++	ltq_etop_w32(val, LTQ_ETOP_MDIO_ACC);
+ 	return 0;
+ }
+ 
+@@ -334,12 +515,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in
+ 		((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) |
+ 		((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET);
+ 
+-	while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
++	while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST)
+ 		;
+-	ltq_etop_w32(val, LTQ_ETOP_MDIO);
+-	while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
++	ltq_etop_w32(val, LTQ_ETOP_MDIO_ACC);
++	while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST)
+ 		;
+-	val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK;
++	val = ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_VAL_MASK;
+ 	return val;
+ }
+ 
+@@ -354,8 +535,18 @@ ltq_etop_mdio_probe(struct net_device *d
+ {
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+ 	struct phy_device *phydev;
++	u32 phy_supported =  (SUPPORTED_10baseT_Half
++			| SUPPORTED_10baseT_Full
++			| SUPPORTED_100baseT_Half
++			| SUPPORTED_100baseT_Full
++			| SUPPORTED_Autoneg
++			| SUPPORTED_MII
++			| SUPPORTED_TP);
+ 
+-	phydev = phy_find_first(priv->mii_bus);
++	if (of_machine_is_compatible("lantiq,ase"))
++		phydev = mdiobus_get_phy(priv->mii_bus, 8);
++	else
++		phydev = mdiobus_get_phy(priv->mii_bus, 0);
+ 
+ 	if (!phydev) {
+ 		netdev_err(dev, "no PHY found\n");
+@@ -363,21 +554,18 @@ ltq_etop_mdio_probe(struct net_device *d
+ 	}
+ 
+ 	phydev = phy_connect(dev, phydev_name(phydev),
+-			     &ltq_etop_mdio_link, priv->pldata->mii_mode);
++			     &ltq_etop_mdio_link, priv->mii_mode);
+ 
+ 	if (IS_ERR(phydev)) {
+ 		netdev_err(dev, "Could not attach to PHY\n");
+ 		return PTR_ERR(phydev);
+ 	}
+ 
+-	phydev->supported &= (SUPPORTED_10baseT_Half
+-			      | SUPPORTED_10baseT_Full
+-			      | SUPPORTED_100baseT_Half
+-			      | SUPPORTED_100baseT_Full
+-			      | SUPPORTED_Autoneg
+-			      | SUPPORTED_MII
+-			      | SUPPORTED_TP);
++	if (of_machine_is_compatible("lantiq,ar9"))
++		phy_supported |= SUPPORTED_1000baseT_Half
++			| SUPPORTED_1000baseT_Full;
+ 
++	phydev->supported &= phy_supported;
+ 	phydev->advertising = phydev->supported;
+ 	phy_attached_info(phydev);
+ 
+@@ -398,8 +586,13 @@ ltq_etop_mdio_init(struct net_device *de
+ 	}
+ 
+ 	priv->mii_bus->priv = dev;
+-	priv->mii_bus->read = ltq_etop_mdio_rd;
+-	priv->mii_bus->write = ltq_etop_mdio_wr;
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		priv->mii_bus->read = ltq_etop_mdio_rd_xr9;
++		priv->mii_bus->write = ltq_etop_mdio_wr_xr9;
++	} else {
++		priv->mii_bus->read = ltq_etop_mdio_rd;
++		priv->mii_bus->write = ltq_etop_mdio_wr;
++	}
+ 	priv->mii_bus->name = "ltq_mii";
+ 	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
+ 		priv->pdev->name, priv->pdev->id);
+@@ -436,17 +629,19 @@ static int
+ ltq_etop_open(struct net_device *dev)
+ {
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+-	int i;
++	unsigned long flags;
+ 
+-	for (i = 0; i < MAX_DMA_CHAN; i++) {
+-		struct ltq_etop_chan *ch = &priv->ch[i];
++	napi_enable(&priv->txch.napi);
++	napi_enable(&priv->rxch.napi);
++
++	spin_lock_irqsave(&priv->lock, flags);
++	ltq_dma_open(&priv->txch.dma);
++	ltq_dma_open(&priv->rxch.dma);
++	spin_unlock_irqrestore(&priv->lock, flags);
++
++	if (dev->phydev)
++		phy_start(dev->phydev);
+ 
+-		if (!IS_TX(i) && (!IS_RX(i)))
+-			continue;
+-		ltq_dma_open(&ch->dma);
+-		napi_enable(&ch->napi);
+-	}
+-	phy_start(dev->phydev);
+ 	netif_tx_start_all_queues(dev);
+ 	return 0;
+ }
+@@ -455,18 +650,19 @@ static int
+ ltq_etop_stop(struct net_device *dev)
+ {
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+-	int i;
++	unsigned long flags;
+ 
+ 	netif_tx_stop_all_queues(dev);
+-	phy_stop(dev->phydev);
+-	for (i = 0; i < MAX_DMA_CHAN; i++) {
+-		struct ltq_etop_chan *ch = &priv->ch[i];
+-
+-		if (!IS_RX(i) && !IS_TX(i))
+-			continue;
+-		napi_disable(&ch->napi);
+-		ltq_dma_close(&ch->dma);
+-	}
++	if (dev->phydev)
++		phy_stop(dev->phydev);
++	napi_disable(&priv->txch.napi);
++	napi_disable(&priv->rxch.napi);
++
++	spin_lock_irqsave(&priv->lock, flags);
++	ltq_dma_close(&priv->txch.dma);
++	ltq_dma_close(&priv->rxch.dma);
++	spin_unlock_irqrestore(&priv->lock, flags);
++
+ 	return 0;
+ }
+ 
+@@ -476,16 +672,16 @@ ltq_etop_tx(struct sk_buff *skb, struct
+ 	int queue = skb_get_queue_mapping(skb);
+ 	struct netdev_queue *txq = netdev_get_tx_queue(dev, queue);
+ 	struct ltq_etop_priv *priv = netdev_priv(dev);
+-	struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1];
+-	struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
+-	int len;
++	struct ltq_dma_desc *desc =
++		&priv->txch.dma.desc_base[priv->txch.dma.desc];
+ 	unsigned long flags;
+ 	u32 byte_offset;
++	int len;
+ 
+ 	len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
+ 
+-	if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
+-		dev_kfree_skb_any(skb);
++	if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) ||
++			priv->txch.skb[priv->txch.dma.desc]) {
+ 		netdev_err(dev, "tx ring full\n");
+ 		netif_tx_stop_queue(txq);
+ 		return NETDEV_TX_BUSY;
+@@ -493,7 +689,7 @@ ltq_etop_tx(struct sk_buff *skb, struct
+ 
+ 	/* dma needs to start on a 16 byte aligned address */
+ 	byte_offset = CPHYSADDR(skb->data) % 16;
+-	ch->skb[ch->dma.desc] = skb;
++	priv->txch.skb[priv->txch.dma.desc] = skb;
+ 
+ 	netif_trans_update(dev);
+ 
+@@ -503,11 +699,11 @@ ltq_etop_tx(struct sk_buff *skb, struct
+ 	wmb();
+ 	desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
+ 		LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
+-	ch->dma.desc++;
+-	ch->dma.desc %= LTQ_DESC_NUM;
++	priv->txch.dma.desc++;
++	priv->txch.dma.desc %= LTQ_DESC_NUM;
+ 	spin_unlock_irqrestore(&priv->lock, flags);
+ 
+-	if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN)
++	if (priv->txch.dma.desc_base[priv->txch.dma.desc].ctl & LTQ_DMA_OWN)
+ 		netif_tx_stop_queue(txq);
+ 
+ 	return NETDEV_TX_OK;
+@@ -522,8 +718,10 @@ ltq_etop_change_mtu(struct net_device *d
+ 		struct ltq_etop_priv *priv = netdev_priv(dev);
+ 		unsigned long flags;
+ 
++		int max = ETH_HLEN + VLAN_HLEN + new_mtu + ETH_FCS_LEN;
++
+ 		spin_lock_irqsave(&priv->lock, flags);
+-		ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu,
++		ltq_etop_w32((ETOP_PLEN_UNDER << 16) | max,
+ 			LTQ_ETOP_IGPLEN);
+ 		spin_unlock_irqrestore(&priv->lock, flags);
+ 	}
+@@ -592,6 +790,9 @@ ltq_etop_init(struct net_device *dev)
+ 	if (err)
+ 		goto err_hw;
+ 	ltq_etop_change_mtu(dev, 1500);
++	err = ltq_etop_dma_init(dev);
++	if (err)
++		goto err_hw;
+ 
+ 	memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
+ 	if (!is_valid_ether_addr(mac.sa_data)) {
+@@ -609,9 +810,10 @@ ltq_etop_init(struct net_device *dev)
+ 		dev->addr_assign_type = NET_ADDR_RANDOM;
+ 
+ 	ltq_etop_set_multicast_list(dev);
+-	err = ltq_etop_mdio_init(dev);
+-	if (err)
+-		goto err_netdev;
++	if (!ltq_etop_mdio_init(dev))
++		dev->ethtool_ops = &ltq_etop_ethtool_ops;
++	else
++		pr_warn("etop: mdio probe failed\n");;
+ 	return 0;
+ 
+ err_netdev:
+@@ -631,6 +833,9 @@ ltq_etop_tx_timeout(struct net_device *d
+ 	err = ltq_etop_hw_init(dev);
+ 	if (err)
+ 		goto err_hw;
++	err = ltq_etop_dma_init(dev);
++	if (err)
++		goto err_hw;
+ 	netif_trans_update(dev);
+ 	netif_wake_queue(dev);
+ 	return;
+@@ -654,14 +859,19 @@ static const struct net_device_ops ltq_e
+ 	.ndo_tx_timeout = ltq_etop_tx_timeout,
+ };
+ 
+-static int __init
+-ltq_etop_probe(struct platform_device *pdev)
++static int ltq_etop_probe(struct platform_device *pdev)
+ {
+ 	struct net_device *dev;
+ 	struct ltq_etop_priv *priv;
+-	struct resource *res;
++	struct resource *res, *gbit_res, irqres[2];
++	const u8 *mac;
+ 	int err;
+-	int i;
++
++	err = of_irq_to_resource_table(pdev->dev.of_node, irqres, 2);
++	if (err != 2) {
++		dev_err(&pdev->dev, "failed to get etop irqs\n");
++		return -EINVAL;
++	}
+ 
+ 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ 	if (!res) {
+@@ -687,31 +897,62 @@ ltq_etop_probe(struct platform_device *p
+ 		goto err_out;
+ 	}
+ 
+-	dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
+-	if (!dev) {
+-		err = -ENOMEM;
+-		goto err_out;
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		gbit_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++		if (!gbit_res) {
++			dev_err(&pdev->dev, "failed to get gbit resource\n");
++			err = -ENOENT;
++			goto err_out;
++		}
++		ltq_gbit_membase = devm_ioremap_nocache(&pdev->dev,
++			gbit_res->start, resource_size(gbit_res));
++		if (!ltq_gbit_membase) {
++			dev_err(&pdev->dev, "failed to remap gigabit switch %d\n",
++				pdev->id);
++			err = -ENOMEM;
++			goto err_out;
++		}
+ 	}
++
++	dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
+ 	strcpy(dev->name, "eth%d");
+ 	dev->netdev_ops = &ltq_eth_netdev_ops;
+-	dev->ethtool_ops = &ltq_etop_ethtool_ops;
+ 	priv = netdev_priv(dev);
+ 	priv->res = res;
+ 	priv->pdev = pdev;
+-	priv->pldata = dev_get_platdata(&pdev->dev);
+ 	priv->netdev = dev;
++	priv->tx_irq = irqres[0].start;
++	priv->rx_irq = irqres[1].start;
++	priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
++
++	mac = of_get_mac_address(pdev->dev.of_node);
++	if (mac)
++		memcpy(priv->mac, mac, ETH_ALEN);
++
++	priv->clk_ppe = clk_get(&pdev->dev, NULL);
++	if (IS_ERR(priv->clk_ppe))
++		return PTR_ERR(priv->clk_ppe);
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		priv->clk_switch = clk_get(&pdev->dev, "switch");
++		if (IS_ERR(priv->clk_switch))
++			return PTR_ERR(priv->clk_switch);
++	}
++	if (of_machine_is_compatible("lantiq,ase")) {
++		priv->clk_ephy = clk_get(&pdev->dev, "ephy");
++		if (IS_ERR(priv->clk_ephy))
++			return PTR_ERR(priv->clk_ephy);
++		priv->clk_ephycgu = clk_get(&pdev->dev, "ephycgu");
++		if (IS_ERR(priv->clk_ephycgu))
++			return PTR_ERR(priv->clk_ephycgu);
++	}
++
+ 	spin_lock_init(&priv->lock);
+ 	SET_NETDEV_DEV(dev, &pdev->dev);
+ 
+-	for (i = 0; i < MAX_DMA_CHAN; i++) {
+-		if (IS_TX(i))
+-			netif_napi_add(dev, &priv->ch[i].napi,
+-				ltq_etop_poll_tx, 8);
+-		else if (IS_RX(i))
+-			netif_napi_add(dev, &priv->ch[i].napi,
+-				ltq_etop_poll_rx, 32);
+-		priv->ch[i].netdev = dev;
+-	}
++	netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
++	netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
++	priv->txch.netdev = dev;
++	priv->rxch.netdev = dev;
+ 
+ 	err = register_netdev(dev);
+ 	if (err)
+@@ -740,31 +981,22 @@ ltq_etop_remove(struct platform_device *
+ 	return 0;
+ }
+ 
++static const struct of_device_id ltq_etop_match[] = {
++	{ .compatible = "lantiq,etop-xway" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, ltq_etop_match);
++
+ static struct platform_driver ltq_mii_driver = {
++	.probe = ltq_etop_probe,
+ 	.remove = ltq_etop_remove,
+ 	.driver = {
+ 		.name = "ltq_etop",
++		.of_match_table = ltq_etop_match,
+ 	},
+ };
+ 
+-int __init
+-init_ltq_etop(void)
+-{
+-	int ret = platform_driver_probe(&ltq_mii_driver, ltq_etop_probe);
+-
+-	if (ret)
+-		pr_err("ltq_etop: Error registering platform driver!");
+-	return ret;
+-}
+-
+-static void __exit
+-exit_ltq_etop(void)
+-{
+-	platform_driver_unregister(&ltq_mii_driver);
+-}
+-
+-module_init(init_ltq_etop);
+-module_exit(exit_ltq_etop);
++module_platform_driver(ltq_mii_driver);
+ 
+ MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
+ MODULE_DESCRIPTION("Lantiq SoC ETOP");

target/linux/lantiq/patches-4.14/0030-GPIO-add-named-gpio-exports.patch

@@ -0,0 +1,170 @@
+From cc809a441d8f2924f785eb863dfa6aef47a25b0b Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Tue, 12 Aug 2014 20:49:27 +0200
+Subject: [PATCH 30/36] GPIO: add named gpio exports
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/gpio/gpiolib-of.c     |   68 +++++++++++++++++++++++++++++++++++++++++
+ drivers/gpio/gpiolib.c        |   11 +++++--
+ include/asm-generic/gpio.h    |    5 +++
+ include/linux/gpio/consumer.h |    8 +++++
+ 4 files changed, 90 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpio/gpiolib-of.c
++++ b/drivers/gpio/gpiolib-of.c
+@@ -23,6 +23,8 @@
+ #include <linux/pinctrl/pinctrl.h>
+ #include <linux/slab.h>
+ #include <linux/gpio/machine.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
+ 
+ #include "gpiolib.h"
+ 
+@@ -538,3 +540,73 @@ void of_gpiochip_remove(struct gpio_chip
+ 	gpiochip_remove_pin_ranges(chip);
+ 	of_node_put(chip->of_node);
+ }
++
++#ifdef CONFIG_GPIO_SYSFS
++
++static struct of_device_id gpio_export_ids[] = {
++	{ .compatible = "gpio-export" },
++	{ /* sentinel */ }
++};
++
++static int __init of_gpio_export_probe(struct platform_device *pdev)
++{
++	struct device_node *np = pdev->dev.of_node;
++	struct device_node *cnp;
++	u32 val;
++	int nb = 0;
++
++	for_each_child_of_node(np, cnp) {
++		const char *name = NULL;
++		int gpio;
++		bool dmc;
++		int max_gpio = 1;
++		int i;
++
++		of_property_read_string(cnp, "gpio-export,name", &name);
++
++		if (!name)
++			max_gpio = of_gpio_count(cnp);
++
++		for (i = 0; i < max_gpio; i++) {
++			unsigned flags = 0;
++			enum of_gpio_flags of_flags;
++
++			gpio = of_get_gpio_flags(cnp, i, &of_flags);
++
++			if (of_flags == OF_GPIO_ACTIVE_LOW)
++				flags |= GPIOF_ACTIVE_LOW;
++
++			if (!of_property_read_u32(cnp, "gpio-export,output", &val))
++				flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
++			else
++				flags |= GPIOF_IN;
++
++			if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np)))
++				continue;
++
++			dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change");
++			gpio_export_with_name(gpio, dmc, name);
++			nb++;
++		}
++	}
++
++	dev_info(&pdev->dev, "%d gpio(s) exported\n", nb);
++
++	return 0;
++}
++
++static struct platform_driver gpio_export_driver = {
++	.driver		= {
++		.name		= "gpio-export",
++		.owner	= THIS_MODULE,
++		.of_match_table	= of_match_ptr(gpio_export_ids),
++	},
++};
++
++static int __init of_gpio_export_init(void)
++{
++	return platform_driver_probe(&gpio_export_driver, of_gpio_export_probe);
++}
++device_initcall(of_gpio_export_init);
++
++#endif
+--- a/include/asm-generic/gpio.h
++++ b/include/asm-generic/gpio.h
+@@ -126,6 +126,12 @@ static inline int gpio_export(unsigned g
+ 	return gpiod_export(gpio_to_desc(gpio), direction_may_change);
+ }
+ 
++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
++static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name)
++{
++	return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name);
++}
++
+ static inline int gpio_export_link(struct device *dev, const char *name,
+ 				   unsigned gpio)
+ {
+--- a/include/linux/gpio/consumer.h
++++ b/include/linux/gpio/consumer.h
+@@ -427,6 +427,7 @@ static inline struct gpio_desc *devm_get
+ 
+ #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
+ 
++int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
+ int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
+ int gpiod_export_link(struct device *dev, const char *name,
+ 		      struct gpio_desc *desc);
+@@ -434,6 +435,13 @@ void gpiod_unexport(struct gpio_desc *de
+ 
+ #else  /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
+ 
++static inline int _gpiod_export(struct gpio_desc *desc,
++			       bool direction_may_change,
++			       const char *name)
++{
++	return -ENOSYS;
++}
++
+ static inline int gpiod_export(struct gpio_desc *desc,
+ 			       bool direction_may_change)
+ {
+--- a/drivers/gpio/gpiolib-sysfs.c
++++ b/drivers/gpio/gpiolib-sysfs.c
+@@ -544,7 +544,7 @@ static struct class gpio_class = {
+  *
+  * Returns zero on success, else an error.
+  */
+-int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name)
+ {
+ 	struct gpio_chip	*chip;
+ 	struct gpio_device	*gdev;
+@@ -606,6 +606,8 @@ int gpiod_export(struct gpio_desc *desc,
+ 	offset = gpio_chip_hwgpio(desc);
+ 	if (chip->names && chip->names[offset])
+ 		ioname = chip->names[offset];
++	if (name)
++		ioname = name;
+ 
+ 	dev = device_create_with_groups(&gpio_class, &gdev->dev,
+ 					MKDEV(0, 0), data, gpio_groups,
+@@ -627,6 +629,12 @@ err_unlock:
+ 	gpiod_dbg(desc, "%s: status %d\n", __func__, status);
+ 	return status;
+ }
++EXPORT_SYMBOL_GPL(__gpiod_export);
++
++int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
++{
++	return __gpiod_export(desc, direction_may_change, NULL);
++}
+ EXPORT_SYMBOL_GPL(gpiod_export);
+ 
+ static int match_export(struct device *dev, const void *desc)

target/linux/lantiq/patches-4.14/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

@@ -0,0 +1,219 @@
+From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Wed, 10 Sep 2014 22:42:14 +0200
+Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |   3 +
+ arch/mips/lantiq/xway/Makefile                     |   3 +
+ arch/mips/lantiq/xway/ath5k_eep.c                  | 136 +++++++++++++++++++++
+ arch/mips/lantiq/xway/eth_mac.c                    |  25 ++++
+ drivers/net/ethernet/lantiq_etop.c                 |   6 +-
+ 5 files changed, 172 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/lantiq/xway/ath5k_eep.c
+ create mode 100644 arch/mips/lantiq/xway/eth_mac.c
+
+--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+@@ -104,5 +104,8 @@ int xrx200_gphy_boot(struct device *dev,
+ extern void ltq_pmu_enable(unsigned int module);
+ extern void ltq_pmu_disable(unsigned int module);
+ 
++/* allow the ethernet driver to load a flash mapped mac addr */
++const u8* ltq_get_eth_mac(void);
++
+ #endif /* CONFIG_SOC_TYPE_XWAY */
+ #endif /* _LTQ_XWAY_H__ */
+--- a/arch/mips/lantiq/xway/Makefile
++++ b/arch/mips/lantiq/xway/Makefile
+@@ -8,4 +8,7 @@ endif
+ 
+ obj-y += vmmc.o
+ 
++obj-y += eth_mac.o
++obj-$(CONFIG_PCI) += ath5k_eep.o
++
+ obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
+--- /dev/null
++++ b/arch/mips/lantiq/xway/ath5k_eep.c
+@@ -0,0 +1,136 @@
++/*
++ *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
++ *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
++ *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
++ *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
++ *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
++ *  Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/etherdevice.h>
++#include <linux/ath5k_platform.h>
++#include <linux/pci.h>
++#include <linux/err.h>
++#include <linux/mtd/mtd.h>
++#include <lantiq_soc.h>
++
++extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
++struct ath5k_platform_data ath5k_pdata;
++static u8 athxk_eeprom_mac[6];
++
++static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
++{
++	dev->dev.platform_data = &ath5k_pdata;
++	return 0;
++}
++
++static int ath5k_eep_load;
++int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
++{
++	struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
++	int mac_offset;
++	u32 mac_inc = 0;
++	int i;
++	struct mtd_info *the_mtd;
++	size_t flash_readlen;
++	const __be32 *list;
++	const char *part;
++	phandle phandle;
++
++	list = of_get_property(np, "ath,eep-flash", &i);
++	if (!list || (i != (2 * sizeof(*list))))
++		return -ENODEV;
++
++	phandle = be32_to_cpup(list++);
++	if (phandle)
++		mtd_np = of_find_node_by_phandle(phandle);
++
++	if (!mtd_np)
++		return -ENODEV;
++
++	part = of_get_property(mtd_np, "label", NULL);
++	if (!part)
++		part = mtd_np->name;
++
++	the_mtd = get_mtd_device_nm(part);
++	if (IS_ERR(the_mtd))
++		return -ENODEV;
++
++	ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1, GFP_KERNEL);
++
++	i = mtd_read(the_mtd, be32_to_cpup(list), ATH5K_PLAT_EEP_MAX_WORDS << 1,
++		&flash_readlen, (void *) ath5k_pdata.eeprom_data);
++
++	if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
++		size_t mac_readlen;
++		mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
++			(void *) athxk_eeprom_mac);
++	}
++	put_mtd_device(the_mtd);
++
++	if (((ATH5K_PLAT_EEP_MAX_WORDS<<1) != flash_readlen) || i) {
++		dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
++		return -ENODEV;
++	}
++
++	if (of_find_property(np, "ath,eep-swap", NULL))
++		for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
++			ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
++
++	if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
++		ether_addr_copy(athxk_eeprom_mac, ltq_get_eth_mac());
++
++	if (!is_valid_ether_addr(athxk_eeprom_mac)) {
++		dev_warn(&pdev->dev, "using random mac\n");
++		random_ether_addr(athxk_eeprom_mac);
++	}
++
++	if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
++		athxk_eeprom_mac[5] += mac_inc;
++
++	ath5k_pdata.macaddr = athxk_eeprom_mac;
++	ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
++
++	dev_info(&pdev->dev, "loaded ath5k eeprom\n");
++
++	return 0;
++}
++
++static struct of_device_id ath5k_eeprom_ids[] = {
++	{ .compatible = "ath5k,eeprom" },
++	{ }
++};
++
++static struct platform_driver ath5k_eeprom_driver = {
++	.driver		= {
++		.name		= "ath5k,eeprom",
++		.owner	= THIS_MODULE,
++		.of_match_table	= of_match_ptr(ath5k_eeprom_ids),
++	},
++};
++
++static int __init of_ath5k_eeprom_init(void)
++{
++	int ret = platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
++
++	if (ret)
++		ath5k_eep_load = 1;
++
++	return ret;
++}
++
++static int __init of_ath5k_eeprom_init_late(void)
++{
++	if (!ath5k_eep_load)
++		return 0;
++
++	return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
++}
++late_initcall(of_ath5k_eeprom_init_late);
++subsys_initcall(of_ath5k_eeprom_init);
+--- /dev/null
++++ b/arch/mips/lantiq/xway/eth_mac.c
+@@ -0,0 +1,25 @@
++/*
++ *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/if_ether.h>
++
++static u8 eth_mac[6];
++static int eth_mac_set;
++
++const u8* ltq_get_eth_mac(void)
++{
++	return eth_mac;
++}
++
++static int __init setup_ethaddr(char *str)
++{
++	eth_mac_set = mac_pton(str, eth_mac);
++	return !eth_mac_set;
++}
++early_param("ethaddr", setup_ethaddr);
+--- a/drivers/net/ethernet/lantiq_etop.c
++++ b/drivers/net/ethernet/lantiq_etop.c
+@@ -794,7 +794,11 @@ ltq_etop_init(struct net_device *dev)
+ 	if (err)
+ 		goto err_hw;
+ 
+-	memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
++	memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
++
++	if (priv->mac && !is_valid_ether_addr(mac.sa_data))
++		memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
++
+ 	if (!is_valid_ether_addr(mac.sa_data)) {
+ 		pr_warn("etop: invalid MAC, using random\n");
+ 		eth_random_addr(mac.sa_data);

target/linux/lantiq/patches-4.14/0040-USB-DWC2-enable-usb-power-gpio.patch

@@ -0,0 +1,35 @@
+--- a/drivers/usb/dwc2/platform.c
++++ b/drivers/usb/dwc2/platform.c
+@@ -42,6 +42,7 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/of_device.h>
+ #include <linux/mutex.h>
++#include <linux/of_gpio.h>
+ #include <linux/platform_device.h>
+ #include <linux/phy/phy.h>
+ #include <linux/platform_data/s3c-hsotg.h>
+@@ -544,6 +545,7 @@ static int dwc2_driver_probe(struct plat
+ 	struct dwc2_hsotg *hsotg;
+ 	struct resource *res;
+ 	int retval;
++	int gpio_count;	
+ 
+ 	match = of_match_device(dwc2_of_match_table, &dev->dev);
+ 	if (match && match->data) {
+@@ -562,6 +564,16 @@ static int dwc2_driver_probe(struct plat
+ 		defparams.dma_desc_fs_enable = 0;
+ 	}
+ 
++	gpio_count = of_gpio_count(dev->dev.of_node);
++	while (gpio_count > 0) {
++		enum of_gpio_flags flags;
++		int gpio = of_get_gpio_flags(dev->dev.of_node, --gpio_count, &flags);
++		if (gpio_request(gpio, "usb"))
++			continue;
++		dev_info(&dev->dev, "requested GPIO %d\n", gpio);
++		gpio_direction_output(gpio, (flags & OF_GPIO_ACTIVE_LOW) ? (0) : (1));
++	}
++
+ 	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
+ 	if (!hsotg)
+ 		return -ENOMEM;

target/linux/lantiq/patches-4.14/0042-arch-mips-increase-io_space_limit.patch

@@ -0,0 +1,23 @@
+From 9807eb80a1b3bad7a4a89aa6566497bb1cadd6ef Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Fri, 3 Jun 2016 13:12:20 +0200
+Subject: [PATCH] arch: mips: increase io_space_limit
+
+this value comes from x86 and breaks some pci devices
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ arch/mips/include/asm/io.h |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/io.h
++++ b/arch/mips/include/asm/io.h
+@@ -50,7 +50,7 @@
+ 
+ /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
+ 
+-#define IO_SPACE_LIMIT 0xffff
++#define IO_SPACE_LIMIT 0xffffffff
+ 
+ /*
+  * On MIPS I/O ports are memory mapped, so we access them using normal

target/linux/lantiq/patches-4.14/0044-pinctrl-xway-fix-copy-paste-error-in-xrx200_grps.patch

@@ -0,0 +1,11 @@
+--- a/drivers/pinctrl/pinctrl-xway.c
++++ b/drivers/pinctrl/pinctrl-xway.c
+@@ -1028,7 +1028,7 @@ static const struct ltq_pin_group xrx200
+ 	GRP_MUX("spi_cs5", SPI, xrx200_pins_spi_cs5),
+ 	GRP_MUX("spi_cs6", SPI, xrx200_pins_spi_cs6),
+ 	GRP_MUX("usif uart_rx", USIF, xrx200_pins_usif_uart_rx),
+-	GRP_MUX("usif uart_rx", USIF, xrx200_pins_usif_uart_tx),
++	GRP_MUX("usif uart_tx", USIF, xrx200_pins_usif_uart_tx),
+ 	GRP_MUX("usif uart_rts", USIF, xrx200_pins_usif_uart_rts),
+ 	GRP_MUX("usif uart_cts", USIF, xrx200_pins_usif_uart_cts),
+ 	GRP_MUX("usif uart_dtr", USIF, xrx200_pins_usif_uart_dtr),

target/linux/lantiq/patches-4.14/0047-poweroff.patch

@@ -0,0 +1,23 @@
+--- a/arch/mips/lantiq/xway/reset.c
++++ b/arch/mips/lantiq/xway/reset.c
+@@ -301,12 +301,6 @@ static void ltq_machine_halt(void)
+ 	unreachable();
+ }
+ 
+-static void ltq_machine_power_off(void)
+-{
+-	local_irq_disable();
+-	unreachable();
+-}
+-
+ static void ltq_usb_init(void)
+ {
+ 	/* Power for USB cores 1 & 2 */
+@@ -379,7 +373,6 @@ static int __init mips_reboot_setup(void
+ 
+ 	_machine_restart = ltq_machine_restart;
+ 	_machine_halt = ltq_machine_halt;
+-	pm_power_off = ltq_machine_power_off;
+ 
+ 	return 0;
+ }

target/linux/lantiq/patches-4.14/0050-MIPS-Lantiq-Fix-cascaded-IRQ-setup.patch

@@ -0,0 +1,87 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Thu, 19 Jan 2017 12:14:44 +0100
+Subject: [PATCH] MIPS: Lantiq: Fix cascaded IRQ setup
+
+With the IRQ stack changes integrated, the XRX200 devices started
+emitting a constant stream of kernel messages like this:
+
+[  565.415310] Spurious IRQ: CAUSE=0x1100c300
+
+This appears to be caused by IP0 firing for some reason without being
+handled. Fix this by setting up IP2-6 as a proper chained IRQ handler and
+calling do_IRQ for all MIPS CPU interrupts.
+
+Cc: john@phrozen.org
+Cc: stable@vger.kernel.org
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/arch/mips/lantiq/irq.c
++++ b/arch/mips/lantiq/irq.c
+@@ -271,6 +271,11 @@ static void ltq_hw5_irqdispatch(void)
+ DEFINE_HWx_IRQDISPATCH(5)
+ #endif
+ 
++static void ltq_hw_irq_handler(struct irq_desc *desc)
++{
++	ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
++}
++
+ #ifdef CONFIG_MIPS_MT_SMP
+ void __init arch_init_ipiirq(int irq, struct irqaction *action)
+ {
+@@ -315,23 +320,19 @@ static struct irqaction irq_call = {
+ asmlinkage void plat_irq_dispatch(void)
+ {
+ 	unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+-	unsigned int i;
++	int irq;
+ 
+-	if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
+-		do_IRQ(MIPS_CPU_TIMER_IRQ);
+-		goto out;
+-	} else {
+-		for (i = 0; i < MAX_IM; i++) {
+-			if (pending & (CAUSEF_IP2 << i)) {
+-				ltq_hw_irqdispatch(i);
+-				goto out;
+-			}
+-		}
++	if (!pending) {
++		spurious_interrupt();
++		return;
+ 	}
+-	pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
+ 
+-out:
+-	return;
++	pending >>= CAUSEB_IP;
++	while (pending) {
++		irq = fls(pending) - 1;
++		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
++		pending &= ~BIT(irq);
++	}
+ }
+ 
+ static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+@@ -356,11 +357,6 @@ static const struct irq_domain_ops irq_d
+ 	.map = icu_map,
+ };
+ 
+-static struct irqaction cascade = {
+-	.handler = no_action,
+-	.name = "cascade",
+-};
+-
+ int __init icu_of_init(struct device_node *node, struct device_node *parent)
+ {
+ 	struct device_node *eiu_node;
+@@ -392,7 +388,7 @@ int __init icu_of_init(struct device_nod
+ 	mips_cpu_irq_init();
+ 
+ 	for (i = 0; i < MAX_IM; i++)
+-		setup_irq(i + 2, &cascade);
++		irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
+ 
+ 	if (cpu_has_vint) {
+ 		pr_info("Setting up vectored interrupts\n");

target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch

@@ -0,0 +1,130 @@
+From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Fri, 6 Jan 2017 17:55:24 +0100
+Subject: [PATCH 2/2] usb: dwc2:  add support for other Lantiq SoCs
+
+The size of the internal RAM of the DesignWare USB controller changed
+between the different Lantiq SoCs. We have the following sizes:
+
+Amazon + Danube: 8 KByte
+Amazon SE + arx100: 2 KByte
+xrx200 + xrx300: 2.5 KByte
+
+For Danube SoC we do not provide the params and let the driver decide
+to use sane defaults, for the Amazon SE and arx100 we use small fifos
+and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
+The auto detection of max_transfer_size and max_packet_count should
+work, so remove it.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 39 insertions(+), 7 deletions(-)
+
+--- a/drivers/usb/dwc2/platform.c
++++ b/drivers/usb/dwc2/platform.c
+@@ -151,7 +151,38 @@ static const struct dwc2_core_params par
+ 	.hibernation			= -1,
+ };
+ 
+-static const struct dwc2_core_params params_ltq = {
++static const struct dwc2_core_params params_danube = {
++	.otg_cap			= 2,	/* non-HNP/non-SRP */
++	.otg_ver			= -1,
++	.dma_enable			= -1,
++	.dma_desc_enable		= -1,
++	.dma_desc_fs_enable		= -1,
++	.speed				= -1,
++	.enable_dynamic_fifo		= -1,
++	.en_multiple_tx_fifo		= -1,
++	.host_rx_fifo_size		= -1,
++	.host_nperio_tx_fifo_size	= -1,
++	.host_perio_tx_fifo_size	= -1,
++	.max_transfer_size		= -1,
++	.max_packet_count		= -1,
++	.host_channels			= -1,
++	.phy_type			= -1,
++	.phy_utmi_width			= -1,
++	.phy_ulpi_ddr			= -1,
++	.phy_ulpi_ext_vbus		= -1,
++	.i2c_enable			= -1,
++	.ulpi_fs_ls			= -1,
++	.host_support_fs_ls_low_power	= -1,
++	.host_ls_low_power_phy_clk	= -1,
++	.ts_dline			= -1,
++	.reload_ctl			= -1,
++	.ahbcfg				= -1,
++	.uframe_sched			= -1,
++	.external_id_pin_ctl		= -1,
++	.hibernation			= -1,
++};
++
++static const struct dwc2_core_params params_ase = {
+ 	.otg_cap			= 2,	/* non-HNP/non-SRP */
+ 	.otg_ver			= -1,
+ 	.dma_enable			= -1,
+@@ -163,8 +194,8 @@ static const struct dwc2_core_params par
+ 	.host_rx_fifo_size		= 288,	/* 288 DWORDs */
+ 	.host_nperio_tx_fifo_size	= 128,	/* 128 DWORDs */
+ 	.host_perio_tx_fifo_size	= 96,	/* 96 DWORDs */
+-	.max_transfer_size		= 65535,
+-	.max_packet_count		= 511,
++	.max_transfer_size		= -1,
++	.max_packet_count		= -1,
+ 	.host_channels			= -1,
+ 	.phy_type			= -1,
+ 	.phy_utmi_width			= -1,
+@@ -176,8 +207,37 @@ static const struct dwc2_core_params par
+ 	.host_ls_low_power_phy_clk	= -1,
+ 	.ts_dline			= -1,
+ 	.reload_ctl			= -1,
+-	.ahbcfg				= GAHBCFG_HBSTLEN_INCR16 <<
+-					  GAHBCFG_HBSTLEN_SHIFT,
++	.ahbcfg				= -1,
++	.uframe_sched			= -1,
++	.external_id_pin_ctl		= -1,
++	.hibernation			= -1,
++};
++
++static const struct dwc2_core_params params_xrx200 = {
++	.otg_cap			= 2,	/* non-HNP/non-SRP */
++	.otg_ver			= -1,
++	.dma_enable			= -1,
++	.dma_desc_enable		= -1,
++	.speed				= -1,
++	.enable_dynamic_fifo		= -1,
++	.en_multiple_tx_fifo		= -1,
++	.host_rx_fifo_size		= 288,	/* 288 DWORDs */
++	.host_nperio_tx_fifo_size	= 128,	/* 128 DWORDs */
++	.host_perio_tx_fifo_size	= 136,	/* 136 DWORDs */
++	.max_transfer_size		= -1,
++	.max_packet_count		= -1,
++	.host_channels			= -1,
++	.phy_type			= -1,
++	.phy_utmi_width			= -1,
++	.phy_ulpi_ddr			= -1,
++	.phy_ulpi_ext_vbus		= -1,
++	.i2c_enable			= -1,
++	.ulpi_fs_ls			= -1,
++	.host_support_fs_ls_low_power	= -1,
++	.host_ls_low_power_phy_clk	= -1,
++	.ts_dline			= -1,
++	.reload_ctl			= -1,
++	.ahbcfg				= -1,
+ 	.uframe_sched			= -1,
+ 	.external_id_pin_ctl		= -1,
+ 	.hibernation			= -1,
+@@ -515,8 +575,11 @@ static const struct of_device_id dwc2_of
+ 	{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
+ 	{ .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
+ 	{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
+-	{ .compatible = "lantiq,arx100-usb", .data = &params_ltq },
+-	{ .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
++	{ .compatible = "lantiq,danube-usb", .data = &params_danube },
++	{ .compatible = "lantiq,ase-usb", .data = &params_ase },
++	{ .compatible = "lantiq,arx100-usb", .data = &params_ase },
++	{ .compatible = "lantiq,xrx200-usb", .data = &params_xrx200 },
++	{ .compatible = "lantiq,xrx300-usb", .data = &params_xrx200 },
+ 	{ .compatible = "snps,dwc2", .data = NULL },
+ 	{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
+ 	{ .compatible = "amlogic,meson8b-usb", .data = &params_amlogic },

target/linux/lantiq/patches-4.14/0065-MIPS-lantiq-improve-USB-initialization.patch

@@ -0,0 +1,202 @@
+From 14909c4e4e836925668e74fc6e0e85ba0283cbf9 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Fri, 6 Jan 2017 17:40:12 +0100
+Subject: [PATCH 2/2] MIPS: lantiq: improve USB initialization
+
+This adds code to initialize the USB controller and PHY also on Danube,
+Amazon SE and AR10. This code is based on the Vendor driver from
+different UGW versions and compared to the hardware documentation.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/mips/lantiq/xway/reset.c   | 120 ++++++++++++++++++++++++++++++----------
+ arch/mips/lantiq/xway/sysctrl.c |  20 +++++++
+ 2 files changed, 110 insertions(+), 30 deletions(-)
+
+--- a/arch/mips/lantiq/xway/reset.c
++++ b/arch/mips/lantiq/xway/reset.c
+@@ -72,6 +72,8 @@
+ #define RCU_USBCFG_HDSEL_BIT	BIT(11)
+ #define RCU_USBCFG_HOST_END_BIT	BIT(10)
+ #define RCU_USBCFG_SLV_END_BIT	BIT(9)
++#define RCU_USBCFG_SLV_END_BIT_AR9	BIT(17)
++
+ 
+ /* USB reset bits */
+ #define RCU_USBRESET		0x0010
+@@ -85,6 +87,8 @@
+ 
+ #define RCU_CFG1A		0x0038
+ #define RCU_CFG1B		0x003C
++#define  RCU_CFG1_TX_PEE	BIT(0)
++#define  RCU_CFG1_DIS_THR_SHIFT	15 /* Disconnect Threshold */	
+ 
+ /* USB PMU devices */
+ #define PMU_AHBM		BIT(15)
+@@ -306,38 +310,91 @@ static void ltq_usb_init(void)
+ 	/* Power for USB cores 1 & 2 */
+ 	ltq_pmu_enable(PMU_AHBM);
+ 	ltq_pmu_enable(PMU_USB0);
+-	ltq_pmu_enable(PMU_USB1);
+ 
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | BIT(0), RCU_CFG1A);
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | BIT(0), RCU_CFG1B);
++	if (of_machine_is_compatible("lantiq,ar10") ||
++	    of_machine_is_compatible("lantiq,grx390") ||
++	    of_machine_is_compatible("lantiq,ar9") ||
++	    of_machine_is_compatible("lantiq,vr9"))
++		ltq_pmu_enable(PMU_USB1);
++
++	if (of_machine_is_compatible("lantiq,vr9") ||
++	    of_machine_is_compatible("lantiq,ar10")) {
++		ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | RCU_CFG1_TX_PEE |
++			    7 << RCU_CFG1_DIS_THR_SHIFT, RCU_CFG1A);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | RCU_CFG1_TX_PEE |
++			    7 << RCU_CFG1_DIS_THR_SHIFT, RCU_CFG1B);
++	}
+ 
+ 	/* Enable USB PHY power for cores 1 & 2 */
+ 	ltq_pmu_enable(PMU_USB0_P);
+-	ltq_pmu_enable(PMU_USB1_P);
++	if (of_machine_is_compatible("lantiq,ar10") ||
++	    of_machine_is_compatible("lantiq,grx390") ||
++	    of_machine_is_compatible("lantiq,ar9") ||
++	    of_machine_is_compatible("lantiq,vr9"))
++		ltq_pmu_enable(PMU_USB1_P);
++
++	if (of_machine_is_compatible("lantiq,ase") ||
++	    of_machine_is_compatible("lantiq,danube")) {
++		/* Configure cores to host mode */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
++			RCU_USB1CFG);
++
++		/* Select DMA endianness (Host-endian: big-endian) */
++		ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
++			| RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
++	}
++
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		/* Configure cores to host mode */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
++			RCU_USB1CFG);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
++			RCU_USB2CFG);
++
++		/* Select DMA endianness (Host-endian: big-endian) */
++		ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT_AR9)
++			| RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
++		ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT_AR9)
++			| RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
++	}
++
++	if (of_machine_is_compatible("lantiq,vr9") ||
++	    of_machine_is_compatible("lantiq,ar10")) {
++		/* Configure cores to host mode */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
++			RCU_USB1CFG);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
++			RCU_USB2CFG);
++
++		/* Select DMA endianness (Host-endian: big-endian) */
++		ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
++			| RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
++		ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
++			| RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
++	}
++
++	if (of_machine_is_compatible("lantiq,ar9")) {
++		/* Hard reset USB state machines */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET)
++			   | USBRESET_BIT | BIT(28), RCU_USBRESET);
++		udelay(50 * 1000);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET)
++			    & ~(USBRESET_BIT | BIT(28)), RCU_USBRESET);
++	} else {
++		/* Hard reset USB state machines */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
++		udelay(50 * 1000);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
++	}
+ 
+-	/* Configure cores to host mode */
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
+-		RCU_USB1CFG);
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
+-		RCU_USB2CFG);
+-
+-	/* Select DMA endianness (Host-endian: big-endian) */
+-	ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
+-		| RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
+-	ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
+-		| RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
+-
+-	/* Hard reset USB state machines */
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
+-	udelay(50 * 1000);
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
+-
+-	/* Soft reset USB state machines */
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
+-		| USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
+-	udelay(50 * 1000);
+-	ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
+-		& ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
++	if (of_machine_is_compatible("lantiq,vr9")) {
++		/* Soft reset USB state machines */
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
++			| USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
++		udelay(50 * 1000);
++		ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
++			& ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
++	}
+ }
+ 
+ static int __init mips_reboot_setup(void)
+@@ -363,8 +420,11 @@ static int __init mips_reboot_setup(void
+ 	if (!ltq_rcu_membase)
+ 		panic("Failed to remap core memory");
+ 
+-	if (of_machine_is_compatible("lantiq,ar9") ||
+-	    of_machine_is_compatible("lantiq,vr9"))
++	if (of_machine_is_compatible("lantiq,danube") ||
++	    of_machine_is_compatible("lantiq,ase") ||
++	    of_machine_is_compatible("lantiq,ar9") ||
++	    of_machine_is_compatible("lantiq,vr9") ||
++	    of_machine_is_compatible("lantiq,ar10"))
+ 		ltq_usb_init();
+ 
+ 	if (of_machine_is_compatible("lantiq,vr9"))
+--- a/arch/mips/lantiq/xway/sysctrl.c
++++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -254,6 +254,25 @@ static void pmu_disable(struct clk *clk)
+ 		pr_warn("deactivating PMU module failed!");
+ }
+ 
++static void usb_set_clock(void)
++{
++	unsigned int val = ltq_cgu_r32(ifccr);
++
++	if (of_machine_is_compatible("lantiq,ar10") ||
++	    of_machine_is_compatible("lantiq,grx390")) {
++		val &= ~0x03; /* XTAL divided by 3 */
++	} else if (of_machine_is_compatible("lantiq,ar9") ||
++		   of_machine_is_compatible("lantiq,vr9")) {
++		/* TODO: this depends on the XTAL frequency */
++		val |= 0x03; /* XTAL divided by 3 */
++	} else if (of_machine_is_compatible("lantiq,ase")) {
++		val |= 0x20; /* from XTAL */
++	} else if (of_machine_is_compatible("lantiq,danube")) {
++		val |= 0x30; /* 12 MHz, generated from 36 MHz */
++	}
++	ltq_cgu_w32(val, ifccr);
++}
++
+ /* the pci enable helper */
+ static int pci_enable(struct clk *clk)
+ {
+@@ -608,4 +627,5 @@ void __init ltq_soc_init(void)
+ 
+ 	if (of_machine_is_compatible("lantiq,vr9"))
+ 		xbar_fpi_burst_disable();
++	usb_set_clock();
+ }

target/linux/lantiq/patches-4.14/0091-spi-lantiq-ssc-fix-platform_no_drv_owner.cocci-warni.patch

@@ -0,0 +1,28 @@
+From ba6e1e39969fa5435127a632757e2906caca7730 Mon Sep 17 00:00:00 2001
+From: kbuild test robot <fengguang.wu@intel.com>
+Date: Mon, 20 Feb 2017 01:33:10 +0800
+Subject: spi: lantiq-ssc: fix platform_no_drv_owner.cocci warnings
+
+drivers/spi/spi-lantiq-ssc.c:973:3-8: No need to set .owner here. The core will do it.
+
+ Remove .owner field if calls are used which set it automatically
+
+Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
+
+Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-lantiq-ssc.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/spi/spi-lantiq-ssc.c
++++ b/drivers/spi/spi-lantiq-ssc.c
+@@ -970,7 +970,6 @@ static struct platform_driver lantiq_ssc
+ 	.remove = lantiq_ssc_remove,
+ 	.driver = {
+ 		.name = "spi-lantiq-ssc",
+-		.owner = THIS_MODULE,
+ 		.of_match_table = lantiq_ssc_match,
+ 	},
+ };