ar7: add support for linux 3.10 and switch to it

Run tested on WAG354Gv2.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 38369
This commit is contained in:
Jonas Gorski 2013-10-12 10:50:44 +00:00
parent c08dc5bffa
commit 5ba5efcd9b
17 changed files with 1756 additions and 1 deletions

View File

@ -13,7 +13,7 @@ FEATURES:=squashfs atm
MAINTAINER:=Florian Fainelli <florian@openwrt.org>
SUBTARGETS:=generic ac49x
LINUX_VERSION:=3.9.11
LINUX_VERSION:=3.10.13
include $(INCLUDE_DIR)/target.mk

View File

@ -0,0 +1,124 @@
CONFIG_ADM6996_PHY=y
# CONFIG_ALWAYS_USE_PERSISTENT_CLOCK is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_BOOT_ELF32=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_CPMAC=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CLK=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HW_RANDOM=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP17XX_PHY=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KALLSYMS=y
CONFIG_KERNEL_GZIP=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIPS=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
CONFIG_MIPS_MT_DISABLED=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MVSWITCH_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_STALL_COMMON is not set
# CONFIG_SCSI_DMA is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_UIDGID_CONVERTED=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_XHCI is not set
CONFIG_VLYNQ=y
# CONFIG_VLYNQ_DEBUG is not set
CONFIG_ZONE_DMA_FLAG=0

View File

@ -0,0 +1,158 @@
/*
* Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/types.h>
#include <linux/cdev.h>
#include <gpio.h>
#define DRVNAME "ar7_gpio"
#define LONGNAME "TI AR7 GPIOs Driver"
MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
MODULE_DESCRIPTION(LONGNAME);
MODULE_LICENSE("GPL");
static int ar7_gpio_major;
static ssize_t ar7_gpio_write(struct file *file, const char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_dentry->d_inode);
size_t i;
for (i = 0; i < len; ++i) {
char c;
if (get_user(c, buf + i))
return -EFAULT;
switch (c) {
case '0':
gpio_set_value(pin, 0);
break;
case '1':
gpio_set_value(pin, 1);
break;
case 'd':
case 'D':
ar7_gpio_disable(pin);
break;
case 'e':
case 'E':
ar7_gpio_enable(pin);
break;
case 'i':
case 'I':
case '<':
gpio_direction_input(pin);
break;
case 'o':
case 'O':
case '>':
gpio_direction_output(pin, 0);
break;
default:
return -EINVAL;
}
}
return len;
}
static ssize_t ar7_gpio_read(struct file *file, char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_dentry->d_inode);
int value;
value = gpio_get_value(pin);
if (put_user(value ? '1' : '0', buf))
return -EFAULT;
return 1;
}
static int ar7_gpio_open(struct inode *inode, struct file *file)
{
int m = iminor(inode);
if (m >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX))
return -EINVAL;
return nonseekable_open(inode, file);
}
static int ar7_gpio_release(struct inode *inode, struct file *file)
{
return 0;
}
static const struct file_operations ar7_gpio_fops = {
.owner = THIS_MODULE,
.write = ar7_gpio_write,
.read = ar7_gpio_read,
.open = ar7_gpio_open,
.release = ar7_gpio_release,
.llseek = no_llseek,
};
static struct platform_device *ar7_gpio_device;
static int __init ar7_gpio_char_init(void)
{
int rc;
ar7_gpio_device = platform_device_alloc(DRVNAME, -1);
if (!ar7_gpio_device)
return -ENOMEM;
rc = platform_device_add(ar7_gpio_device);
if (rc < 0)
goto out_put;
rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops);
if (rc < 0)
goto out_put;
ar7_gpio_major = rc;
rc = 0;
goto out;
out_put:
platform_device_put(ar7_gpio_device);
out:
return rc;
}
static void __exit ar7_gpio_char_exit(void)
{
unregister_chrdev(ar7_gpio_major, DRVNAME);
platform_device_unregister(ar7_gpio_device);
}
module_init(ar7_gpio_char_init);
module_exit(ar7_gpio_char_exit);

View File

@ -0,0 +1,220 @@
/*
* AudioCodes AC49x PSPBoot-based flash partition table
* Copyright 2012 Daniel Golle <daniel.golle@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/bootmem.h>
#include <linux/magic.h>
#include <linux/module.h>
#include <asm/mach-ar7/prom.h>
#define AC49X_MAXENVPARTS 8
#define AC49X_PARTTYPE_LOADER 0
#define AC49X_PARTTYPE_BOOTENV 1
#define AC49X_PARTTYPE_LINUX 2
#define AC49X_PARTTYPE_ROOTFS 3
#define AC49X_PARTTYPE_UNKNOWN 4
#define AC49X_NUM_PARTTYPES 5
#define AC49X_FLASH_ADDRMASK 0x00FFFFFF
#define AC49X_LOADER_MAGIC 0x40809000
#define AC49X_LINUX_MAGIC 0x464c457f /* ELF */
#define AC49X_BOOTENV_MAGIC 0x4578614d /* MaxE */
#define ROOTFS_MIN_OFFSET 0xC0000
int parse_partvar(const unsigned char *partvar, struct mtd_partition *part)
{
unsigned int partstart, partend;
unsigned int pnum;
pnum = sscanf(partvar, "0x%x,0x%x", &partstart, &partend);
if (pnum != 2)
return 1;
part->offset = partstart & AC49X_FLASH_ADDRMASK;
part->size = partend - partstart;
return 0;
}
int detect_parttype(struct mtd_info *master, struct mtd_partition part)
{
unsigned int magic;
size_t len;
if (part.size < 4)
return -1;
mtd_read(master, part.offset, sizeof(magic), &len,
(uint8_t *)&magic);
if (len != sizeof(magic))
return -1;
switch (magic) {
case AC49X_LOADER_MAGIC:
return AC49X_PARTTYPE_LOADER;
case AC49X_LINUX_MAGIC:
return AC49X_PARTTYPE_LINUX;
case SQUASHFS_MAGIC:
case CRAMFS_MAGIC:
case CRAMFS_MAGIC_WEND:
return AC49X_PARTTYPE_ROOTFS;
case AC49X_BOOTENV_MAGIC:
return AC49X_PARTTYPE_BOOTENV;
default:
switch (magic & 0xFF) {
case JFFS2_SUPER_MAGIC:
return AC49X_PARTTYPE_ROOTFS;
}
switch (magic >> 8) {
case JFFS2_SUPER_MAGIC:
return AC49X_PARTTYPE_ROOTFS;
}
return AC49X_PARTTYPE_UNKNOWN;
}
}
const char *partnames[] = {
"loader",
"config",
"linux",
"rootfs",
"data"
};
void gen_partname(unsigned int type,
unsigned int *typenumeration,
struct mtd_partition *part)
{
char *s = kzalloc(sizeof(char) * 8, GFP_KERNEL);
(typenumeration[type])++;
if (typenumeration[type] == 1)
sprintf(s, "%s", partnames[type]);
else
sprintf(s, "%s%d", partnames[type], typenumeration[type]);
part->name = s;
}
static int create_mtd_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
{
unsigned int envpartnum = 0, linuxpartnum = 0;
unsigned int typenumeration[5] = { 0, 0, 0, 0, 0 };
unsigned char evn[5];
const unsigned char *partvar = NULL;
struct mtd_partition *ac49x_parts;
ac49x_parts = kzalloc(sizeof(*ac49x_parts) * AC49X_MAXENVPARTS,
GFP_KERNEL);
if (!ac49x_parts)
return -ENOMEM;
linuxpartnum = 0;
for (envpartnum = 0; envpartnum < AC49X_MAXENVPARTS; envpartnum++) {
struct mtd_partition parsepart;
unsigned int offset, size, type;
int err;
sprintf(evn, "mtd%d", envpartnum);
partvar = prom_getenv(evn);
if (!partvar)
continue;
err = parse_partvar(partvar, &parsepart);
if (err)
continue;
offset = parsepart.offset;
size = parsepart.size;
type = detect_parttype(master, parsepart);
gen_partname(type, typenumeration, &parsepart);
/* protect loader */
if (type == AC49X_PARTTYPE_LOADER)
parsepart.mask_flags = MTD_WRITEABLE;
else
parsepart.mask_flags = 0;
memcpy(&(ac49x_parts[linuxpartnum]), &parsepart,
sizeof(struct mtd_partition));
/* scan for contained rootfs */
if (type == AC49X_PARTTYPE_LINUX) {
parsepart.offset += ROOTFS_MIN_OFFSET &
~(master->erasesize - 1);
parsepart.size -= ROOTFS_MIN_OFFSET &
~(master->erasesize - 1);
do {
unsigned int size, offset;
size = parsepart.size;
offset = parsepart.offset;
type = detect_parttype(master, parsepart);
if (type == AC49X_PARTTYPE_ROOTFS) {
gen_partname(type, typenumeration,
&parsepart);
printk(KERN_INFO
"%s %s: 0x%08x@0x%08x\n",
"detected sub-partition",
parsepart.name,
(unsigned int)parsepart.size,
(unsigned int)parsepart.offset);
linuxpartnum++;
memcpy(&(ac49x_parts[linuxpartnum]),
&parsepart,
sizeof(struct mtd_partition));
break;
}
parsepart.offset += master->erasesize;
parsepart.size -= master->erasesize;
} while (parsepart.size >= master->erasesize);
}
linuxpartnum++;
}
*pparts = ac49x_parts;
return linuxpartnum;
}
static struct mtd_part_parser ac49x_parser = {
.owner = THIS_MODULE,
.parse_fn = create_mtd_partitions,
.name = "ac49xpart",
};
static int __init ac49x_parser_init(void)
{
return register_mtd_parser(&ac49x_parser);
}
module_init(ac49x_parser_init);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Daniel Golle <daniel.golle@gmail.com>");
MODULE_DESCRIPTION("MTD partitioning for AudioCodes AC49x");

View File

@ -0,0 +1,234 @@
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/bootmem.h>
#include <linux/magic.h>
#include <asm/mach-ar7/prom.h>
#define IMAGE_A_SIZE 0X3c0000
#define WRTP_PARTS 14
#define NSP_IMG_MAGIC_NUMBER le32_to_cpu(0x4D544443)
#define NSP_IMG_SECTION_TYPE_KERNEL (0x01)
#define NSP_IMG_SECTION_TYPE_FILESYSTEM_ROOT (0x02)
#define NSP_IMG_SECTION_TYPE_FILESYSTEM (0x03)
#define MAX_NUM_PARTITIONS 14
static int part_count=0;
static struct mtd_partition titan_parts[WRTP_PARTS];
struct nsp_img_hdr_head
{
unsigned int magic; /* Magic number to identify this image header */
unsigned int boot_offset; /* Offset from start of header to kernel code. */
unsigned int flags; /* Image flags. */
unsigned int hdr_version; /* Version of this header. */
unsigned int hdr_size; /* The complete size of all portions of the header */
unsigned int prod_id; /* This product id */
unsigned int rel_id; /* Which release this is */
unsigned int version; /* name-MMM.nnn.ooo-rxx => 0xMMnnooxx. See comment
below */
unsigned int image_size; /* Image size (including header) */
unsigned int info_offset; /* Offset from start of header to info block */
unsigned int sect_info_offset; /* Offset from start of header to section desc */
unsigned int chksum_offset; /* Offset from start of header to chksum block */
unsigned int pad1;
};
struct nsp_img_hdr_section_info
{
unsigned int num_sects; /* Number of section (and section desc blocks) in this image */
unsigned int sect_size; /* Size of a SINGLE section_desc block */
unsigned int sections_offset; /* Offset to from start of header to the start of the section blocks */
};
/* There will be one of more of the following stuctures in the image header. Each
section will have one of these blocks. */
struct nsp_img_hdr_sections
{
unsigned int offset; /* Offset of section from start of NSP_IMG_HDR_HEAD */
unsigned int total_size; /* Size of section (including pad size.) */
unsigned int raw_size; /* Size of section only */
unsigned int flags; /* Section flags */
unsigned int chksum; /* Section checksum */
unsigned int type; /* Section type. What kind of info does this section describe */
char name[16]; /* Reference name for this section. */
};
static int titan_parse_env_address(char *env_name, unsigned int *flash_base,
unsigned int *flash_end)
{
char image_name[30];
char *env_ptr;
char *base_ptr;
char *end_ptr;
char * string_ptr;
/* Get the image variable */
env_ptr = prom_getenv(env_name);
if(!env_ptr){
printk("titan: invalid env name, %s.\n", env_name);
return -1; /* Error, no image variable */
}
strncpy(image_name, env_ptr, 30);
image_name[29]=0;
string_ptr = image_name;
/* Extract the start and stop addresses of the partition */
base_ptr = strsep(&string_ptr, ",");
end_ptr = strsep(&string_ptr, ",");
if ((base_ptr == NULL) || (end_ptr == NULL)) {
printk("titan: Couldn't tokenize %s start,end.\n", image_name);
return -1;
}
*flash_base = (unsigned int) simple_strtol(base_ptr, NULL, 0);
*flash_end = (unsigned int) simple_strtol(end_ptr, NULL, 0);
if((!*flash_base) || (!*flash_end)) {
printk("titan: Unable to convert :%s: :%s: into start,end values.\n",
env_name, image_name);
return -1;
}
*flash_base &= 0x0fffffff;
*flash_end &= 0x0fffffff;
return 0;
}
static int titan_get_single_image(char *bootcfg_name, unsigned int *flash_base,
unsigned int *flash_end)
{
char *env_ptr;
char *base_ptr;
char *end_ptr;
char image_name[30];
char * string_ptr;
if(!bootcfg_name || !flash_base || !flash_end)
return -1;
env_ptr = prom_getenv(bootcfg_name);
if(!env_ptr){
printk("titan: %s variable not found.\n", bootcfg_name);
return -1; /* Error, no bootcfg variable */
}
string_ptr = image_name;
/* Save off the image name */
strncpy(image_name, env_ptr, 30);
image_name[29]=0;
end_ptr=strsep(&string_ptr, "\"");
base_ptr=strsep(&string_ptr, "\""); /* Loose the last " */
if(!end_ptr || !base_ptr){
printk("titan: invalid bootcfg format, %s.\n", image_name);
return -1; /* Error, invalid bootcfg variable */
}
/* Now, parse the addresses */
return titan_parse_env_address(base_ptr, flash_base, flash_end);
}
static void titan_add_partition(char * env_name, unsigned int flash_base, unsigned int flash_end)
{
titan_parts[part_count].name = env_name;
titan_parts[part_count].offset = flash_base;
titan_parts[part_count].size = flash_end-flash_base;
titan_parts[part_count].mask_flags = (strcmp(env_name, "bootloader")==0||
strcmp(env_name, "boot_env")==0 ||
strcmp(env_name, "full_image")==0 )?MTD_WRITEABLE:0;
part_count++;
}
int create_titan_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
unsigned long origin)
{
struct nsp_img_hdr_head hdr;
struct nsp_img_hdr_section_info sect_info;
struct nsp_img_hdr_sections section;
unsigned int flash_base, flash_end;
unsigned int start, end;
char *name;
int i;
int total_sects=0;
size_t len;
/* Get the bootcfg env variable first */
if(titan_get_single_image("BOOTCFG", &flash_base, &flash_end)) {
/* Error, fallback */
return -1;
}
/* Get access to the header, and do some validation checks */
//hdr=(struct nsp_img_hdr_head*)flash_base;
mtd_read(master, flash_base, sizeof(struct nsp_img_hdr_head), &len, (uint8_t *)&hdr);
if(hdr.magic != NSP_IMG_MAGIC_NUMBER)
return -1; /* Not a single image */
mtd_read(master, flash_base + hdr.sect_info_offset, sizeof(struct nsp_img_hdr_section_info), &len, (uint8_t *)&sect_info);
/* Look for the root fs, and add it first. This way we KNOW where the rootfs is */
for(i=0; i< sect_info.num_sects && i<MAX_NUM_PARTITIONS; i++){
mtd_read(master, flash_base + sect_info.sections_offset + (i * sect_info.sect_size) , sizeof(struct nsp_img_hdr_sections), &len, (uint8_t *)&section);
/* Add only the root partition */
if(section.type != NSP_IMG_SECTION_TYPE_FILESYSTEM_ROOT){
continue;
}
start=flash_base + section.offset;
end=start + section.total_size;
titan_add_partition("root", start, end);
total_sects++;
}
for(i=0; i< sect_info.num_sects && i<MAX_NUM_PARTITIONS; i++){
mtd_read(master, flash_base + sect_info.sections_offset + (i * sect_info.sect_size) , sizeof(struct nsp_img_hdr_sections), &len, (uint8_t *)&section);
name=section.name;
if(section.type == NSP_IMG_SECTION_TYPE_FILESYSTEM_ROOT)
{
name = "rootfs";
start=flash_base + section.offset;
end=flash_end;
titan_add_partition(name, start, end);
total_sects++;
}
else if(section.type == NSP_IMG_SECTION_TYPE_KERNEL)
{
name = "kernel";
start=flash_base + section.offset;
end=start + section.total_size;
titan_add_partition(name, start, end);
total_sects++;
}
}
/* Next, lets add the single image */
titan_add_partition("primary_image", flash_base, flash_end);
total_sects++;
titan_add_partition("full_image", 0, master->size);
total_sects++;
if (!titan_parse_env_address("BOOTLOADER", &start, &end)){
titan_add_partition("bootloader", start, end);
total_sects++;
}
if (!titan_parse_env_address("boot_env", &start, &end)){
titan_add_partition("boot_env", start, end);
total_sects++;
}
*pparts = titan_parts;
return total_sects;
}

View File

@ -0,0 +1,22 @@
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
-obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
+obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o titanpart.o
obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o
obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -199,7 +199,7 @@ static struct resource physmap_flash_res
.name = "mem",
.flags = IORESOURCE_MEM,
.start = 0x10000000,
- .end = 0x107fffff,
+ .end = 0x11ffffff,
};
static const char *ar7_probe_types[] = { "ar7part", NULL };

View File

@ -0,0 +1,28 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -464,6 +464,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

View File

@ -0,0 +1,300 @@
--- a/drivers/vlynq/vlynq.c
+++ b/drivers/vlynq/vlynq.c
@@ -119,20 +119,40 @@ static int vlynq_linked(struct vlynq_dev
return 0;
}
+static volatile int vlynq_delay_value_new = 0;
+
+static void vlynq_delay_wait(u32 count)
+{
+ /* Code adopted from original vlynq driver */
+ int i = 0;
+ volatile int *ptr = &vlynq_delay_value_new;
+ *ptr = 0;
+
+ /* We are assuming that the each cycle takes about
+ * 23 assembly instructions. */
+ for(i = 0; i < (count + 23)/23; i++)
+ *ptr = *ptr + 1;
+}
+
static void vlynq_reset(struct vlynq_device *dev)
{
+ u32 rtm = readl(&dev->local->revision);
+
+ rtm = rtm < 0x00010205 || readl(&dev->local->status) & 0x800 == 0 ?
+ 0 : 0x600000;
+
writel(readl(&dev->local->control) | VLYNQ_CTRL_RESET,
&dev->local->control);
/* Wait for the devices to finish resetting */
- msleep(5);
+ vlynq_delay_wait(0xffffff);
/* Remove reset bit */
- writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET,
+ writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET | rtm,
&dev->local->control);
/* Give some time for the devices to settle */
- msleep(5);
+ vlynq_delay_wait(0xffffff);
}
static void vlynq_irq_unmask(struct irq_data *d)
@@ -379,6 +399,61 @@ void vlynq_unregister_driver(struct vlyn
}
EXPORT_SYMBOL(vlynq_unregister_driver);
+enum vlynq_clk_src {
+ vlynq_clk_external,
+ vlynq_clk_local,
+ vlynq_clk_remote,
+ vlynq_clk_invalid,
+};
+
+static int __vlynq_set_clocks(struct vlynq_device *dev,
+ enum vlynq_clk_src clk_dir,
+ int lclk_div, int rclk_div)
+{
+ u32 reg;
+
+ if (clk_dir == vlynq_clk_invalid) {
+ printk(KERN_ERR "%s: attempt to set invalid clocking\n",
+ dev_name(&dev->dev));
+ return -EINVAL;
+ }
+
+ reg = readl(&dev->local->control);
+ if (readl(&dev->local->revision) < 0x00010205) {
+ if (clk_dir & vlynq_clk_local)
+ reg |= VLYNQ_CTRL_CLOCK_INT;
+ else
+ reg &= ~VLYNQ_CTRL_CLOCK_INT;
+ }
+ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
+ reg |= VLYNQ_CTRL_CLOCK_DIV(lclk_div);
+ writel(reg, &dev->local->control);
+
+ if (!vlynq_linked(dev))
+ return -ENODEV;
+
+ printk(KERN_INFO "%s: local VLYNQ protocol rev. is 0x%08x\n",
+ dev_name(&dev->dev), readl(&dev->local->revision));
+ printk(KERN_INFO "%s: remote VLYNQ protocol rev. is 0x%08x\n",
+ dev_name(&dev->dev), readl(&dev->remote->revision));
+
+ reg = readl(&dev->remote->control);
+ if (readl(&dev->remote->revision) < 0x00010205) {
+ if (clk_dir & vlynq_clk_remote)
+ reg |= VLYNQ_CTRL_CLOCK_INT;
+ else
+ reg &= ~VLYNQ_CTRL_CLOCK_INT;
+ }
+ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
+ reg |= VLYNQ_CTRL_CLOCK_DIV(rclk_div);
+ writel(reg, &dev->remote->control);
+
+ if (!vlynq_linked(dev))
+ return -ENODEV;
+
+ return 0;
+}
+
/*
* A VLYNQ remote device can clock the VLYNQ bus master
* using a dedicated clock line. In that case, both the
@@ -392,29 +467,16 @@ static int __vlynq_try_remote(struct vly
int i;
vlynq_reset(dev);
- for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ?
- i <= vlynq_rdiv8 : i >= vlynq_rdiv2;
- dev->dev_id ? i++ : i--) {
+ for (i = 0; i <= 7; i++) {
if (!vlynq_linked(dev))
break;
- writel((readl(&dev->remote->control) &
- ~VLYNQ_CTRL_CLOCK_MASK) |
- VLYNQ_CTRL_CLOCK_INT |
- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
- &dev->remote->control);
- writel((readl(&dev->local->control)
- & ~(VLYNQ_CTRL_CLOCK_INT |
- VLYNQ_CTRL_CLOCK_MASK)) |
- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
- &dev->local->control);
-
- if (vlynq_linked(dev)) {
- printk(KERN_DEBUG
- "%s: using remote clock divisor %d\n",
- dev_name(&dev->dev), i - vlynq_rdiv1 + 1);
- dev->divisor = i;
+ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, i, i)) {
+ printk(KERN_INFO
+ "%s: using remote clock divisor %d\n",
+ dev_name(&dev->dev), i + 1);
+ dev->divisor = i + vlynq_rdiv1;
return 0;
} else {
vlynq_reset(dev);
@@ -433,25 +495,17 @@ static int __vlynq_try_remote(struct vly
*/
static int __vlynq_try_local(struct vlynq_device *dev)
{
- int i;
+ int i, dir = !dev->dev_id;
vlynq_reset(dev);
- for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ?
- i <= vlynq_ldiv8 : i >= vlynq_ldiv2;
- dev->dev_id ? i++ : i--) {
-
- writel((readl(&dev->local->control) &
- ~VLYNQ_CTRL_CLOCK_MASK) |
- VLYNQ_CTRL_CLOCK_INT |
- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1),
- &dev->local->control);
-
- if (vlynq_linked(dev)) {
- printk(KERN_DEBUG
- "%s: using local clock divisor %d\n",
- dev_name(&dev->dev), i - vlynq_ldiv1 + 1);
- dev->divisor = i;
+ for (i = dir ? 7 : 0; dir ? i >= 0 : i <= 7; dir ? i-- : i++) {
+
+ if (!__vlynq_set_clocks(dev, vlynq_clk_local, i, 0)) {
+ printk(KERN_INFO
+ "%s: using local clock divisor %d\n",
+ dev_name(&dev->dev), i + 1);
+ dev->divisor = i + vlynq_ldiv1;
return 0;
} else {
vlynq_reset(dev);
@@ -473,18 +527,10 @@ static int __vlynq_try_external(struct v
if (!vlynq_linked(dev))
return -ENODEV;
- writel((readl(&dev->remote->control) &
- ~VLYNQ_CTRL_CLOCK_INT),
- &dev->remote->control);
-
- writel((readl(&dev->local->control) &
- ~VLYNQ_CTRL_CLOCK_INT),
- &dev->local->control);
-
- if (vlynq_linked(dev)) {
- printk(KERN_DEBUG "%s: using external clock\n",
- dev_name(&dev->dev));
- dev->divisor = vlynq_div_external;
+ if (!__vlynq_set_clocks(dev, vlynq_clk_external, 0, 0)) {
+ printk(KERN_INFO "%s: using external clock\n",
+ dev_name(&dev->dev));
+ dev->divisor = vlynq_div_external;
return 0;
}
@@ -501,24 +547,16 @@ static int __vlynq_enable_device(struct
return result;
switch (dev->divisor) {
- case vlynq_div_external:
case vlynq_div_auto:
/* When the device is brought from reset it should have clock
* generation negotiated by hardware.
* Check which device is generating clocks and perform setup
* accordingly */
- if (vlynq_linked(dev) && readl(&dev->remote->control) &
- VLYNQ_CTRL_CLOCK_INT) {
- if (!__vlynq_try_remote(dev) ||
- !__vlynq_try_local(dev) ||
- !__vlynq_try_external(dev))
- return 0;
- } else {
- if (!__vlynq_try_external(dev) ||
- !__vlynq_try_local(dev) ||
- !__vlynq_try_remote(dev))
- return 0;
- }
+ if (!__vlynq_try_remote(dev) || !__vlynq_try_local(dev))
+ return 0;
+ case vlynq_div_external:
+ if (!__vlynq_try_external(dev))
+ return 0;
break;
case vlynq_ldiv1:
case vlynq_ldiv2:
@@ -528,15 +566,12 @@ static int __vlynq_enable_device(struct
case vlynq_ldiv6:
case vlynq_ldiv7:
case vlynq_ldiv8:
- writel(VLYNQ_CTRL_CLOCK_INT |
- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
- vlynq_ldiv1), &dev->local->control);
- writel(0, &dev->remote->control);
- if (vlynq_linked(dev)) {
- printk(KERN_DEBUG
- "%s: using local clock divisor %d\n",
- dev_name(&dev->dev),
- dev->divisor - vlynq_ldiv1 + 1);
+ if (!__vlynq_set_clocks(dev, vlynq_clk_local, dev->divisor -
+ vlynq_ldiv1, 0)) {
+ printk(KERN_INFO
+ "%s: using local clock divisor %d\n",
+ dev_name(&dev->dev),
+ dev->divisor - vlynq_ldiv1 + 1);
return 0;
}
break;
@@ -548,20 +583,17 @@ static int __vlynq_enable_device(struct
case vlynq_rdiv6:
case vlynq_rdiv7:
case vlynq_rdiv8:
- writel(0, &dev->local->control);
- writel(VLYNQ_CTRL_CLOCK_INT |
- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
- vlynq_rdiv1), &dev->remote->control);
- if (vlynq_linked(dev)) {
- printk(KERN_DEBUG
- "%s: using remote clock divisor %d\n",
- dev_name(&dev->dev),
- dev->divisor - vlynq_rdiv1 + 1);
+ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, 0,
+ dev->divisor - vlynq_rdiv1)) {
+ printk(KERN_INFO
+ "%s: using remote clock divisor %d\n",
+ dev_name(&dev->dev),
+ dev->divisor - vlynq_rdiv1 + 1);
return 0;
}
break;
}
-
+ vlynq_reset(dev);
ops->off(dev);
return -ENODEV;
}
@@ -732,14 +764,14 @@ static int vlynq_probe(struct platform_d
platform_set_drvdata(pdev, dev);
printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n",
- dev_name(&dev->dev), (void *)dev->regs_start, dev->irq,
- (void *)dev->mem_start);
+ dev_name(&dev->dev), (void *)dev->regs_start,
+ dev->irq, (void *)dev->mem_start);
dev->dev_id = 0;
dev->divisor = vlynq_div_auto;
- result = __vlynq_enable_device(dev);
- if (result == 0) {
+ if (!__vlynq_enable_device(dev)) {
dev->dev_id = readl(&dev->remote->chip);
+ vlynq_reset(dev);
((struct plat_vlynq_ops *)(dev->dev.platform_data))->off(dev);
}
if (dev->dev_id)

View File

@ -0,0 +1,15 @@
--- a/arch/mips/ar7/memory.c
+++ b/arch/mips/ar7/memory.c
@@ -66,5 +66,11 @@ void __init prom_meminit(void)
void __init prom_free_prom_memory(void)
{
- /* Nothing to free */
+ /* adapted from arch/mips/txx9/generic/setup.c */
+ unsigned long saddr = PHYS_OFFSET + PAGE_SIZE;
+ unsigned long eaddr = __pa_symbol(&_text);
+
+ /* free memory between prom-record and kernel _text base */
+ if (saddr < eaddr)
+ free_init_pages("prom memory", saddr, eaddr);
}

View File

@ -0,0 +1,85 @@
--- a/arch/mips/ar7/Platform
+++ b/arch/mips/ar7/Platform
@@ -3,4 +3,9 @@
#
platform-$(CONFIG_AR7) += ar7/
cflags-$(CONFIG_AR7) += -I$(srctree)/arch/mips/include/asm/mach-ar7
-load-$(CONFIG_AR7) += 0xffffffff94100000
+load-$(CONFIG_AR7_TI) += 0xffffffff94100000
+
+#
+# AudioCodes AC49x
+#
+load-$(CONFIG_AR7_AC49X) += 0xffffffff945ca000
--- a/arch/mips/ar7/setup.c
+++ b/arch/mips/ar7/setup.c
@@ -69,6 +69,10 @@ const char *get_system_type(void)
return "TI AR7 (TNETV1056)";
case TITAN_CHIP_1060:
return "TI AR7 (TNETV1060)";
+ case TITAN_CHIP_AC495:
+ return "AudioCodes AC495";
+ case TITAN_CHIP_AC496:
+ return "AudioCodes AC496";
}
default:
return "TI AR7 (unknown)";
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -92,6 +92,8 @@
#define TITAN_CHIP_1055 0x0e
#define TITAN_CHIP_1056 0x0d
#define TITAN_CHIP_1060 0x07
+#define TITAN_CHIP_AC495 0x00
+#define TITAN_CHIP_AC496 0x02
/* Interrupts */
#define AR7_IRQ_UART0 15
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -86,7 +86,7 @@ config AR7
select HAVE_CLK
help
Support for the Texas Instruments AR7 System-on-a-Chip
- family: TNETD7100, 7200 and 7300.
+ family: TI TNETD7100, 7200, 7300 and AudioCodes AC49x.
config ATH79
bool "Atheros AR71XX/AR724X/AR913X based boards"
@@ -839,6 +839,7 @@ config NLM_XLP_BOARD
endchoice
source "arch/mips/alchemy/Kconfig"
+source "arch/mips/ar7/Kconfig"
source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm47xx/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
--- /dev/null
+++ b/arch/mips/ar7/Kconfig
@@ -0,0 +1,26 @@
+if AR7
+
+config AR7_TI
+ bool
+
+config AR7_AC49X
+ bool
+
+choice
+ prompt "AR7 SoC family selection"
+ default AR7_TYPE_TI
+ depends on AR7
+ help
+ Select AR7 MIPS SoC implementation.
+
+ config AR7_TYPE_TI
+ bool "Texas Instruments AR7"
+ select AR7_TI
+
+ config AR7_TYPE_AC49X
+ bool "AudioCodes AC49X"
+ select AR7_AC49X
+
+endchoice
+
+endif

View File

@ -0,0 +1,20 @@
--- a/arch/mips/ar7/prom.c
+++ b/arch/mips/ar7/prom.c
@@ -70,6 +70,7 @@ struct psbl_rec {
};
static const char psp_env_version[] __initconst = "TIENV0.8";
+static const char psp_env_version_ac49x[] __initconst = "MaxENV0.2";
struct psp_env_chunk {
u8 num;
@@ -186,7 +187,8 @@ static void __init ar7_init_env(struct e
struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
- if (strcmp(psp_env, psp_env_version) == 0) {
+ if (strcmp(psp_env, psp_env_version) == 0 ||
+ strcmp(psp_env, psp_env_version_ac49x) == 0) {
parse_psp_env(psp_env);
} else {
for (i = 0; i < MAX_ENTRY; i++, env++)

View File

@ -0,0 +1,35 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -188,6 +188,11 @@ config MTD_OF_PARTS
the partition map from the children of the flash node,
as described in Documentation/devicetree/booting-without-of.txt.
+config MTD_AC49X_PARTS
+ tristate "AudioCodes AC49X partitioning support"
+ ---help---
+ AudioCodes AC49X partitioning support
+
config MTD_AR7_PARTS
tristate "TI AR7 partitioning support"
---help---
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -14,6 +14,7 @@ mtd-$(CONFIG_MTD_SPLIT_UIMAGE_FW) += mtd
obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+obj-$(CONFIG_MTD_AC49X_PARTS) += ac49xpart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o titanpart.o
obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -202,7 +202,7 @@ static struct resource physmap_flash_res
.end = 0x11ffffff,
};
-static const char *ar7_probe_types[] = { "ar7part", NULL };
+static const char *ar7_probe_types[] = { "ac49xpart", "ar7part", NULL };
static struct physmap_flash_data physmap_flash_data = {
.width = 2,

View File

@ -0,0 +1,28 @@
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -323,6 +323,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
/* Uart divisor latch read */
@@ -2839,7 +2846,11 @@ static void serial8250_console_putchar(s
struct uart_8250_port *up =
container_of(port, struct uart_8250_port, port);
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_port_out(port, UART_TX, ch);
}

View File

@ -0,0 +1,118 @@
--- a/drivers/mtd/ar7part.c
+++ b/drivers/mtd/ar7part.c
@@ -30,11 +30,14 @@
#include <uapi/linux/magic.h>
+#include <asm/mach-ar7/prom.h>
+
#define AR7_PARTS 4
#define ROOT_OFFSET 0xe0000
#define LOADER_MAGIC1 le32_to_cpu(0xfeedfa42)
#define LOADER_MAGIC2 le32_to_cpu(0xfeed1281)
+#define LOADER_MAGIC3 le32_to_cpu(0x434d4d4c)
struct ar7_bin_rec {
unsigned int checksum;
@@ -42,12 +45,16 @@ struct ar7_bin_rec {
unsigned int address;
};
+int create_titan_partitions(struct mtd_info *master,
+ struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data);
+
static int create_mtd_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
{
struct ar7_bin_rec header;
- unsigned int offset;
+ unsigned int offset, mtd_start, mtd_end;
size_t len;
unsigned int pre_size = master->erasesize, post_size = 0;
unsigned int root_offset = ROOT_OFFSET;
@@ -55,6 +62,16 @@ static int create_mtd_partitions(struct
int retries = 10;
struct mtd_partition *ar7_parts;
+ const char *prom_str = prom_getenv("ProductID");
+ char mtd_name[] = "mtd1";
+ if(prom_str &&
+ (strcmp(prom_str, "CYWL")==0 ||
+ strcmp(prom_str, "CYWM")==0 ||
+ strcmp(prom_str, "CYLM")==0 ||
+ strcmp(prom_str, "CYLL")==0)){
+ return create_titan_partitions(master, pparts, data);
+ }
+
ar7_parts = kzalloc(sizeof(*ar7_parts) * AR7_PARTS, GFP_KERNEL);
if (!ar7_parts)
return -ENOMEM;
@@ -83,34 +100,39 @@ static int create_mtd_partitions(struct
pre_size = offset;
- if (!ar7_parts[1].offset) {
- ar7_parts[1].offset = master->size - master->erasesize;
- post_size = master->erasesize;
- }
-
switch (header.checksum) {
- case LOADER_MAGIC1:
- while (header.length) {
- offset += sizeof(header) + header.length;
- mtd_read(master, offset, sizeof(header), &len,
- (uint8_t *)&header);
- }
- root_offset = offset + sizeof(header) + 4;
- break;
case LOADER_MAGIC2:
+ for (retries = 0; retries <= 9; retries++) {
+ mtd_name[3] = '0' + retries;
+ prom_str = prom_getenv(mtd_name);
+ if (prom_str == NULL)
+ continue;
+ sscanf(prom_str, "%i,%i", &mtd_start, &mtd_end);
+ if (pre_size == (mtd_start & 0x1ffffff)) {
+ ar7_parts[1].offset = mtd_end &= 0x1ffffff;
+ ar7_parts[1].size = post_size = master->size - mtd_end;
+ break;
+ }
+ }
+ case LOADER_MAGIC1:
+ root_offset = (header.checksum == LOADER_MAGIC1) ? 4 : 0;
while (header.length) {
offset += sizeof(header) + header.length;
mtd_read(master, offset, sizeof(header), &len,
(uint8_t *)&header);
}
- root_offset = offset + sizeof(header) + 4 + 0xff;
- root_offset &= ~(uint32_t)0xff;
+ root_offset += offset + sizeof(header);
break;
default:
printk(KERN_WARNING "Unknown magic: %08x\n", header.checksum);
break;
}
+ if (!ar7_parts[1].offset) {
+ post_size = master->erasesize;
+ ar7_parts[1].offset = master->size - post_size;
+ }
+
mtd_read(master, root_offset, sizeof(header), &len, (u8 *)&header);
if (header.checksum != SQUASHFS_MAGIC) {
root_offset += master->erasesize - 1;
--- a/drivers/mtd/titanpart.c
+++ b/drivers/mtd/titanpart.c
@@ -149,7 +149,7 @@ static void titan_add_partition(char * e
}
int create_titan_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
- unsigned long origin)
+ struct mtd_part_parser_data *data)
{
struct nsp_img_hdr_head hdr;
struct nsp_img_hdr_section_info sect_info;

View File

@ -0,0 +1,95 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -465,31 +465,22 @@ static struct gpio_led fb_fon_leds[] = {
},
};
-static struct gpio_led gt701_leds[] = {
+static struct gpio_led actiontec_leds[] = {
{
.name = "inet:green",
.gpio = 13,
- .active_low = 1,
- },
- {
- .name = "usb",
- .gpio = 12,
- .active_low = 1,
},
{
.name = "inet:red",
.gpio = 9,
- .active_low = 1,
},
{
- .name = "power:red",
+ .name = "power:green",
.gpio = 7,
- .active_low = 1,
},
{
- .name = "power:green",
+ .name = "power:red",
.gpio = 8,
- .active_low = 1,
.default_trigger = "default-on",
},
{
@@ -497,6 +488,44 @@ static struct gpio_led gt701_leds[] = {
.gpio = 10,
.active_low = 1,
},
+ {
+ .name = "wifi",
+ .gpio = 6,
+ .active_low = 1,
+ },
+ {
+ .name = "wifi:red",
+ .gpio = 3,
+ },
+ {
+ .name = "standby",
+ .gpio = 4,
+ },
+ {
+ .name = "wps",
+ .gpio = 16,
+ .active_low = 1,
+ },
+ {
+ .name = "usb",
+ .gpio = 12,
+ .active_low = 1,
+ },
+ {
+ .name = "voip",
+ .gpio = 15,
+ .active_low = 1,
+ },
+ {
+ .name = "line1",
+ .gpio = 23,
+ .active_low = 1,
+ },
+ {
+ .name = "line2",
+ .gpio = 25,
+ .active_low = 1,
+ },
};
static struct gpio_led_platform_data ar7_led_data;
@@ -540,9 +569,9 @@ static void __init detect_leds(void)
} else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
ar7_led_data.leds = titan_leds;
- } else if (strstr(prid, "GT701")) {
- ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
- ar7_led_data.leds = gt701_leds;
+ } else if (strstr(prid, "GT7") || strstr(prid, "PK5000")) {
+ ar7_led_data.num_leds = ARRAY_SIZE(actiontec_leds);
+ ar7_led_data.leds = actiontec_leds;
}
}

View File

@ -0,0 +1,52 @@
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -1155,6 +1155,8 @@ static int cpmac_probe(struct platform_d
goto fail;
}
+ ar7_device_reset(pdata->reset_bit);
+
dev->irq = platform_get_irq_byname(pdev, "irq");
dev->netdev_ops = &cpmac_netdev_ops;
@@ -1233,7 +1235,7 @@ int cpmac_init(void)
cpmac_mii->reset = cpmac_mdio_reset;
cpmac_mii->irq = mii_irqs;
- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
+ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
if (!cpmac_mii->priv) {
printk(KERN_ERR "Can't ioremap mdio registers\n");
@@ -1244,10 +1246,16 @@ int cpmac_init(void)
#warning FIXME: unhardcode gpio&reset bits
ar7_gpio_disable(26);
ar7_gpio_disable(27);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+
+ if (!ar7_is_titan()) {
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+ }
ar7_device_reset(AR7_RESET_BIT_EPHY);
+ if (ar7_is_titan())
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
+
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++) {
@@ -1264,7 +1272,11 @@ int cpmac_init(void)
mask = 0;
}
- cpmac_mii->phy_mask = ~(mask | 0x80000000);
+ if (ar7_is_titan())
+ cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
+ else
+ cpmac_mii->phy_mask = ~(mask | 0x80000000);
+
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "cpmac-1");
res = mdiobus_register(cpmac_mii);

View File

@ -0,0 +1,221 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -712,26 +712,23 @@ static int __init ar7_register_devices(v
}
if (ar7_has_high_cpmac()) {
+ cpmac_get_mac(0, cpmac_high_data.dev_addr);
+
res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
- if (!res) {
- cpmac_get_mac(1, cpmac_high_data.dev_addr);
+ if (!res)
+ pr_warning("unable to register fixed phy for cpmac-high: %d\n", res);
- res = platform_device_register(&cpmac_high);
- if (res)
- pr_warning("unable to register cpmac-high: %d\n", res);
- } else
- pr_warning("unable to add cpmac-high phy: %d\n", res);
- } else
+ res = platform_device_register(&cpmac_high);
+ if (res)
+ pr_warning("unable to register cpmac-high: %d\n", res);
+ cpmac_get_mac(1, cpmac_low_data.dev_addr);
+ } else {
cpmac_low_data.phy_mask = 0xffffffff;
-
- res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
- if (!res) {
cpmac_get_mac(0, cpmac_low_data.dev_addr);
- res = platform_device_register(&cpmac_low);
- if (res)
- pr_warning("unable to register cpmac-low: %d\n", res);
- } else
- pr_warning("unable to add cpmac-low phy: %d\n", res);
+ }
+ res = platform_device_register(&cpmac_low);
+ if (res)
+ pr_warning("unable to register cpmac-low: %d\n", res);
detect_leds();
res = platform_device_register(&ar7_gpio_leds);
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -42,6 +42,7 @@
#define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C)
#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
+#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -35,7 +35,6 @@
#include <linux/skbuff.h>
#include <linux/mii.h>
#include <linux/phy.h>
-#include <linux/phy_fixed.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
@@ -48,14 +47,11 @@ MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:cpmac");
static int debug_level = 8;
-static int dumb_switch;
-/* Next 2 are only used in cpmac_probe, so it's pointless to change them */
+/* Next is only used in cpmac_probe, so it's pointless to change them */
module_param(debug_level, int, 0444);
-module_param(dumb_switch, int, 0444);
MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
-MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
#define CPMAC_VERSION "0.5.2"
/* frame size + 802.1q tag + FCS size */
@@ -674,9 +670,8 @@ static void cpmac_hw_start(struct net_de
for (i = 0; i < 8; i++)
cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
- cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
- (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
- (dev->dev_addr[3] << 24));
+ cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
+ dev->dev_addr));
cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
@@ -1120,25 +1115,19 @@ static int cpmac_probe(struct platform_d
pdata = pdev->dev.platform_data;
- if (external_switch || dumb_switch) {
- strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
- phy_id = pdev->id;
- } else {
- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
- if (!(pdata->phy_mask & (1 << phy_id)))
- continue;
- if (!cpmac_mii->phy_map[phy_id])
- continue;
- strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
- break;
- }
+ for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
+ if (!(pdata->phy_mask & (1 << phy_id)))
+ continue;
+ if (!cpmac_mii->phy_map[phy_id])
+ continue;
+ strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
+ break;
}
- if (phy_id == PHY_MAX_ADDR) {
- dev_err(&pdev->dev, "no PHY present, falling back "
- "to switch on MDIO bus 0\n");
- strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
+ if (phy_id == PHY_MAX_ADDR && pdev->id == 1) {
+ printk(KERN_ERR "cpmac: No PHY present, using fixed PHY\n");
phy_id = pdev->id;
+ strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
}
dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
@@ -1174,6 +1163,13 @@ static int cpmac_probe(struct platform_d
snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT,
mdio_bus_id, phy_id);
+ rc = register_netdev(dev);
+ if (rc) {
+ printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
+ dev->name);
+ goto fail;
+ }
+
priv->phy = phy_connect(dev, priv->phy_name, cpmac_adjust_link,
PHY_INTERFACE_MODE_MII);
@@ -1185,13 +1181,6 @@ static int cpmac_probe(struct platform_d
goto fail;
}
- rc = register_netdev(dev);
- if (rc) {
- printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
- dev->name);
- goto fail;
- }
-
if (netif_msg_probe(priv)) {
printk(KERN_INFO
"cpmac: device %s (regs: %p, irq: %d, phy: %s, "
@@ -1224,6 +1213,7 @@ int cpmac_init(void)
{
u32 mask;
int i, res;
+ void __iomem *mii_reg;
cpmac_mii = mdiobus_alloc();
if (cpmac_mii == NULL)
@@ -1247,31 +1237,51 @@ int cpmac_init(void)
ar7_gpio_disable(26);
ar7_gpio_disable(27);
- if (!ar7_is_titan()) {
+ if (ar7_is_titan()) {
+ ar7_device_reset(AR7_RESET_BIT_EPHY);
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
+ } else {
+ ar7_device_reset(AR7_RESET_BIT_EPHY);
ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
}
- ar7_device_reset(AR7_RESET_BIT_EPHY);
-
- if (ar7_is_titan())
- ar7_device_reset(TITAN_RESET_BIT_EPHY1);
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++) {
mask = cpmac_read(cpmac_mii->priv, CPMAC_MDIO_ALIVE);
+ mask &= ar7_is_titan()? ~(0x80000000 | 0x40000000) : ~(0x80000000);
if (mask)
break;
else
msleep(10);
}
- mask &= 0x7fffffff;
if (mask & (mask - 1)) {
external_switch = 1;
- mask = 0;
+ if (!ar7_has_high_cpmac()) {
+ if (ar7_is_titan()) {
+ ar7_device_disable(AR7_RESET_BIT_EPHY);
+ ar7_device_disable(TITAN_RESET_BIT_EPHY1);
+ } else
+ ar7_device_disable(AR7_RESET_BIT_EPHY);
+
+ //Titan remap might be different
+ mii_reg = ioremap(AR7_REGS_MII, 4);
+ if (mii_reg) {
+ writel(readl(mii_reg) | 1, mii_reg);
+ iounmap(mii_reg);
+ }
+ }
}
+ if (external_switch)
+ printk(KERN_INFO "EXTERNAL SWITCH!!!\n");
+ else if (mask)
+ printk(KERN_INFO "EXTERNAL PHY!!!\n");
+ else
+ printk(KERN_INFO "INTERNAL PHY!!!\n");
+
if (ar7_is_titan())
cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
else