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ipq806x: fix pcie tx0-term-offset setting

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Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 47543
This commit is contained in:
Felix Fietkau 2015-11-21 10:54:53 +00:00
parent 44b8472f16
commit 575413a779
10 changed files with 16 additions and 12 deletions
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4
target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
View File

@ -40,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
@@ -115,5 +133,19 @@
@@ -115,5 +133,21 @@
usb30@1 {
status = "ok";
};
@ -50,6 +50,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ reset-gpio = <&qcom_pinmux 3 0>;
+ pinctrl-0 = <&pcie0_pins>;
+ pinctrl-names = "default";
+ phy-tx0-term-offset = <7>;
+ };
+
+ pcie1: pci@1b700000 {
@ -57,6 +58,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ reset-gpio = <&qcom_pinmux 48 0>;
+ pinctrl-0 = <&pcie1_pins>;
+ pinctrl-names = "default";
+ phy-tx0-term-offset = <7>;
+ };
};
};

4
target/linux/ipq806x/patches-3.18/165-arm-qcom-dts-Enable-NAND-node-on-IPQ8064-AP148-platform.patch
View File

@ -57,9 +57,9 @@ arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
};
gsbi@16300000 {
@@ -147,5 +172,19 @@
pinctrl-0 = <&pcie1_pins>;
@@ -149,5 +174,19 @@
pinctrl-names = "default";
phy-tx0-term-offset = <7>;
};
+
+ nand@1ac00000 {

2
target/linux/ipq806x/patches-3.18/166-arch-qcom-dts-enable-qcom-smem-on-AP148-NAND.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -181,6 +181,8 @@
@@ -183,6 +183,8 @@
nand-ecc-strength = <4>;
nand-bus-width = <8>;

2
target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
View File

@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -184,6 +194,34 @@
@@ -186,6 +196,34 @@
linux,part-probe = "qcom-smem";
};

2
target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
View File

@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -222,6 +232,27 @@
@@ -224,6 +234,27 @@
reg = <4>;
};
};

4
target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
View File

@ -40,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
@@ -91,5 +109,19 @@
@@ -91,5 +109,21 @@
sata@29000000 {
status = "ok";
};
@ -50,6 +50,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ reset-gpio = <&qcom_pinmux 3 0>;
+ pinctrl-0 = <&pcie0_pins>;
+ pinctrl-names = "default";
+ phy-tx0-term-offset = <7>;
+ };
+
+ pcie1: pci@1b700000 {
@ -57,6 +58,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ reset-gpio = <&qcom_pinmux 48 0>;
+ pinctrl-0 = <&pcie1_pins>;
+ pinctrl-names = "default";
+ phy-tx0-term-offset = <7>;
+ };
};
};

4
target/linux/ipq806x/patches-4.1/165-arm-qcom-dts-Enable-NAND-node-on-IPQ8064-AP148-platform.patch
View File

@ -54,9 +54,9 @@ arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
};
gsbi@16300000 {
@@ -123,5 +145,19 @@
pinctrl-0 = <&pcie1_pins>;
@@ -125,5 +147,19 @@
pinctrl-names = "default";
phy-tx0-term-offset = <7>;
};
+
+ nand@1ac00000 {

2
target/linux/ipq806x/patches-4.1/166-arch-qcom-dts-enable-qcom-smem-on-AP148-NAND.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -154,6 +154,8 @@
@@ -156,6 +156,8 @@
nand-ecc-strength = <4>;
nand-bus-width = <8>;

2
target/linux/ipq806x/patches-4.1/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
View File

@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -157,6 +167,34 @@
@@ -159,6 +169,34 @@
linux,part-probe = "qcom-smem";
};

2
target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
View File

@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -195,6 +205,27 @@
@@ -197,6 +207,27 @@
reg = <4>;
};
};