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bcm53xx: sprom: sync with mainline driver
The main difference now is bcm53xx registering it as platform (DT) driver. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45230
This commit is contained in:
Rafał Miłecki
parent
91071e366c
commit
509cce44bd
@ -1,17 +1,29 @@
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/*
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* BCM47xx/BCM53xx nvram variable access
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*
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* Copyright (C) 2005 Broadcom Corporation
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* Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2006 Michael Buesch <m@bues.ch>
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* Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2010-2014 Hauke Mehrtens <hauke@hauke-m.de>
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* Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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@ -29,11 +41,6 @@
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#include <linux/if_ether.h>
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#include <linux/etherdevice.h>
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struct bcm47xx_sprom_fill {
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const char *prefix;
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bool fallback;
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};
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static void create_key(const char *prefix, const char *postfix,
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const char *name, char *buf, int len)
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{
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@ -47,17 +54,16 @@ static void create_key(const char *prefix, const char *postfix,
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snprintf(buf, len, "%s", name);
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}
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static int get_nvram_var(const struct bcm47xx_sprom_fill *fill,
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const char *postfix, const char *name, char *buf,
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int len)
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static int get_nvram_var(const char *prefix, const char *postfix,
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const char *name, char *buf, int len, bool fallback)
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{
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char key[40];
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int err;
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create_key(fill->prefix, postfix, name, key, sizeof(key));
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create_key(prefix, postfix, name, key, sizeof(key));
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err = bcm47xx_nvram_getenv(key, buf, len);
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if (fill->fallback && err == -ENOENT && fill->prefix) {
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if (fallback && err == -ENOENT && prefix) {
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create_key(NULL, postfix, name, key, sizeof(key));
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err = bcm47xx_nvram_getenv(key, buf, len);
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}
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@ -65,21 +71,22 @@ static int get_nvram_var(const struct bcm47xx_sprom_fill *fill,
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}
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#define NVRAM_READ_VAL(type) \
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static void nvram_read_ ## type (const struct bcm47xx_sprom_fill *fill, \
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static void nvram_read_ ## type (const char *prefix, \
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const char *postfix, const char *name, \
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type *val, type allset) \
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type *val, type allset, bool fallback) \
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{ \
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char buf[100]; \
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int err; \
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type var; \
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\
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err = get_nvram_var(fill, postfix, name, buf, sizeof(buf)); \
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err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf), \
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fallback); \
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if (err < 0) \
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return; \
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err = kstrto ## type(strim(buf), 0, &var); \
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if (err) { \
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pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
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fill->prefix, name, postfix, buf, err); \
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prefix, name, postfix, buf, err); \
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return; \
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} \
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if (allset && var == allset) \
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@ -94,41 +101,41 @@ NVRAM_READ_VAL(u32)
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#undef NVRAM_READ_VAL
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static void nvram_read_u32_2(const struct bcm47xx_sprom_fill *fill,
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const char *name, u16 *val_lo, u16 *val_hi)
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static void nvram_read_u32_2(const char *prefix, const char *name,
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u16 *val_lo, u16 *val_hi, bool fallback)
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{
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char buf[100];
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int err;
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u32 val;
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err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
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err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
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if (err < 0)
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return;
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err = kstrtou32(strim(buf), 0, &val);
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if (err) {
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pr_warn("can not parse nvram name %s%s with value %s got %i\n",
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fill->prefix, name, buf, err);
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prefix, name, buf, err);
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return;
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}
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*val_lo = (val & 0x0000FFFFU);
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*val_hi = (val & 0xFFFF0000U) >> 16;
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}
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static void nvram_read_leddc(const struct bcm47xx_sprom_fill *fill,
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const char *name, u8 *leddc_on_time,
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u8 *leddc_off_time)
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static void nvram_read_leddc(const char *prefix, const char *name,
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u8 *leddc_on_time, u8 *leddc_off_time,
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bool fallback)
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{
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char buf[100];
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int err;
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u32 val;
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err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
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err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
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if (err < 0)
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return;
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err = kstrtou32(strim(buf), 0, &val);
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if (err) {
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pr_warn("can not parse nvram name %s%s with value %s got %i\n",
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fill->prefix, name, buf, err);
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prefix, name, buf, err);
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return;
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}
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@ -153,26 +160,26 @@ static void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
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pr_warn("Can not parse mac address: %s\n", buf);
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}
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static void nvram_read_macaddr(const struct bcm47xx_sprom_fill *fill,
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const char *name, u8 val[6])
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static void nvram_read_macaddr(const char *prefix, const char *name,
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u8 val[6], bool fallback)
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{
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char buf[100];
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int err;
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err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
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err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
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if (err < 0)
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return;
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bcm47xx_nvram_parse_macaddr(buf, val);
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}
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static void nvram_read_alpha2(const struct bcm47xx_sprom_fill *fill,
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const char *name, char val[2])
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static void nvram_read_alpha2(const char *prefix, const char *name,
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char val[2], bool fallback)
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{
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char buf[10];
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int err;
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err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
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err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
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if (err < 0)
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return;
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if (buf[0] == '0')
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@ -184,303 +191,321 @@ static void nvram_read_alpha2(const struct bcm47xx_sprom_fill *fill,
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memcpy(val, buf, 2);
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}
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static void bcm47xx_sprom_fill_r1234589(struct ssb_sprom *sprom,
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const struct bcm47xx_sprom_fill *fill)
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/* This is one-function-only macro, it uses local "sprom" variable! */
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#define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
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if (_revmask & BIT(sprom->revision)) \
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nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
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_allset, _fallback)
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/*
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* Special version of filling function that can be safely called for any SPROM
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* revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
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* for which the mapping is valid.
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* It obviously requires some hexadecimal/bitmasks knowledge, but allows
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* writing cleaner code (easy revisions handling).
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* Note that while SPROM revision 0 was never used, we still keep BIT(0)
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* reserved for it, just to keep numbering sane.
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*/
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static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
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const char *prefix, bool fallback)
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{
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nvram_read_u16(fill, NULL, "devid", &sprom->dev_id, 0);
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nvram_read_u8(fill, NULL, "ledbh0", &sprom->gpio0, 0xff);
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nvram_read_u8(fill, NULL, "ledbh1", &sprom->gpio1, 0xff);
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nvram_read_u8(fill, NULL, "ledbh2", &sprom->gpio2, 0xff);
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nvram_read_u8(fill, NULL, "ledbh3", &sprom->gpio3, 0xff);
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nvram_read_u8(fill, NULL, "aa2g", &sprom->ant_available_bg, 0);
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nvram_read_u8(fill, NULL, "aa5g", &sprom->ant_available_a, 0);
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nvram_read_s8(fill, NULL, "ag0", &sprom->antenna_gain.a0, 0);
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nvram_read_s8(fill, NULL, "ag1", &sprom->antenna_gain.a1, 0);
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nvram_read_alpha2(fill, "ccode", sprom->alpha2);
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const char *pre = prefix;
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bool fb = fallback;
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ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
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ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
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ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
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ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
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ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
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ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
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ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
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ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
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ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
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ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
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ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
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ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
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ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
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ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
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ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
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ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
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ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
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ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
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ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
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ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
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ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
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ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
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ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
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ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
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ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
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ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
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ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
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ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
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ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
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ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
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ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
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ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
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ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
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ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
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ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
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ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
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ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
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ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
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ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
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ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
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ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
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ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
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ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
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ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
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ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
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ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
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ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
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ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
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ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
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ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
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ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
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ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
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ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
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ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
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ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
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ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
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ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
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ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
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ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
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ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
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ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
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ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
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ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
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ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
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ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
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ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
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ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
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ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
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ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
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||||
ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
|
||||
|
||||
ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
|
||||
ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
|
||||
ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
|
||||
ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
|
||||
ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
|
||||
ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
|
||||
|
||||
ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
|
||||
ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
|
||||
ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
|
||||
ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
|
||||
ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
|
||||
|
||||
/* TODO: rev 11 support */
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
|
||||
|
||||
ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
|
||||
ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
|
||||
|
||||
/* TODO: rev 11 support */
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
|
||||
ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
|
||||
}
|
||||
#undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
|
||||
|
||||
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
|
||||
nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r12389(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix,
|
||||
bool fallback)
|
||||
{
|
||||
nvram_read_u16(fill, NULL, "pa0b0", &sprom->pa0b0, 0);
|
||||
nvram_read_u16(fill, NULL, "pa0b1", &sprom->pa0b1, 0);
|
||||
nvram_read_u16(fill, NULL, "pa0b2", &sprom->pa0b2, 0);
|
||||
nvram_read_u8(fill, NULL, "pa0itssit", &sprom->itssi_bg, 0);
|
||||
nvram_read_u8(fill, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1b0", &sprom->pa1b0, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1b1", &sprom->pa1b1, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1b2", &sprom->pa1b2, 0);
|
||||
nvram_read_u8(fill, NULL, "pa1itssit", &sprom->itssi_a, 0);
|
||||
nvram_read_u8(fill, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
|
||||
nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
|
||||
&sprom->leddc_off_time, fallback);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r1(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
nvram_read_u16(fill, NULL, "boardflags", &sprom->boardflags_lo, 0);
|
||||
nvram_read_u8(fill, NULL, "cc", &sprom->country_code, 0);
|
||||
nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
|
||||
&sprom->leddc_off_time, fallback);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r2389(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "opo", &sprom->opo, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1lob0", &sprom->pa1lob0, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1lob1", &sprom->pa1lob1, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1lob2", &sprom->pa1lob2, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1hib0", &sprom->pa1hib0, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1hib1", &sprom->pa1hib1, 0);
|
||||
nvram_read_u16(fill, NULL, "pa1hib2", &sprom->pa1hib2, 0);
|
||||
nvram_read_u8(fill, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
|
||||
nvram_read_u8(fill, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r389(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "bxa2g", &sprom->bxa2g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssisav2g", &sprom->rssisav2g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssismc2g", &sprom->rssismc2g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssismf2g", &sprom->rssismf2g, 0);
|
||||
nvram_read_u8(fill, NULL, "bxa5g", &sprom->bxa5g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssisav5g", &sprom->rssisav5g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssismc5g", &sprom->rssismc5g, 0);
|
||||
nvram_read_u8(fill, NULL, "rssismf5g", &sprom->rssismf5g, 0);
|
||||
nvram_read_u8(fill, NULL, "tri2g", &sprom->tri2g, 0);
|
||||
nvram_read_u8(fill, NULL, "tri5g", &sprom->tri5g, 0);
|
||||
nvram_read_u8(fill, NULL, "tri5gl", &sprom->tri5gl, 0);
|
||||
nvram_read_u8(fill, NULL, "tri5gh", &sprom->tri5gh, 0);
|
||||
nvram_read_s8(fill, NULL, "rxpo2g", &sprom->rxpo2g, 0);
|
||||
nvram_read_s8(fill, NULL, "rxpo5g", &sprom->rxpo5g, 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r3(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
|
||||
nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
|
||||
&sprom->leddc_off_time);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r4589(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
|
||||
nvram_read_s8(fill, NULL, "ag2", &sprom->antenna_gain.a2, 0);
|
||||
nvram_read_s8(fill, NULL, "ag3", &sprom->antenna_gain.a3, 0);
|
||||
nvram_read_u8(fill, NULL, "txchain", &sprom->txchain, 0xf);
|
||||
nvram_read_u8(fill, NULL, "rxchain", &sprom->rxchain, 0xf);
|
||||
nvram_read_u8(fill, NULL, "antswitch", &sprom->antswitch, 0xff);
|
||||
nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
|
||||
&sprom->leddc_off_time);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r458(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u16(fill, NULL, "cck2gpo", &sprom->cck2gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
|
||||
nvram_read_u16(fill, NULL, "cddpo", &sprom->cddpo, 0);
|
||||
nvram_read_u16(fill, NULL, "stbcpo", &sprom->stbcpo, 0);
|
||||
nvram_read_u16(fill, NULL, "bw40po", &sprom->bw40po, 0);
|
||||
nvram_read_u16(fill, NULL, "bwduppo", &sprom->bwduppo, 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
|
||||
nvram_read_u16(fill, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r45(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
|
||||
nvram_read_u8(fill, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r89(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u8(fill, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
|
||||
nvram_read_u8(fill, NULL, "extpagain2g", &sprom->fem.ghz2.extpa_gain, 0);
|
||||
nvram_read_u8(fill, NULL, "pdetrange2g", &sprom->fem.ghz2.pdet_range, 0);
|
||||
nvram_read_u8(fill, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
|
||||
nvram_read_u8(fill, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
|
||||
nvram_read_u8(fill, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
|
||||
nvram_read_u8(fill, NULL, "extpagain5g", &sprom->fem.ghz5.extpa_gain, 0);
|
||||
nvram_read_u8(fill, NULL, "pdetrange5g", &sprom->fem.ghz5.pdet_range, 0);
|
||||
nvram_read_u8(fill, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
|
||||
nvram_read_u8(fill, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
|
||||
nvram_read_u8(fill, NULL, "tempthresh", &sprom->tempthresh, 0);
|
||||
nvram_read_u8(fill, NULL, "tempoffset", &sprom->tempoffset, 0);
|
||||
nvram_read_u16(fill, NULL, "rawtempsense", &sprom->rawtempsense, 0);
|
||||
nvram_read_u8(fill, NULL, "measpower", &sprom->measpower, 0);
|
||||
nvram_read_u8(fill, NULL, "tempsense_slope", &sprom->tempsense_slope, 0);
|
||||
nvram_read_u8(fill, NULL, "tempcorrx", &sprom->tempcorrx, 0);
|
||||
nvram_read_u8(fill, NULL, "tempsense_option", &sprom->tempsense_option, 0);
|
||||
nvram_read_u8(fill, NULL, "freqoffset_corr", &sprom->freqoffset_corr, 0);
|
||||
nvram_read_u8(fill, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
|
||||
nvram_read_u8(fill, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
|
||||
nvram_read_u8(fill, NULL, "elna2g", &sprom->elna2g, 0);
|
||||
nvram_read_u8(fill, NULL, "elna5g", &sprom->elna5g, 0);
|
||||
nvram_read_u8(fill, NULL, "phycal_tempdelta", &sprom->phycal_tempdelta, 0);
|
||||
nvram_read_u8(fill, NULL, "temps_period", &sprom->temps_period, 0);
|
||||
nvram_read_u8(fill, NULL, "temps_hysteresis", &sprom->temps_hysteresis, 0);
|
||||
nvram_read_u8(fill, NULL, "measpower1", &sprom->measpower1, 0);
|
||||
nvram_read_u8(fill, NULL, "measpower2", &sprom->measpower2, 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr2ga0", &sprom->rxgainerr2ga[0], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr2ga1", &sprom->rxgainerr2ga[1], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr2ga2", &sprom->rxgainerr2ga[2], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gla0", &sprom->rxgainerr5gla[0], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gla1", &sprom->rxgainerr5gla[1], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gla2", &sprom->rxgainerr5gla[2], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gma0", &sprom->rxgainerr5gma[0], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gma1", &sprom->rxgainerr5gma[1], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gma2", &sprom->rxgainerr5gma[2], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gha0", &sprom->rxgainerr5gha[0], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gha1", &sprom->rxgainerr5gha[1], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gha2", &sprom->rxgainerr5gha[2], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gua0", &sprom->rxgainerr5gua[0], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gua1", &sprom->rxgainerr5gua[1], 0);
|
||||
nvram_read_u8(fill, NULL, "rxgainerr5gua2", &sprom->rxgainerr5gua[2], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gla0", &sprom->noiselvl5gla[0], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gla1", &sprom->noiselvl5gla[1], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gla2", &sprom->noiselvl5gla[2], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gma0", &sprom->noiselvl5gma[0], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gma1", &sprom->noiselvl5gma[1], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gma2", &sprom->noiselvl5gma[2], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gha0", &sprom->noiselvl5gha[0], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gha1", &sprom->noiselvl5gha[1], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gha2", &sprom->noiselvl5gha[2], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gua0", &sprom->noiselvl5gua[0], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gua1", &sprom->noiselvl5gua[1], 0);
|
||||
nvram_read_u8(fill, NULL, "noiselvl5gua2", &sprom->noiselvl5gua[2], 0);
|
||||
nvram_read_u8(fill, NULL, "pcieingress_war", &sprom->pcieingress_war, 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_r9(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
{
|
||||
nvram_read_u16(fill, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
|
||||
nvram_read_u16(fill, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw202gpo", &sprom->legofdmbw202gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw20ul2gpo", &sprom->legofdmbw20ul2gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw205glpo", &sprom->legofdmbw205glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw20ul5glpo", &sprom->legofdmbw20ul5glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw205gmpo", &sprom->legofdmbw205gmpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw20ul5gmpo", &sprom->legofdmbw20ul5gmpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw205ghpo", &sprom->legofdmbw205ghpo, 0);
|
||||
nvram_read_u32(fill, NULL, "legofdmbw20ul5ghpo", &sprom->legofdmbw20ul5ghpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw20ul5glpo", &sprom->mcsbw20ul5glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw20ul5gmpo", &sprom->mcsbw20ul5gmpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw20ul5ghpo", &sprom->mcsbw20ul5ghpo, 0);
|
||||
nvram_read_u32(fill, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
|
||||
nvram_read_u16(fill, NULL, "mcs32po", &sprom->mcs32po, 0);
|
||||
nvram_read_u16(fill, NULL, "legofdm40duppo", &sprom->legofdm40duppo, 0);
|
||||
nvram_read_u8(fill, NULL, "sar2g", &sprom->sar2g, 0);
|
||||
nvram_read_u8(fill, NULL, "sar5g", &sprom->sar5g, 0);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_path_r4589(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
char postfix[2];
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
|
||||
struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
|
||||
|
||||
snprintf(postfix, sizeof(postfix), "%i", i);
|
||||
nvram_read_u8(fill, postfix, "maxp2ga", &pwr_info->maxpwr_2g, 0);
|
||||
nvram_read_u8(fill, postfix, "itt2ga", &pwr_info->itssi_2g, 0);
|
||||
nvram_read_u8(fill, postfix, "itt5ga", &pwr_info->itssi_5g, 0);
|
||||
nvram_read_u16(fill, postfix, "pa2gw0a", &pwr_info->pa_2g[0], 0);
|
||||
nvram_read_u16(fill, postfix, "pa2gw1a", &pwr_info->pa_2g[1], 0);
|
||||
nvram_read_u16(fill, postfix, "pa2gw2a", &pwr_info->pa_2g[2], 0);
|
||||
nvram_read_u8(fill, postfix, "maxp5ga", &pwr_info->maxpwr_5g, 0);
|
||||
nvram_read_u8(fill, postfix, "maxp5gha", &pwr_info->maxpwr_5gh, 0);
|
||||
nvram_read_u8(fill, postfix, "maxp5gla", &pwr_info->maxpwr_5gl, 0);
|
||||
nvram_read_u16(fill, postfix, "pa5gw0a", &pwr_info->pa_5g[0], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5gw1a", &pwr_info->pa_5g[1], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5gw2a", &pwr_info->pa_5g[2], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5glw0a", &pwr_info->pa_5gl[0], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5glw1a", &pwr_info->pa_5gl[1], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5glw2a", &pwr_info->pa_5gl[2], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5ghw0a", &pwr_info->pa_5gh[0], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5ghw1a", &pwr_info->pa_5gh[1], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5ghw2a", &pwr_info->pa_5gh[2], 0);
|
||||
nvram_read_u8(prefix, postfix, "maxp2ga",
|
||||
&pwr_info->maxpwr_2g, 0, fallback);
|
||||
nvram_read_u8(prefix, postfix, "itt2ga",
|
||||
&pwr_info->itssi_2g, 0, fallback);
|
||||
nvram_read_u8(prefix, postfix, "itt5ga",
|
||||
&pwr_info->itssi_5g, 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa2gw0a",
|
||||
&pwr_info->pa_2g[0], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa2gw1a",
|
||||
&pwr_info->pa_2g[1], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa2gw2a",
|
||||
&pwr_info->pa_2g[2], 0, fallback);
|
||||
nvram_read_u8(prefix, postfix, "maxp5ga",
|
||||
&pwr_info->maxpwr_5g, 0, fallback);
|
||||
nvram_read_u8(prefix, postfix, "maxp5gha",
|
||||
&pwr_info->maxpwr_5gh, 0, fallback);
|
||||
nvram_read_u8(prefix, postfix, "maxp5gla",
|
||||
&pwr_info->maxpwr_5gl, 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5gw0a",
|
||||
&pwr_info->pa_5g[0], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5gw1a",
|
||||
&pwr_info->pa_5g[1], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5gw2a",
|
||||
&pwr_info->pa_5g[2], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5glw0a",
|
||||
&pwr_info->pa_5gl[0], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5glw1a",
|
||||
&pwr_info->pa_5gl[1], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5glw2a",
|
||||
&pwr_info->pa_5gl[2], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5ghw0a",
|
||||
&pwr_info->pa_5gh[0], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5ghw1a",
|
||||
&pwr_info->pa_5gh[1], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5ghw2a",
|
||||
&pwr_info->pa_5gh[2], 0, fallback);
|
||||
}
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_path_r45(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
char postfix[2];
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
|
||||
struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
|
||||
|
||||
snprintf(postfix, sizeof(postfix), "%i", i);
|
||||
nvram_read_u16(fill, postfix, "pa2gw3a", &pwr_info->pa_2g[3], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5gw3a", &pwr_info->pa_5g[3], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5glw3a", &pwr_info->pa_5gl[3], 0);
|
||||
nvram_read_u16(fill, postfix, "pa5ghw3a", &pwr_info->pa_5gh[3], 0);
|
||||
nvram_read_u16(prefix, postfix, "pa2gw3a",
|
||||
&pwr_info->pa_2g[3], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5gw3a",
|
||||
&pwr_info->pa_5g[3], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5glw3a",
|
||||
&pwr_info->pa_5gl[3], 0, fallback);
|
||||
nvram_read_u16(prefix, postfix, "pa5ghw3a",
|
||||
&pwr_info->pa_5gh[3], 0, fallback);
|
||||
}
|
||||
}
|
||||
|
||||
@ -509,41 +534,35 @@ static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is a global counter because different instances of sprom will
|
||||
* access the same nvram.
|
||||
*/
|
||||
static int mac_addr_used = 2;
|
||||
|
||||
static void bcm47xx_sprom_fill_ethernet(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
nvram_read_macaddr(fill, "et0macaddr", sprom->et0mac);
|
||||
nvram_read_u8(fill, NULL, "et0mdcport", &sprom->et0mdcport, 0);
|
||||
nvram_read_u8(fill, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
|
||||
nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
|
||||
nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
|
||||
fallback);
|
||||
nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
|
||||
fallback);
|
||||
|
||||
nvram_read_macaddr(fill, "et1macaddr", sprom->et1mac);
|
||||
nvram_read_u8(fill, NULL, "et1mdcport", &sprom->et1mdcport, 0);
|
||||
nvram_read_u8(fill, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
|
||||
nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
|
||||
nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
|
||||
fallback);
|
||||
nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
|
||||
fallback);
|
||||
|
||||
nvram_read_macaddr(fill, "macaddr", sprom->il0mac);
|
||||
nvram_read_macaddr(fill, "il0macaddr", sprom->il0mac);
|
||||
nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
|
||||
nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
|
||||
|
||||
/*
|
||||
* The address prefix 00:90:4C is used by Broadcom in their initial
|
||||
* configuration. When a mac address with the prefix 00:90:4C is used
|
||||
* all devices from the same series are sharing the same mac address.
|
||||
* To prevent mac address collisions we replace them with a mac address
|
||||
* based on the base address.
|
||||
*/
|
||||
/* The address prefix 00:90:4C is used by Broadcom in their initial
|
||||
configuration. When a mac address with the prefix 00:90:4C is used
|
||||
all devices from the same series are sharing the same mac address.
|
||||
To prevent mac address collisions we replace them with a mac address
|
||||
based on the base address. */
|
||||
if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
|
||||
u8 mac[6];
|
||||
struct bcm47xx_sprom_fill fill_no_prefix;
|
||||
|
||||
memcpy(&fill_no_prefix, fill, sizeof(fill_no_prefix));
|
||||
fill_no_prefix.prefix = NULL;
|
||||
|
||||
nvram_read_macaddr(&fill_no_prefix, "et0macaddr", mac);
|
||||
nvram_read_macaddr(NULL, "et0macaddr", mac, false);
|
||||
if (bcm47xx_is_valid_mac(mac)) {
|
||||
int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
|
||||
|
||||
@ -555,84 +574,60 @@ static void bcm47xx_sprom_fill_ethernet(struct ssb_sprom *sprom,
|
||||
}
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill_board_data(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
|
||||
bool fallback)
|
||||
{
|
||||
nvram_read_u16(fill, NULL, "boardrev", &sprom->board_rev, 0);
|
||||
nvram_read_u16(fill, NULL, "boardnum", &sprom->board_num, 0);
|
||||
nvram_read_u16(fill, NULL, "boardtype", &sprom->board_type, 0);
|
||||
nvram_read_u32_2(fill, "boardflags", &sprom->boardflags_lo,
|
||||
&sprom->boardflags_hi);
|
||||
nvram_read_u32_2(fill, "boardflags2", &sprom->boardflags2_lo,
|
||||
&sprom->boardflags2_hi);
|
||||
nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
|
||||
&sprom->boardflags_hi, fallback);
|
||||
nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
|
||||
&sprom->boardflags2_hi, fallback);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_fill(struct ssb_sprom *sprom,
|
||||
const struct bcm47xx_sprom_fill *fill)
|
||||
void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
|
||||
bool fallback)
|
||||
{
|
||||
bcm47xx_sprom_fill_ethernet(sprom, fill);
|
||||
bcm47xx_sprom_fill_board_data(sprom, fill);
|
||||
bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
|
||||
bcm47xx_fill_board_data(sprom, prefix, fallback);
|
||||
|
||||
nvram_read_u8(fill, NULL, "sromrev", &sprom->revision, 0);
|
||||
nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
|
||||
|
||||
switch (sprom->revision) {
|
||||
case 1:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r1(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
break;
|
||||
case 2:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r2389(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
break;
|
||||
case 3:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r2389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r3(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_r3(sprom, prefix, fallback);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r4589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r458(sprom, fill);
|
||||
bcm47xx_sprom_fill_r45(sprom, fill);
|
||||
bcm47xx_sprom_fill_path_r4589(sprom, fill);
|
||||
bcm47xx_sprom_fill_path_r45(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
|
||||
break;
|
||||
case 8:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r2389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r4589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r458(sprom, fill);
|
||||
bcm47xx_sprom_fill_r89(sprom, fill);
|
||||
bcm47xx_sprom_fill_path_r4589(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
|
||||
break;
|
||||
case 9:
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r2389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r4589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r89(sprom, fill);
|
||||
bcm47xx_sprom_fill_r9(sprom, fill);
|
||||
bcm47xx_sprom_fill_path_r4589(sprom, fill);
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
|
||||
bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
|
||||
break;
|
||||
default:
|
||||
pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
|
||||
sprom->revision);
|
||||
sprom->revision = 1;
|
||||
bcm47xx_sprom_fill_r1234589(sprom, fill);
|
||||
bcm47xx_sprom_fill_r12389(sprom, fill);
|
||||
bcm47xx_sprom_fill_r1(sprom, fill);
|
||||
}
|
||||
bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
|
||||
}
|
||||
|
||||
static char prefix[20];
|
||||
bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
|
||||
}
|
||||
|
||||
static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
|
||||
{
|
||||
@ -669,7 +664,7 @@ static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
|
||||
*/
|
||||
static int bcm47xx_sprom_init(struct bcma_bus *bus, struct ssb_sprom *out)
|
||||
{
|
||||
struct bcm47xx_sprom_fill fill;
|
||||
char prefix[20];
|
||||
|
||||
switch (bus->hosttype) {
|
||||
case BCMA_HOSTTYPE_PCI:
|
||||
@ -677,20 +672,16 @@ static int bcm47xx_sprom_init(struct bcma_bus *bus, struct ssb_sprom *out)
|
||||
pci_domain_nr(bus->host_pci->bus) + 1,
|
||||
bus->host_pci->bus->number);
|
||||
bcm47xx_sprom_apply_prefix_alias(prefix, sizeof(prefix));
|
||||
fill.prefix = prefix;
|
||||
bcm47xx_fill_sprom(out, prefix, false);
|
||||
break;
|
||||
case BCMA_HOSTTYPE_SOC:
|
||||
fill.prefix = NULL;
|
||||
bcm47xx_fill_sprom(out, NULL, false);
|
||||
break;
|
||||
default:
|
||||
pr_err("Unable to fill SPROM for given hosttype.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
fill.fallback = false;
|
||||
|
||||
bcm47xx_sprom_fill(out, &fill);
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user