mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 10:39:04 +00:00
apm821xx: copy over patches from 5.15
dropped tc654 patch as it is upstream. refreshed the rest. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This commit is contained in:
Christian Lamparter
parent
fdd3605398
commit
507013c2b9
@ -0,0 +1,30 @@
|
|||||||
|
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||||
|
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||||
|
@@ -118,6 +118,17 @@ config CANYONLANDS
|
||||||
|
help
|
||||||
|
This option enables support for the AMCC PPC460EX evaluation board.
|
||||||
|
|
||||||
|
+config APOLLO3G
|
||||||
|
+ bool "Apollo3G"
|
||||||
|
+ depends on 44x
|
||||||
|
+ default n
|
||||||
|
+ select PPC44x_SIMPLE
|
||||||
|
+ select APM821xx
|
||||||
|
+ select IBM_EMAC_RGMII
|
||||||
|
+ select 460EX
|
||||||
|
+ help
|
||||||
|
+ This option enables support for the AMCC Apollo 3G board.
|
||||||
|
+
|
||||||
|
config GLACIER
|
||||||
|
bool "Glacier"
|
||||||
|
depends on 44x
|
||||||
|
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||||
|
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||||
|
@@ -46,6 +46,7 @@ machine_device_initcall(ppc44x_simple, p
|
||||||
|
* board.c file for it rather than adding it to this list.
|
||||||
|
*/
|
||||||
|
static char *board[] __initdata = {
|
||||||
|
+ "amcc,apollo3g",
|
||||||
|
"amcc,arches",
|
||||||
|
"amcc,bamboo",
|
||||||
|
"apm,bluestone",
|
||||||
@ -0,0 +1,51 @@
|
|||||||
|
--- a/arch/powerpc/platforms/4xx/pci.c
|
||||||
|
+++ b/arch/powerpc/platforms/4xx/pci.c
|
||||||
|
@@ -1061,15 +1061,24 @@ static int __init apm821xx_pciex_init_po
|
||||||
|
u32 val;
|
||||||
|
|
||||||
|
/*
|
||||||
|
- * Do a software reset on PCIe ports.
|
||||||
|
- * This code is to fix the issue that pci drivers doesn't re-assign
|
||||||
|
- * bus number for PCIE devices after Uboot
|
||||||
|
- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
|
||||||
|
- * PT quad port, SAS LSI 1064E)
|
||||||
|
+ * Only reset the PHY when no link is currently established.
|
||||||
|
+ * This is for the Atheros PCIe board which has problems to establish
|
||||||
|
+ * the link (again) after this PHY reset. All other currently tested
|
||||||
|
+ * PCIe boards don't show this problem.
|
||||||
|
*/
|
||||||
|
-
|
||||||
|
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
|
||||||
|
- mdelay(10);
|
||||||
|
+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
|
||||||
|
+ if (!(val & 0x00001000)) {
|
||||||
|
+ /*
|
||||||
|
+ * Do a software reset on PCIe ports.
|
||||||
|
+ * This code is to fix the issue that pci drivers doesn't re-assign
|
||||||
|
+ * bus number for PCIE devices after Uboot
|
||||||
|
+ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
|
||||||
|
+ * PT quad port, SAS LSI 1064E)
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
|
||||||
|
+ mdelay(10);
|
||||||
|
+ }
|
||||||
|
|
||||||
|
if (port->endpoint)
|
||||||
|
val = PTYPE_LEGACY_ENDPOINT << 20;
|
||||||
|
@@ -1086,9 +1095,12 @@ static int __init apm821xx_pciex_init_po
|
||||||
|
mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
|
||||||
|
mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
|
||||||
|
|
||||||
|
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
|
||||||
|
- mdelay(50);
|
||||||
|
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
|
||||||
|
+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
|
||||||
|
+ if (!(val & 0x00001000)) {
|
||||||
|
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
|
||||||
|
+ mdelay(50);
|
||||||
|
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
|
||||||
|
+ }
|
||||||
|
|
||||||
|
mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
|
||||||
|
mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |
|
||||||
@ -0,0 +1,14 @@
|
|||||||
|
--- a/arch/powerpc/platforms/4xx/pci.c
|
||||||
|
+++ b/arch/powerpc/platforms/4xx/pci.c
|
||||||
|
@@ -1903,9 +1903,9 @@ static void __init ppc4xx_configure_pcie
|
||||||
|
* if it works
|
||||||
|
*/
|
||||||
|
out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
|
||||||
|
- out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
|
||||||
|
+ out_le32(mbase + PECFG_PIM0LAH, 0x00000008);
|
||||||
|
out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
|
||||||
|
- out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
|
||||||
|
+ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c);
|
||||||
|
out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
|
||||||
|
out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
|
||||||
|
|
||||||
@ -0,0 +1,29 @@
|
|||||||
|
From c9395ad54e2cabb87d408becc37566f3d8248933 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Lamparter <chunkeey@gmail.com>
|
||||||
|
Date: Sun, 1 Dec 2019 02:08:23 +0100
|
||||||
|
Subject: [PATCH] powerpc: bootwrapper: force gzip as mkimage's compression
|
||||||
|
method
|
||||||
|
|
||||||
|
Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
|
||||||
|
instruct the mkimage to use the xz compression, which isn't
|
||||||
|
supported. This patch forces the gzip compression, which is
|
||||||
|
supported and doesn't matter because the generated uImage for
|
||||||
|
the apm821xx target gets ignored as the OpenWrt toolchain will
|
||||||
|
do separate U-Boot kernel images for each device individually.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
|
||||||
|
---
|
||||||
|
arch/powerpc/boot/Makefile | 2 +-
|
||||||
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||||
|
|
||||||
|
--- a/arch/powerpc/boot/Makefile
|
||||||
|
+++ b/arch/powerpc/boot/Makefile
|
||||||
|
@@ -272,7 +272,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo
|
||||||
|
|
||||||
|
# args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd
|
||||||
|
quiet_cmd_wrap = WRAP $@
|
||||||
|
- cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z $(compressor-y) -c -o $@ -p $2 \
|
||||||
|
+ cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z gzip -c -o $@ -p $2 \
|
||||||
|
$(CROSSWRAP) $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) \
|
||||||
|
vmlinux
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user