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kernel: drop Maxlinear PHY LED control hack

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All devices have already been migrated to the upstream PHY LED
API. This prevents users from adding new devices using this hack.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
This commit is contained in:
Aleksander Jan Bajkowski 2025-03-01 15:41:07 +01:00 committed by Daniel Golle
parent fd76a38190
commit 5016c960bc
2 changed files with 4 additions and 78 deletions
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74
target/linux/generic/hack-6.6/765-mxl-gpy-control-LED-reg-from-DT.patch
View File

@ -1,74 +0,0 @@
From 94b90966095f3fa625897e8f53d215882f6e19b3 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sat, 11 Mar 2023 17:00:01 +0100
Subject: [PATCH] mxl-gpy: control LED reg from DT
Add dynamic configuration for the LED control registers on MXL PHYs.
This patch has been tested with MaxLinear GPY211C. It is unlikely to be
accepted upstream, as upstream plans on integrating their own framework
for handling these LEDs.
For the time being, use this hack to configure PHY driven device-LEDs to
show the correct state.
A possible alternative might be to expose the LEDs using the kernel LED
framework and bind it to the netdevice. This might also be upstreamable,
although it is a considerable extra amount of work.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/net/phy/mxl-gpy.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
--- a/drivers/net/phy/mxl-gpy.c
+++ b/drivers/net/phy/mxl-gpy.c
@@ -10,6 +10,7 @@
#include <linux/bitfield.h>
#include <linux/hwmon.h>
#include <linux/mutex.h>
+#include <linux/of.h>
#include <linux/phy.h>
#include <linux/polynomial.h>
#include <linux/property.h>
@@ -293,10 +294,39 @@ out:
return ret;
}
+static int gpy_led_write(struct phy_device *phydev)
+{
+ struct device_node *node = phydev->mdio.dev.of_node;
+ u32 led_regs[GPY_MAX_LEDS];
+ int i, ret;
+ u16 val = 0xff00;
+
+ if (!IS_ENABLED(CONFIG_OF_MDIO))
+ return 0;
+
+ if (of_property_read_u32_array(node, "mxl,led-config", led_regs, GPY_MAX_LEDS))
+ return 0;
+
+ if (of_property_read_bool(node, "mxl,led-drive-vdd"))
+ val &= 0x0fff;
+
+ /* Enable LED function handling on all ports*/
+ phy_write(phydev, PHY_LED, val);
+
+ /* Write LED register values */
+ for (i = 0; i < GPY_MAX_LEDS; i++) {
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_LED(i), (u16)led_regs[i]);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
static int gpy_config_init(struct phy_device *phydev)
{
/* Nothing to configure. Configuration Requirement Placeholder */
- return 0;
+ return gpy_led_write(phydev);
}
static int gpy_probe(struct phy_device *phydev)

8
target/linux/mediatek/patches-6.6/732-net-phy-mxl-gpy-don-t-use-SGMII-AN-if-using-phylink.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/mxl-gpy.c
+++ b/drivers/net/phy/mxl-gpy.c
@@ -402,8 +402,11 @@ static bool gpy_2500basex_chk(struct phy
@@ -372,8 +372,11 @@ static bool gpy_2500basex_chk(struct phy
phydev->speed = SPEED_2500;
phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
@ -28,7 +28,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
return true;
}
@@ -454,6 +457,14 @@ static int gpy_config_aneg(struct phy_de
@@ -424,6 +427,14 @@ static int gpy_config_aneg(struct phy_de
u32 adv;
int ret;
@ -43,7 +43,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
if (phydev->autoneg == AUTONEG_DISABLE) {
/* Configure half duplex with genphy_setup_forced,
* because genphy_c45_pma_setup_forced does not support.
@@ -576,6 +587,8 @@ static int gpy_update_interface(struct p
@@ -546,6 +557,8 @@ static int gpy_update_interface(struct p
switch (phydev->speed) {
case SPEED_2500:
phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
VSPEC1_SGMII_CTRL_ANEN, 0);
if (ret < 0) {
@@ -589,7 +602,7 @@ static int gpy_update_interface(struct p
@@ -559,7 +572,7 @@ static int gpy_update_interface(struct p
case SPEED_100:
case SPEED_10:
phydev->interface = PHY_INTERFACE_MODE_SGMII;