mirror of
https://github.com/openwrt/openwrt.git
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imx: drop 6.1 support
Drop config and files for Linux 6.1. Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Link: https://github.com/openwrt/openwrt/pull/16107 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Mieczyslaw Nalewaj
Robert Marko
parent
a99484ef58
commit
4d614f8d47
@ -1,486 +0,0 @@
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ARCH_32BIT_OFF_T=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_KEEP_MEMBLOCK=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MMAP_RND_BITS_MAX=15
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CONFIG_ARCH_MULTIPLATFORM=y
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CONFIG_ARCH_MULTI_V6_V7=y
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CONFIG_ARCH_MULTI_V7=y
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CONFIG_ARCH_MXC=y
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CONFIG_ARCH_NR_GPIO=0
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CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
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CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
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CONFIG_ARCH_SELECT_MEMORY_MODEL=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARM=y
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CONFIG_ARM_ARCH_TIMER=y
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CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
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CONFIG_ARM_ERRATA_754322=y
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CONFIG_ARM_ERRATA_764369=y
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CONFIG_ARM_ERRATA_775420=y
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CONFIG_ARM_ERRATA_814220=y
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CONFIG_ARM_HAS_GROUP_RELOCS=y
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CONFIG_ARM_HEAVY_MB=y
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# CONFIG_ARM_IMX6Q_CPUFREQ is not set
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# CONFIG_ARM_IMX_CPUFREQ_DT is not set
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CONFIG_ARM_L1_CACHE_SHIFT=6
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CONFIG_ARM_L1_CACHE_SHIFT_6=y
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CONFIG_ARM_PATCH_IDIV=y
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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CONFIG_ARM_THUMB=y
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CONFIG_ARM_UNWIND=y
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CONFIG_ARM_VIRT_EXT=y
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CONFIG_ASN1=y
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CONFIG_ASSOCIATIVE_ARRAY=y
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CONFIG_ATA=y
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CONFIG_ATAGS=y
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# CONFIG_ATA_SFF is not set
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CONFIG_AUTO_ZRELADDR=y
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CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_BLK_PM=y
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CONFIG_CACHE_L2X0=y
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CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
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CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
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CONFIG_CC_NO_ARRAY_BOUNDS=y
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CONFIG_CLKSRC_IMX_GPT=y
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CONFIG_CLKSRC_MMIO=y
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# CONFIG_CLK_IMX8MM is not set
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# CONFIG_CLK_IMX8MN is not set
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# CONFIG_CLK_IMX8MP is not set
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# CONFIG_CLK_IMX8MQ is not set
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# CONFIG_CLK_IMX8ULP is not set
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# CONFIG_CLK_IMX93 is not set
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CLZ_TAB=y
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CONFIG_COMMON_CLK=y
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CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
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CONFIG_COMPAT_32BIT_TIME=y
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CONFIG_CONTEXT_TRACKING=y
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CONFIG_CONTEXT_TRACKING_IDLE=y
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CONFIG_CPUFREQ_DT=y
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CONFIG_CPUFREQ_DT_PLATDEV=y
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CONFIG_CPU_32v6K=y
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CONFIG_CPU_32v7=y
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CONFIG_CPU_ABRT_EV7=y
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CONFIG_CPU_CACHE_V7=y
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CONFIG_CPU_CACHE_VIPT=y
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CONFIG_CPU_COPY_V6=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_ATTR_SET=y
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CONFIG_CPU_FREQ_GOV_COMMON=y
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CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
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CONFIG_CPU_FREQ_GOV_ONDEMAND=y
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_POWERSAVE=y
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CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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CONFIG_CPU_FREQ_STAT=y
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CONFIG_CPU_FREQ_THERMAL=y
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CONFIG_CPU_HAS_ASID=y
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CONFIG_CPU_LITTLE_ENDIAN=y
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CONFIG_CPU_PABRT_V7=y
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CONFIG_CPU_RMAP=y
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CONFIG_CPU_SPECTRE=y
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CONFIG_CPU_THERMAL=y
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CONFIG_CPU_THUMB_CAPABLE=y
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CONFIG_CPU_TLB_V7=y
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CONFIG_CPU_V7=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_AES_ARM=y
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CONFIG_CRYPTO_AES_ARM_BS=y
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CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y
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CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y
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CONFIG_CRYPTO_AUTHENC=y
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CONFIG_CRYPTO_BLAKE2S_ARM=y
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CONFIG_CRYPTO_CBC=y
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CONFIG_CRYPTO_CHACHA20=y
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CONFIG_CRYPTO_CHACHA20_NEON=y
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CONFIG_CRYPTO_CRC32=y
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CONFIG_CRYPTO_CRC32C=y
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CONFIG_CRYPTO_CRC32_ARM_CE=y
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CONFIG_CRYPTO_CRYPTD=y
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CONFIG_CRYPTO_CTS=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_DEV_FSL_CAAM=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
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# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
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# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
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CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API=y
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CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
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CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
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CONFIG_CRYPTO_DRBG=y
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CONFIG_CRYPTO_DRBG_HMAC=y
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CONFIG_CRYPTO_DRBG_MENU=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_ENGINE=y
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CONFIG_CRYPTO_HASH_INFO=y
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CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_HW=y
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CONFIG_CRYPTO_JITTERENTROPY=y
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CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y
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CONFIG_CRYPTO_LIB_DES=y
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CONFIG_CRYPTO_LIB_SHA1=y
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CONFIG_CRYPTO_LIB_SHA256=y
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CONFIG_CRYPTO_LIB_UTILS=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_RNG=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_RNG_DEFAULT=y
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CONFIG_CRYPTO_RSA=y
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CONFIG_CRYPTO_SEQIV=y
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CONFIG_CRYPTO_SHA1=y
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CONFIG_CRYPTO_SHA1_ARM=y
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CONFIG_CRYPTO_SHA1_ARM_NEON=y
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CONFIG_CRYPTO_SHA256=y
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CONFIG_CRYPTO_SHA256_ARM=y
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CONFIG_CRYPTO_SHA512=y
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CONFIG_CRYPTO_SHA512_ARM=y
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CONFIG_CRYPTO_SIMD=y
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CONFIG_CRYPTO_XTS=y
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CONFIG_CRYPTO_ZSTD=y
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CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
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CONFIG_DEBUG_MISC=y
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CONFIG_DECOMPRESS_BZIP2=y
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CONFIG_DECOMPRESS_GZIP=y
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CONFIG_DECOMPRESS_LZO=y
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CONFIG_DECOMPRESS_XZ=y
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CONFIG_DMADEVICES=y
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CONFIG_DMA_ENGINE=y
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CONFIG_DMA_OF=y
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CONFIG_DMA_OPS=y
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CONFIG_DMA_VIRTUAL_CHANNELS=y
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# CONFIG_DRM_FSL_LDB is not set
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# CONFIG_DRM_IMX8QM_LDB is not set
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# CONFIG_DRM_IMX8QXP_LDB is not set
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# CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set
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# CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set
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# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set
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# CONFIG_VIDEO_IMX_MIPI_CSIS is not set
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# CONFIG_VIDEO_DW100 is not set
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# CONFIG_VIDEO_ROCKCHIP_ISP1 is not set
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# CONFIG_VIDEO_HANTRO is not set
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CONFIG_DTC=y
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CONFIG_EDAC_ATOMIC_SCRUB=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_ENCRYPTED_KEYS=y
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CONFIG_EXCLUSIVE_SYSTEM_RAM=y
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS_POSIX_ACL=y
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CONFIG_EXT4_FS_SECURITY=y
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CONFIG_EXTCON=y
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CONFIG_F2FS_FS=y
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CONFIG_FEC=y
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CONFIG_FIXED_PHY=y
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CONFIG_FIX_EARLYCON_MEM=y
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# CONFIG_FSL_DPAA2_SWITCH is not set
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CONFIG_FSL_GUTS=y
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CONFIG_FS_ENCRYPTION=y
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CONFIG_FS_ENCRYPTION_ALGS=y
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CONFIG_FS_IOMAP=y
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CONFIG_FS_MBCACHE=y
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CONFIG_FS_POSIX_ACL=y
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CONFIG_FWNODE_MDIO=y
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CONFIG_FW_LOADER_PAGED_BUF=y
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CONFIG_FW_LOADER_SYSFS=y
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CONFIG_GCC11_NO_ARRAY_BOUNDS=y
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_GENERIC_ARCH_TOPOLOGY=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
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CONFIG_GENERIC_CPU_AUTOPROBE=y
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CONFIG_GENERIC_CPU_VULNERABILITIES=y
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CONFIG_GENERIC_EARLY_IOREMAP=y
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CONFIG_GENERIC_GETTIMEOFDAY=y
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CONFIG_GENERIC_IDLE_POLL_SETUP=y
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CONFIG_GENERIC_IRQ_CHIP=y
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CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
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CONFIG_GENERIC_MSI_IRQ=y
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CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_PINCONF=y
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CONFIG_GENERIC_PINCTRL_GROUPS=y
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CONFIG_GENERIC_PINMUX_FUNCTIONS=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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CONFIG_GENERIC_TIME_VSYSCALL=y
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CONFIG_GENERIC_VDSO_32=y
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# CONFIG_GIANFAR is not set
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CONFIG_GLOB=y
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CONFIG_GPIOLIB_IRQCHIP=y
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CONFIG_GPIO_CDEV=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_GPIO_MXC=y
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CONFIG_GPIO_VF610=y
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CONFIG_GRO_CELLS=y
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CONFIG_HARDEN_BRANCH_PREDICTOR=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT_MAP=y
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CONFIG_HAVE_SMP=y
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CONFIG_HWMON=y
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CONFIG_HW_RANDOM=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_IMX=y
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# CONFIG_I2C_IMX_LPI2C is not set
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CONFIG_I2C_SLAVE=y
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# CONFIG_I2C_SLAVE_TESTUNIT is not set
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CONFIG_IMX2_WDT=y
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# CONFIG_IMX7ULP_WDT is not set
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# CONFIG_IMX8MM_THERMAL is not set
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CONFIG_IMX_DMA=y
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# CONFIG_IMX_GPCV2_PM_DOMAINS is not set
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CONFIG_IMX_INTMUX=y
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CONFIG_IMX_IRQSTEER=y
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CONFIG_IMX_MU_MSI=m
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CONFIG_IMX_SDMA=y
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CONFIG_IMX_THERMAL=y
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# CONFIG_IMX_WEIM is not set
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQCHIP=y
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CONFIG_IRQSTACKS=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_DOMAIN_HIERARCHY=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_JBD2=y
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# CONFIG_JFFS2_FS is not set
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CONFIG_KEYS=y
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CONFIG_LIBFDT=y
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CONFIG_LOCK_DEBUGGING_SUPPORT=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_DEVRES=y
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CONFIG_MEMFD_CREATE=y
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CONFIG_MFD_SYSCON=y
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MIGRATION=y
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CONFIG_MMC=y
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CONFIG_MMC_BLOCK=y
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CONFIG_MMC_CQHCI=y
|
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# CONFIG_MMC_MXC is not set
|
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CONFIG_MMC_SDHCI=y
|
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CONFIG_MMC_SDHCI_ESDHC_IMX=y
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CONFIG_MMC_SDHCI_IO_ACCESSORS=y
|
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CONFIG_MMC_SDHCI_OF_ESDHC=y
|
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CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
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||||
CONFIG_MPILIB=y
|
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CONFIG_MTD_NAND_CORE=y
|
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CONFIG_MTD_NAND_ECC=y
|
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CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
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CONFIG_MTD_NAND_GPMI_NAND=y
|
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CONFIG_MTD_RAW_NAND=y
|
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CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
# CONFIG_MX3_IPU is not set
|
||||
CONFIG_MXC_CLK=y
|
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CONFIG_MXS_DMA=y
|
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CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_TAG_DSA=y
|
||||
CONFIG_NET_DSA_TAG_DSA_COMMON=y
|
||||
CONFIG_NET_DSA_TAG_EDSA=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_PTP_CLASSIFY=y
|
||||
CONFIG_NET_SELFTESTS=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
# CONFIG_NVMEM_IMX_IIM is not set
|
||||
CONFIG_NVMEM_IMX_OCOTP=y
|
||||
# CONFIG_NVMEM_IMX_OCOTP_ELE is not set
|
||||
CONFIG_NVMEM_LAYOUTS=y
|
||||
# CONFIG_NVMEM_SNVS_LPGPR is not set
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_OUTER_CACHE=y
|
||||
CONFIG_OUTER_CACHE_SYNC=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0x80000000
|
||||
CONFIG_PAGE_POOL=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_IMX8ULP is not set
|
||||
# CONFIG_PINCTRL_IMX93 is not set
|
||||
# CONFIG_PINCTRL_IMXRT1050 is not set
|
||||
# CONFIG_PINCTRL_IMXRT1170 is not set
|
||||
CONFIG_PL310_ERRATA_769419=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_PPS=y
|
||||
CONFIG_PREEMPT_NONE_BUILD=y
|
||||
CONFIG_PTP_1588_CLOCK=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_PWM=y
|
||||
# CONFIG_PWM_IMX1 is not set
|
||||
CONFIG_PWM_IMX27=y
|
||||
# CONFIG_PWM_IMX_TPM is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RANDSTRUCT_NONE=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_GZIP=y
|
||||
CONFIG_RD_LZO=y
|
||||
CONFIG_RD_XZ=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_ANATOP=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_PFUZE100=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_IMXDI is not set
|
||||
# CONFIG_RTC_DRV_MXC is not set
|
||||
# CONFIG_RTC_DRV_MXC_V2 is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_SCHED_THERMAL_PRESSURE=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_COMMON=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_IMX=y
|
||||
CONFIG_SERIAL_IMX_CONSOLE=y
|
||||
CONFIG_SERIAL_IMX_EARLYCON=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SOC_BUS=y
|
||||
# CONFIG_SOC_IMX50 is not set
|
||||
# CONFIG_SOC_IMX51 is not set
|
||||
# CONFIG_SOC_IMX53 is not set
|
||||
# CONFIG_SOC_IMX6Q is not set
|
||||
# CONFIG_SOC_IMX6SL is not set
|
||||
# CONFIG_SOC_IMX6SLL is not set
|
||||
# CONFIG_SOC_IMX6SX is not set
|
||||
# CONFIG_SOC_IMX6UL is not set
|
||||
# CONFIG_SOC_IMX7D is not set
|
||||
# CONFIG_SOC_IMX7ULP is not set
|
||||
# CONFIG_SOC_IMX8M is not set
|
||||
# CONFIG_SOC_IMX9 is not set
|
||||
# CONFIG_SOC_LS1021A is not set
|
||||
# CONFIG_SOC_VF610 is not set
|
||||
CONFIG_SOFTIRQ_ON_OWN_STACK=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
# CONFIG_SPI_FSL_LPSPI is not set
|
||||
# CONFIG_SPI_FSL_QUADSPI is not set
|
||||
CONFIG_SPI_IMX=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SRAM=y
|
||||
CONFIG_SRAM_EXEC=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STMP_DEVICE=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UCLAMP_TASK is not set
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_CHIPIDEA_IMX=y
|
||||
CONFIG_USB_CHIPIDEA_UDC=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_USB_OTG=y
|
||||
CONFIG_USB_PHY=y
|
||||
CONFIG_USB_ROLE_SWITCH=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ULPI_BUS=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VMSPLIT_2G=y
|
||||
# CONFIG_VMSPLIT_3G is not set
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_ARMTHUMB=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMMON=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
@ -10,9 +10,7 @@ define Device/Default
|
||||
KERNEL_NAME := zImage
|
||||
KERNEL := kernel-bin | uImage none
|
||||
KERNEL_LOADADDR := 0x80008000
|
||||
ifdef CONFIG_LINUX_6_6
|
||||
DTS_DIR := $(DTS_DIR)/nxp/imx
|
||||
endif
|
||||
IMAGES :=
|
||||
endef
|
||||
|
||||
|
||||
@ -84,9 +84,7 @@ define Device/Default
|
||||
KERNEL_NAME := zImage
|
||||
KERNEL := kernel-bin | uImage none
|
||||
KERNEL_LOADADDR := 0x10008000
|
||||
ifdef CONFIG_LINUX_6_6
|
||||
DTS_DIR := $(DTS_DIR)/nxp/imx
|
||||
endif
|
||||
IMAGES :=
|
||||
endef
|
||||
|
||||
|
||||
@ -1,49 +0,0 @@
|
||||
From ffcbb4ccd357eeb649036e379a34bf5fb8d4f47c Mon Sep 17 00:00:00 2001
|
||||
From: Richard Zhu <hongxing.zhu@nxp.com>
|
||||
Date: Thu, 13 Oct 2022 09:47:00 +0800
|
||||
Subject: [PATCH 1/3] phy: freescale: imx8m-pcie: Refine register definitions
|
||||
|
||||
No function changes, refine PHY register definitions.
|
||||
- Keep align with other CMN PHY registers, refine the definitions of
|
||||
PHY_CMN_REG75.
|
||||
- Remove two BIT definitions that are not used at all.
|
||||
|
||||
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
|
||||
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
|
||||
Tested-by: Marek Vasut <marex@denx.de>
|
||||
Tested-by: Richard Leitner <richard.leitner@skidata.com>
|
||||
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
|
||||
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
|
||||
---
|
||||
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 11 ++++-------
|
||||
1 file changed, 4 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
|
||||
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
|
||||
@@ -32,12 +32,10 @@
|
||||
#define IMX8MM_PCIE_PHY_CMN_REG065 0x194
|
||||
#define ANA_AUX_RX_TERM (BIT(7) | BIT(4))
|
||||
#define ANA_AUX_TX_LVL GENMASK(3, 0)
|
||||
-#define IMX8MM_PCIE_PHY_CMN_REG75 0x1D4
|
||||
-#define PCIE_PHY_CMN_REG75_PLL_DONE 0x3
|
||||
+#define IMX8MM_PCIE_PHY_CMN_REG075 0x1D4
|
||||
+#define ANA_PLL_DONE 0x3
|
||||
#define PCIE_PHY_TRSV_REG5 0x414
|
||||
-#define PCIE_PHY_TRSV_REG5_GEN1_DEEMP 0x2D
|
||||
#define PCIE_PHY_TRSV_REG6 0x418
|
||||
-#define PCIE_PHY_TRSV_REG6_GEN2_DEEMP 0xF
|
||||
|
||||
#define IMX8MM_GPR_PCIE_REF_CLK_SEL GENMASK(25, 24)
|
||||
#define IMX8MM_GPR_PCIE_REF_CLK_PLL FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3)
|
||||
@@ -152,9 +150,8 @@ static int imx8_pcie_phy_power_on(struct
|
||||
}
|
||||
|
||||
/* Polling to check the phy is ready or not. */
|
||||
- ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG75,
|
||||
- val, val == PCIE_PHY_CMN_REG75_PLL_DONE,
|
||||
- 10, 20000);
|
||||
+ ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075,
|
||||
+ val, val == ANA_PLL_DONE, 10, 20000);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1,99 +0,0 @@
|
||||
From bf03b9281b119bcdc167b2dd6ac98294587eb5ff Mon Sep 17 00:00:00 2001
|
||||
From: Richard Zhu <hongxing.zhu@nxp.com>
|
||||
Date: Thu, 13 Oct 2022 09:47:02 +0800
|
||||
Subject: [PATCH 3/3] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
|
||||
|
||||
Add i.MX8MP PCIe PHY support.
|
||||
|
||||
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
|
||||
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
|
||||
Tested-by: Marek Vasut <marex@denx.de>
|
||||
Tested-by: Richard Leitner <richard.leitner@skidata.com>
|
||||
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
|
||||
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
|
||||
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
|
||||
---
|
||||
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 25 ++++++++++++++++++++--
|
||||
1 file changed, 23 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
|
||||
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
|
||||
@@ -48,6 +48,7 @@
|
||||
|
||||
enum imx8_pcie_phy_type {
|
||||
IMX8MM,
|
||||
+ IMX8MP,
|
||||
};
|
||||
|
||||
struct imx8_pcie_phy_drvdata {
|
||||
@@ -60,6 +61,7 @@ struct imx8_pcie_phy {
|
||||
struct clk *clk;
|
||||
struct phy *phy;
|
||||
struct regmap *iomuxc_gpr;
|
||||
+ struct reset_control *perst;
|
||||
struct reset_control *reset;
|
||||
u32 refclk_pad_mode;
|
||||
u32 tx_deemph_gen1;
|
||||
@@ -74,11 +76,11 @@ static int imx8_pcie_phy_power_on(struct
|
||||
u32 val, pad_mode;
|
||||
struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
|
||||
|
||||
- reset_control_assert(imx8_phy->reset);
|
||||
-
|
||||
pad_mode = imx8_phy->refclk_pad_mode;
|
||||
switch (imx8_phy->drvdata->variant) {
|
||||
case IMX8MM:
|
||||
+ reset_control_assert(imx8_phy->reset);
|
||||
+
|
||||
/* Tune PHY de-emphasis setting to pass PCIe compliance. */
|
||||
if (imx8_phy->tx_deemph_gen1)
|
||||
writel(imx8_phy->tx_deemph_gen1,
|
||||
@@ -87,6 +89,8 @@ static int imx8_pcie_phy_power_on(struct
|
||||
writel(imx8_phy->tx_deemph_gen2,
|
||||
imx8_phy->base + PCIE_PHY_TRSV_REG6);
|
||||
break;
|
||||
+ case IMX8MP: /* Do nothing. */
|
||||
+ break;
|
||||
}
|
||||
|
||||
if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
|
||||
@@ -143,6 +147,9 @@ static int imx8_pcie_phy_power_on(struct
|
||||
IMX8MM_GPR_PCIE_CMN_RST);
|
||||
|
||||
switch (imx8_phy->drvdata->variant) {
|
||||
+ case IMX8MP:
|
||||
+ reset_control_deassert(imx8_phy->perst);
|
||||
+ fallthrough;
|
||||
case IMX8MM:
|
||||
reset_control_deassert(imx8_phy->reset);
|
||||
usleep_range(200, 500);
|
||||
@@ -183,8 +190,14 @@ static const struct imx8_pcie_phy_drvdat
|
||||
.variant = IMX8MM,
|
||||
};
|
||||
|
||||
+static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
|
||||
+ .gpr = "fsl,imx8mp-iomuxc-gpr",
|
||||
+ .variant = IMX8MP,
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id imx8_pcie_phy_of_match[] = {
|
||||
{.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
|
||||
+ {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
|
||||
@@ -240,6 +253,14 @@ static int imx8_pcie_phy_probe(struct pl
|
||||
return PTR_ERR(imx8_phy->reset);
|
||||
}
|
||||
|
||||
+ if (imx8_phy->drvdata->variant == IMX8MP) {
|
||||
+ imx8_phy->perst =
|
||||
+ devm_reset_control_get_exclusive(dev, "perst");
|
||||
+ if (IS_ERR(imx8_phy->perst))
|
||||
+ dev_err_probe(dev, PTR_ERR(imx8_phy->perst),
|
||||
+ "Failed to get PCIE PHY PERST control\n");
|
||||
+ }
|
||||
+
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
imx8_phy->base = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(imx8_phy->base))
|
||||
@ -1,11 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/imx6dl-wandboard.dts
|
||||
+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts
|
||||
@@ -16,4 +16,8 @@
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
+
|
||||
+ chosen {
|
||||
+ bootargs = "console=ttymxc0,115200";
|
||||
+ };
|
||||
};
|
||||
@ -1,96 +0,0 @@
|
||||
From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
|
||||
Date: Tue, 3 Mar 2020 15:14:40 +0100
|
||||
Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Signed-off-by: Petr Štetiar <ynezz@true.cz>
|
||||
---
|
||||
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------
|
||||
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 12 ++++++++----
|
||||
2 files changed, 18 insertions(+), 10 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
|
||||
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
|
||||
@@ -24,6 +24,10 @@
|
||||
i2c2 = &i2c2;
|
||||
rtc0 = &rtc_i2c;
|
||||
rtc1 = &snvs_rtc;
|
||||
+ led-boot = &led_boot;
|
||||
+ led-failsafe = &led_failsafe;
|
||||
+ led-running = &led_running;
|
||||
+ led-upgrade = &led_upgrade;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -35,22 +39,22 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_leds_ixora>;
|
||||
|
||||
- led4-green {
|
||||
+ led_running: led4-green {
|
||||
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_4_GREEN";
|
||||
};
|
||||
|
||||
- led4-red {
|
||||
+ led_upgrade: led4-red {
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_4_RED";
|
||||
};
|
||||
|
||||
- led5-green {
|
||||
+ led_boot: led5-green {
|
||||
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_5_GREEN";
|
||||
};
|
||||
|
||||
- led5-red {
|
||||
+ led_failsafe: led5-red {
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_5_RED";
|
||||
};
|
||||
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
|
||||
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
|
||||
@@ -24,6 +24,10 @@
|
||||
i2c2 = &i2c2;
|
||||
rtc0 = &rtc_i2c;
|
||||
rtc1 = &snvs_rtc;
|
||||
+ led-boot = &led_boot;
|
||||
+ led-failsafe = &led_failsafe;
|
||||
+ led-running = &led_running;
|
||||
+ led-upgrade = &led_upgrade;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -36,22 +40,22 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_leds_ixora>;
|
||||
|
||||
- led4-green {
|
||||
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
||||
+ led_running: led4-green {
|
||||
+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_4_GREEN";
|
||||
};
|
||||
|
||||
- led4-red {
|
||||
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
+ led_upgrade: led4-red {
|
||||
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_4_RED";
|
||||
};
|
||||
|
||||
- led5-green {
|
||||
+ led_boot: led5-green {
|
||||
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_5_GREEN";
|
||||
};
|
||||
|
||||
- led5-red {
|
||||
+ led_failsafe: led5-red {
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED_5_RED";
|
||||
};
|
||||
@ -1,78 +0,0 @@
|
||||
From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
|
||||
Date: Tue, 3 Mar 2020 15:15:57 +0100
|
||||
Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Signed-off-by: Petr Štetiar <ynezz@true.cz>
|
||||
---
|
||||
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++-
|
||||
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 ++++++++++++++-
|
||||
2 files changed, 28 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
|
||||
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
|
||||
@@ -59,6 +59,17 @@
|
||||
label = "LED_5_RED";
|
||||
};
|
||||
};
|
||||
+
|
||||
+ gpio-keys {
|
||||
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
|
||||
+
|
||||
+ reset {
|
||||
+ label = "reset";
|
||||
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ debounce-interval = <10>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&can1 {
|
||||
@@ -181,4 +192,10 @@
|
||||
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
||||
>;
|
||||
};
|
||||
+
|
||||
+ pinctrl_switch3_ixora: switch3ixora {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
};
|
||||
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
|
||||
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
|
||||
@@ -61,6 +61,17 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ gpio-keys {
|
||||
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
|
||||
+
|
||||
+ reset {
|
||||
+ label = "reset";
|
||||
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ debounce-interval = <10>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
reg_3v3_vmmc: regulator-3v3-vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
@@ -262,6 +273,12 @@
|
||||
>;
|
||||
};
|
||||
|
||||
+ pinctrl_switch3_ixora: switch3ixora {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
pinctrl_mmc_cd_sleep: mmccdslpgrp {
|
||||
fsl,pins = <
|
||||
/* MMC1 CD */
|
||||
@ -1,24 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/imx7d-pico-pi.dts
|
||||
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
|
||||
@@ -8,12 +8,20 @@
|
||||
model = "TechNexion PICO-IMX7D Board and PI baseboard";
|
||||
compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
|
||||
|
||||
+ aliases {
|
||||
+ led-boot = &led_system;
|
||||
+ led-failsafe = &led_system;
|
||||
+ led-running = &led_system;
|
||||
+ led-upgrade = &led_system;
|
||||
+ label-mac-device = &fec1;
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
- led {
|
||||
+ led_system: led {
|
||||
label = "gpio-led";
|
||||
gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
@ -1,23 +0,0 @@
|
||||
From 6e8e5ccfbee7a531b035ffce3f95f3901946fa9d Mon Sep 17 00:00:00 2001
|
||||
From: Robert Nelson <robertcnelson@gmail.com>
|
||||
Date: Wed, 9 Jan 2019 14:33:24 -0600
|
||||
Subject: [PATCH] ARM: imx7d-pico-pi.dts: add default stdout-path
|
||||
|
||||
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
|
||||
---
|
||||
arch/arm/boot/dts/imx7d-pico-pi.dts | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/imx7d-pico-pi.dts
|
||||
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
|
||||
@@ -16,6 +16,10 @@
|
||||
label-mac-device = &fec1;
|
||||
};
|
||||
|
||||
+ chosen {
|
||||
+ stdout-path = "serial4:115200n8";
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
Loading…
x
Reference in New Issue
Block a user