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Apply patch 240-irq_fix.patch directly
SVN-Revision: 19457
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@ -177,12 +177,11 @@ void __init arch_init_irq(void)
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setup_irq(i, &cascade);
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}
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for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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set_irq_chip(i, &amazon_irq_type);
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}
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for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
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set_irq_chip_and_handler(i, &amazon_irq_type,
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handle_level_irq);
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set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
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}
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void __cpuinit arch_fixup_c0_irqs(void)
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@ -1,20 +0,0 @@
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--- a/arch/mips/amazon/interrupt.c
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+++ b/arch/mips/amazon/interrupt.c
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@@ -177,12 +177,11 @@ void __init arch_init_irq(void)
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setup_irq(i, &cascade);
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}
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- for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
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- irq_desc[i].status = IRQ_DISABLED;
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- irq_desc[i].action = 0;
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- irq_desc[i].depth = 1;
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- set_irq_chip(i, &amazon_irq_type);
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- }
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+ for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
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+ set_irq_chip_and_handler(i, &amazon_irq_type,
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+ handle_level_irq);
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+
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+ set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
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}
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void __cpuinit arch_fixup_c0_irqs(void)
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