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remove invalid GPIO definitions for the RB153
SVN-Revision: 9789
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parent
12295e7c0d
commit
418b0361ea
@ -61,9 +61,6 @@
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#define RB150_NAND_WRITE(v) \
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writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
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#define RB153_GPIO_CF_RDY ADM5120_GPIO_P1L1
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#define RB153_GPIO_CF_WT ADM5120_GPIO_P0L0
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/*--------------------------------------------------------------------------*/
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static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
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@ -242,20 +239,6 @@ static void __init rb1xx_flash_setup(void)
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adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
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}
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static void __init rb153_cf_setup(void)
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{
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/* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
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adm5120_gpio_csx1_enable();
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/* enable the wait state pin GPIO[0] for external I/O control */
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adm5120_gpio_ew_enable();
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gpio_request(RB153_GPIO_CF_RDY, "cf-ready");
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gpio_direction_input(RB153_GPIO_CF_RDY);
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gpio_request(RB153_GPIO_CF_WT, "cf-wait");
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gpio_direction_output(RB153_GPIO_CF_WT, 1);
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gpio_direction_input(RB153_GPIO_CF_WT);
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}
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static void __init rb1xx_setup(void)
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{
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/* enable NAND flash interface */
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@ -294,7 +277,11 @@ static void __init rb150_setup(void)
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static void __init rb153_setup(void)
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{
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rb153_cf_setup();
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/* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
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adm5120_gpio_csx1_enable();
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/* enable the wait state pin GPIO[0] for external I/O control */
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adm5120_gpio_ew_enable();
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rb1xx_setup();
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}
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