rtl93xx: fix condition intended to only select internal serdes ports

This condition was introduced in commit 51c8f76612 ("realtek: Improve
MAC config handling for all SoCs") to correctly report the speed of the
internal serdes ports as 10G, but instead makes all ports read 10G
because the or-operator should have been an and-operator.

Fixes: #9953
Fixes: 51c8f76612 ("realtek: Improve MAC config handling for all SoCs")
Signed-off-by: Peter Körner <git@mazdermind.de>
[ wrap comment to 72 column and improve commit ref ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 9fb5082e25)
This commit is contained in:
Peter Körner 2023-09-24 20:58:13 +02:00 committed by Christian Marangi
parent e92cf0c46f
commit 3fff625542
No known key found for this signature in database
GPG Key ID: AC001D09ADBFEAD7

View File

@ -559,7 +559,7 @@ static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
}
if (priv->family_id == RTL9310_FAMILY_ID
&& (port >= 52 || port <= 55)) { /* Internal serdes */
&& (port >= 52 && port <= 55)) { /* Internal serdes */
state->speed = SPEED_10000;
state->link = 1;
state->duplex = 1;