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I recently came across an ar7 device which has the vlynq hardwired so that the clocks are always generated by the remote device instead of the local one.
Upon initialization the current version of vlynq driver disables remote clock generation and causes the entire bus to hang on my device. This patch adds support for detecting which device (local or remote) is responsible of clock generation and implements clock initialization based on detection result. Signed-off-by: Antti Seppala <a.seppala at gmail.com> SVN-Revision: 16049
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@ -40,6 +40,8 @@
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#define VLYNQ_CTRL_INT2CFG 0x00000080
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#define VLYNQ_CTRL_RESET 0x00000001
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#define VLYNQ_CTRL_CLOCK_MASK (0x7 << 16)
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#define VLYNQ_INT_OFFSET 0x00000014
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#define VLYNQ_REMOTE_OFFSET 0x00000080
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@ -114,6 +116,24 @@ int vlynq_linked(struct vlynq_device *dev)
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return 0;
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}
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static void vlynq_reset(struct vlynq_device *dev)
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{
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vlynq_reg_write(dev->local->control,
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vlynq_reg_read(dev->local->control) |
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VLYNQ_CTRL_RESET);
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/* Wait for the devices to finish resetting */
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msleep(5);
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/* Remove reset bit */
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vlynq_reg_write(dev->local->control,
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vlynq_reg_read(dev->local->control) &
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~VLYNQ_CTRL_RESET);
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/* Give some time for the devices to settle */
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msleep(5);
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}
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static void vlynq_irq_unmask(unsigned int irq)
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{
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u32 val;
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@ -357,9 +377,100 @@ void vlynq_unregister_driver(struct vlynq_driver *driver)
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}
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EXPORT_SYMBOL(vlynq_unregister_driver);
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static int __vlynq_try_remote(struct vlynq_device *dev)
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{
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int i;
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vlynq_reset(dev);
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for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ?
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i <= vlynq_rdiv8 : i >= vlynq_rdiv2;
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dev->dev_id ? i++ : i--) {
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if (!vlynq_linked(dev))
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break;
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vlynq_reg_write(dev->remote->control,
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(vlynq_reg_read(dev->remote->control) &
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~VLYNQ_CTRL_CLOCK_MASK) |
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VLYNQ_CTRL_CLOCK_INT |
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VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1));
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vlynq_reg_write(dev->local->control,
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((vlynq_reg_read(dev->local->control)
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& ~(VLYNQ_CTRL_CLOCK_INT |
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VLYNQ_CTRL_CLOCK_MASK)) |
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VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1)));
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if (vlynq_linked(dev)) {
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printk(KERN_DEBUG
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"%s: using remote clock divisor %d\n",
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dev->dev.bus_id, i - vlynq_rdiv1 + 1);
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dev->divisor = i;
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return 0;
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} else {
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vlynq_reset(dev);
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}
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}
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return -ENODEV;
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}
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static int __vlynq_try_local(struct vlynq_device *dev)
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{
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int i;
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vlynq_reset(dev);
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for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ?
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i <= vlynq_ldiv8 : i >= vlynq_ldiv2;
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dev->dev_id ? i++ : i--) {
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vlynq_reg_write(dev->local->control,
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(vlynq_reg_read(dev->local->control) &
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~VLYNQ_CTRL_CLOCK_MASK) |
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VLYNQ_CTRL_CLOCK_INT |
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VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1));
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if (vlynq_linked(dev)) {
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printk(KERN_DEBUG
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"%s: using local clock divisor %d\n",
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dev->dev.bus_id, i - vlynq_ldiv1 + 1);
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dev->divisor = i;
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return 0;
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} else {
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vlynq_reset(dev);
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}
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}
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return -ENODEV;
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}
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static int __vlynq_try_external(struct vlynq_device *dev)
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{
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vlynq_reset(dev);
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if (!vlynq_linked(dev))
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return -ENODEV;
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vlynq_reg_write(dev->remote->control,
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(vlynq_reg_read(dev->remote->control) &
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~VLYNQ_CTRL_CLOCK_INT));
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vlynq_reg_write(dev->local->control,
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(vlynq_reg_read(dev->local->control) &
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~VLYNQ_CTRL_CLOCK_INT));
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if (vlynq_linked(dev)) {
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printk(KERN_DEBUG "%s: using external clock\n",
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dev->dev.bus_id);
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dev->divisor = vlynq_div_external;
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return 0;
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}
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return -ENODEV;
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}
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static int __vlynq_enable_device(struct vlynq_device *dev)
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{
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int i, result;
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int result;
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struct plat_vlynq_ops *ops = dev->dev.platform_data;
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result = ops->on(dev);
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@ -369,30 +480,23 @@ static int __vlynq_enable_device(struct vlynq_device *dev)
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switch (dev->divisor) {
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case vlynq_div_external:
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case vlynq_div_auto:
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vlynq_reg_write(dev->local->control, 0);
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vlynq_reg_write(dev->remote->control, 0);
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if (vlynq_linked(dev)) {
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dev->divisor = vlynq_div_external;
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printk(KERN_DEBUG "%s: using external clock\n",
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dev->dev.bus_id);
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return 0;
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}
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/* Only try locally supplied clock, others cause problems */
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for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ?
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i <= vlynq_ldiv8 : i >= vlynq_ldiv2;
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dev->dev_id ? i++ : i--) {
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vlynq_reg_write(dev->local->control,
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VLYNQ_CTRL_CLOCK_INT |
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VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1));
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if (vlynq_linked(dev)) {
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printk(KERN_DEBUG
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"%s: using local clock divisor %d\n",
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dev->dev.bus_id, i - vlynq_ldiv1 + 1);
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dev->divisor = i;
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/* When the device is brought from reset it should have clock
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generation negotiated by hardware.
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Check which device is generating clocks and perform setup
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accordingly */
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if (vlynq_linked(dev) && vlynq_reg_read(dev->remote->control) &
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VLYNQ_CTRL_CLOCK_INT) {
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if (!__vlynq_try_remote(dev) ||
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!__vlynq_try_local(dev) ||
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!__vlynq_try_external(dev))
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return 0;
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} else {
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if (!__vlynq_try_external(dev) ||
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!__vlynq_try_local(dev) ||
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!__vlynq_try_remote(dev))
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return 0;
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}
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}
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break;
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case vlynq_ldiv1: case vlynq_ldiv2: case vlynq_ldiv3: case vlynq_ldiv4:
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case vlynq_ldiv5: case vlynq_ldiv6: case vlynq_ldiv7: case vlynq_ldiv8:
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vlynq_reg_write(dev->local->control,
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