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ipq40xx: fix hw-crypto detection of qce driver
This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine driver algorithms, so that openssl devcrypto can recognize them as hardware-accelerated. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [refresh, move to ipq40xx as its the only target right now] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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@ -0,0 +1,31 @@
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From: Eneas U de Queiroz <cotequeiroz@gmail.com>
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Subject: [PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag
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Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
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the qce driver, since they are all hardware accelerated, accessible
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through a kernel driver only, and not available directly to userspace.
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Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
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--- a/drivers/crypto/qce/ablkcipher.c
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+++ b/drivers/crypto/qce/ablkcipher.c
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@@ -373,7 +373,7 @@ static int qce_ablkcipher_register_one(c
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alg->cra_priority = 300;
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alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
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- CRYPTO_ALG_NEED_FALLBACK;
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+ CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
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alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
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alg->cra_alignmask = 0;
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alg->cra_type = &crypto_ablkcipher_type;
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--- a/drivers/crypto/qce/sha.c
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+++ b/drivers/crypto/qce/sha.c
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@@ -526,7 +526,7 @@ static int qce_ahash_register_one(const
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base = &alg->halg.base;
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base->cra_blocksize = def->blocksize;
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base->cra_priority = 300;
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- base->cra_flags = CRYPTO_ALG_ASYNC;
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+ base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
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base->cra_ctxsize = sizeof(struct qce_sha_ctx);
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base->cra_alignmask = 0;
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base->cra_module = THIS_MODULE;
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@ -0,0 +1,31 @@
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From: Eneas U de Queiroz <cotequeiroz@gmail.com>
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Subject: [PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag
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Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
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the qce driver, since they are all hardware accelerated, accessible
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through a kernel driver only, and not available directly to userspace.
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Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
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--- a/drivers/crypto/qce/ablkcipher.c
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+++ b/drivers/crypto/qce/ablkcipher.c
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@@ -370,7 +370,7 @@ static int qce_ablkcipher_register_one(c
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alg->cra_priority = 300;
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alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
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- CRYPTO_ALG_NEED_FALLBACK;
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+ CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
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alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
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alg->cra_alignmask = 0;
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alg->cra_type = &crypto_ablkcipher_type;
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--- a/drivers/crypto/qce/sha.c
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+++ b/drivers/crypto/qce/sha.c
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@@ -503,7 +503,7 @@ static int qce_ahash_register_one(const
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base = &alg->halg.base;
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base->cra_blocksize = def->blocksize;
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base->cra_priority = 300;
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- base->cra_flags = CRYPTO_ALG_ASYNC;
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+ base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
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base->cra_ctxsize = sizeof(struct qce_sha_ctx);
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base->cra_alignmask = 0;
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base->cra_module = THIS_MODULE;
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