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imx6: add support for GW5907/GW5910/GW5912/GW5913
This patch adds support for GW5907/GW5910/GW5912/GW5913 IMX6 based boards from the Gateworks Ventana Family[A]: - backport upstream dt patches from 5.6 to 4.19 and 5.4 - add dtb's to ventana images - add board-name and network config A. https://www.gateworks.com/products/imx6-single-board-computer-gateworks-ventana-family Flashing instructions for Ventana boards: Using pre-flashed bootloader: - Use appropriate ubi image depending on board NAND to flash via bootloader: openwrt-imx6-ventana-squashfs-nand.ubi - 2KiB page size openwrt-imx6-ventana-large-squashfs-nand.ubi - 4KiB page size http://trac.gateworks.com/wiki/linux/ubi Using Gateworks JTAG dongle: - Use Gateworks mkimage_jtag script to create a JTAG image comprised of pre-built bootloader and ubi image: http://trac.gateworks.com/wiki/jtag_instructions Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Tim Harvey
Petr Štetiar
parent
86b59d0709
commit
3666c67a54
@ -13,7 +13,11 @@ case "$board" in
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cubox-i |\
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gw51xx |\
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gw52xx |\
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gw5904)
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gw5904 |\
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gw5907 |\
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gw5910 |\
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gw5912 |\
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gw5913)
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ucidef_set_interface_lan 'eth0'
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;;
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gw53xx |\
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@ -81,6 +81,26 @@ imx6_board_detect() {
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name="gw5904"
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;;
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"Gateworks Ventana i.MX6 DualLite/Solo GW5907" |\
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"Gateworks Ventana i.MX6 Dual/Quad GW5907")
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name="gw5907"
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;;
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"Gateworks Ventana i.MX6 DualLite/Solo GW5910" |\
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"Gateworks Ventana i.MX6 Dual/Quad GW5910")
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name="gw5910"
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;;
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"Gateworks Ventana i.MX6 DualLite/Solo GW5912" |\
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"Gateworks Ventana i.MX6 Dual/Quad GW5912")
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name="gw5912"
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;;
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"Gateworks Ventana i.MX6 DualLite/Solo GW5913" |\
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"Gateworks Ventana i.MX6 Dual/Quad GW5913")
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name="gw5913"
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;;
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"SolidRun Cubox-i Solo/DualLite" |\
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"SolidRun Cubox-i Dual/Quad")
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name="cubox-i"
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@ -143,6 +143,10 @@ define Device/ventana
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imx6dl-gw552x \
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imx6dl-gw553x \
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imx6dl-gw5904 \
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imx6dl-gw5907 \
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imx6dl-gw5910 \
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imx6dl-gw5912 \
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imx6dl-gw5913 \
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imx6q-gw51xx \
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imx6q-gw52xx \
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imx6q-gw53xx \
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@ -151,7 +155,11 @@ define Device/ventana
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imx6q-gw551x \
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imx6q-gw552x \
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imx6q-gw553x \
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imx6q-gw5904
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imx6q-gw5904 \
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imx6q-gw5907 \
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imx6q-gw5910 \
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imx6q-gw5912 \
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imx6q-gw5913
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DEVICE_PACKAGES := kmod-sky2 kmod-sound-core kmod-sound-soc-imx kmod-sound-soc-imx-sgtl5000 \
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kmod-can kmod-can-flexcan kmod-can-raw \
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kmod-hwmon-gsc \
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@ -0,0 +1,496 @@
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From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001
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From: Robert Jones <rjones@gateworks.com>
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Date: Wed, 8 Jan 2020 07:44:21 -0800
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Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support
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The Gateworks GW5907 is an IMX6 SoC based single board computer with:
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- IMX6Q or IMX6DL
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- 32bit DDR3 DRAM
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- FEC GbE Phy
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- bi-color front-panel LED
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- 256MB NAND boot device
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- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
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- Digital IO expander (pca9555)
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- Joystick 12bit adc (ads1015)
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Signed-off-by: Robert Jones <rjones@gateworks.com>
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Reviewed-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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---
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arch/arm/boot/dts/Makefile | 2 +
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arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++
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arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++
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arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++
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4 files changed, 429 insertions(+)
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create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts
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create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
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index 1e9e1af..9ee80e2 100644
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -422,6 +422,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
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imx6dl-gw560x.dtb \
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imx6dl-gw5903.dtb \
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imx6dl-gw5904.dtb \
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+ imx6dl-gw5907.dtb \
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imx6dl-hummingboard.dtb \
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imx6dl-hummingboard-emmc-som-v15.dtb \
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imx6dl-hummingboard-som-v15.dtb \
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@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
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imx6q-gw560x.dtb \
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imx6q-gw5903.dtb \
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imx6q-gw5904.dtb \
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+ imx6q-gw5907.dtb \
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imx6q-h100.dtb \
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imx6q-hummingboard.dtb \
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imx6q-hummingboard-emmc-som-v15.dtb \
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diff --git a/arch/arm/boot/dts/imx6dl-gw5907.dts b/arch/arm/boot/dts/imx6dl-gw5907.dts
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new file mode 100644
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index 00000000..3fa2822
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw5907.dts
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@@ -0,0 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright 2019 Gateworks Corporation
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+ */
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+
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+/dts-v1/;
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+
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw5907.dtsi"
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+
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+/ {
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+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907";
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+ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl";
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+};
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diff --git a/arch/arm/boot/dts/imx6q-gw5907.dts b/arch/arm/boot/dts/imx6q-gw5907.dts
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new file mode 100644
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index 00000000..b25526e
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-gw5907.dts
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@@ -0,0 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright 2019 Gateworks Corporation
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+ */
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+
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+/dts-v1/;
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+
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+#include "imx6q.dtsi"
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+#include "imx6qdl-gw5907.dtsi"
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+
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+/ {
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+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907";
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+ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q";
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+};
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diff --git a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
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new file mode 100644
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index 00000000..0bdebdd
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
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@@ -0,0 +1,399 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright 2019 Gateworks Corporation
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+ */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ /* these are used by bootloader for disabling nodes */
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+ aliases {
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+ led0 = &led0;
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+ led1 = &led1;
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+ nand = &gpmi;
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+ usb0 = &usbh1;
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+ usb1 = &usbotg;
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+ };
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+
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+ chosen {
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+ stdout-path = &uart2;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_gpio_leds>;
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+
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+ led0: user1 {
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+ label = "user1";
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+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
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+ default-state = "on";
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+ linux,default-trigger = "heartbeat";
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+ };
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+
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+ led1: user2 {
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+ label = "user2";
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+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
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+ default-state = "off";
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+ };
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+ };
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+
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+ memory@10000000 {
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+ device_type = "memory";
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+ reg = <0x10000000 0x20000000>;
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+ };
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+
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+ pps {
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+ compatible = "pps-gpio";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pps>;
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+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+ };
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+
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+ reg_3p3v: regulator-3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "3P3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_5p0v: regulator-5p0v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "5P0V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_usb_otg_vbus: regulator-usb-otg-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb_otg_vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+};
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+
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+&fec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_enet>;
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+ phy-mode = "rgmii-id";
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+ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+&gpmi {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_gpmi_nand>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ ddc-i2c-bus = <&i2c3>;
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c1>;
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+ status = "okay";
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+
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+ gpio@23 {
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+ compatible = "nxp,pca9555";
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+ reg = <0x23>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+
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+ eeprom@50 {
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+ compatible = "atmel,24c02";
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+ reg = <0x50>;
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+ pagesize = <16>;
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+ };
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+
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+ eeprom@51 {
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+ compatible = "atmel,24c02";
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+ reg = <0x51>;
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+ pagesize = <16>;
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+ };
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+
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+ eeprom@52 {
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+ compatible = "atmel,24c02";
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+ reg = <0x52>;
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+ pagesize = <16>;
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+ };
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+
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+ eeprom@53 {
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+ compatible = "atmel,24c02";
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+ reg = <0x53>;
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+ pagesize = <16>;
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+ };
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+
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+ rtc@68 {
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+ compatible = "dallas,ds1672";
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+ reg = <0x68>;
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+ };
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+};
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+
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+&i2c2 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c2>;
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+ status = "okay";
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+};
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+
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+&i2c3 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c3>;
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+ status = "okay";
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+
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+ gpio@20 {
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+ compatible = "nxp,pca9555";
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+ reg = <0x20>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+
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+ adc@48 {
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+ compatible = "ti,ads1015";
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+ reg = <0x48>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ channel@4 {
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+ reg = <4>;
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+ ti,gain = <0>;
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+ ti,datarate = <5>;
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+ };
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+
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+ channel@5 {
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+ reg = <5>;
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+ ti,gain = <0>;
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+ ti,datarate = <5>;
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+ };
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+
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+ channel@6 {
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+ reg = <6>;
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+ ti,gain = <0>;
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+ ti,datarate = <5>;
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+ };
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+ };
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+};
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+
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+&pcie {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pcie>;
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+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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+&pwm4 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
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+ status = "disabled";
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+};
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+
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart1>;
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+ status = "okay";
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+};
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+
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+&uart2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart2>;
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+ status = "okay";
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+};
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+
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+&uart3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart3>;
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+ status = "okay";
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+};
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+
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+&uart5 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart5>;
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+ status = "okay";
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+};
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+
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+&usbotg {
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+ vbus-supply = <®_usb_otg_vbus>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_usbotg>;
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+ disable-over-current;
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+ status = "okay";
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+};
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+
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+&usbh1 {
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+ status = "okay";
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+};
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+
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+&wdog1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_wdog>;
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+ fsl,ext-reset-output;
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+};
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+
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+&iomuxc {
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+ pinctrl_enet: enetgrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
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+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
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+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart3: uart3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,597 @@
|
||||
From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001
|
||||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:22 -0800
|
||||
Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support
|
||||
|
||||
The Gateworks GW5910 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- FEC GbE RJ45 front-panel
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
|
||||
- 5V to 60V DC input barrel jack
|
||||
- 3axis accelerometer (lis2de12)
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- microSD socket (with UHS-I support)
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
- Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6)
|
||||
- WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6)
|
||||
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
|
||||
- off-board SPI connector (1x chip-select)
|
||||
|
||||
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5910.dts | 14 +
|
||||
arch/arm/boot/dts/imx6q-gw5910.dts | 14 +
|
||||
arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 521 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 9ee80e2..85e53cc 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -423,6 +423,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5903.dtb \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
+ imx6dl-gw5910.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
imx6dl-hummingboard-som-v15.dtb \
|
||||
@@ -495,6 +496,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5903.dtb \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
+ imx6q-gw5910.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-hummingboard-emmc-som-v15.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5910.dts b/arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
new file mode 100644
|
||||
index 00000000..0d5e7e5
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5910.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910";
|
||||
+ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5910.dts b/arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
new file mode 100644
|
||||
index 00000000..6aafa2f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5910.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910";
|
||||
+ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..be1af74
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
@@ -0,0 +1,491 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ led2 = &led2;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ led2: user3 {
|
||||
+ label = "user3";
|
||||
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5p0v: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "5P0V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_wl: regulator-wl {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "wl";
|
||||
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <100>;
|
||||
+ enable-active-high;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_bt: regulator-bt {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_reg_bt>;
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "bt";
|
||||
+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <100>;
|
||||
+ enable-active-high;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+
|
||||
+&ecspi3 {
|
||||
+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ accel@19 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_accel>;
|
||||
+ compatible = "st,lis2de12";
|
||||
+ reg = <0x19>;
|
||||
+ st,drdy-int-pin = <1>;
|
||||
+ interrupt-parent = <&gpio7>;
|
||||
+ interrupts = <13 0>;
|
||||
+ interrupt-names = "INT1";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+/* off-board RS232 */
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* serial console */
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* Sterling-LWB Bluetooth */
|
||||
+&uart4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart4>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* GPS */
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ vbus-supply = <®_5p0v>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* Sterling-LWB SDIO WiFi */
|
||||
+&usdhc2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ non-removable;
|
||||
+ bus-width = <4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usdhc3 {
|
||||
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_accel: accelmuxgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_ecspi3: escpi3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_reg_bt: regbtgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_reg_wl: regwlgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart4: uart4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc2: usdhc2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3: usdhc3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,449 @@
|
||||
From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Jones <rjones@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:23 -0800
|
||||
Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support
|
||||
|
||||
The Gateworks GW5913 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- FEC GbE RJ45 front-panel
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
|
||||
- 6V to 60V DC input connector
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- nanoSIM socket
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 378 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 85e53cc..5b059fc 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -424,6 +424,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
imx6dl-gw5910.dtb \
|
||||
+ imx6dl-gw5913.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
imx6dl-hummingboard-som-v15.dtb \
|
||||
@@ -497,6 +498,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
imx6q-gw5910.dtb \
|
||||
+ imx6q-gw5913.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-hummingboard-emmc-som-v15.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5913.dts b/arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
new file mode 100644
|
||||
index 00000000..b74e533
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5913.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913";
|
||||
+ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5913.dts b/arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
new file mode 100644
|
||||
index 00000000..6f511f1
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5913.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913";
|
||||
+ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5913.dtsi b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..635c203
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
@@ -0,0 +1,348 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ nand = &gpmi;
|
||||
+ usb0 = &usbh1;
|
||||
+ usb1 = &usbotg;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5p0v: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "5P0V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart3: uart3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,565 @@
|
||||
From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Jones <rjones@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:24 -0800
|
||||
Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support
|
||||
|
||||
The Gateworks GW5912 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- GbE RJ45 front-panel
|
||||
- 4x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, mSATA
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, mezzanine
|
||||
- 10V to 60V DC input barrel jack
|
||||
- 3axis accelerometer (lis2de12)
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- nanoSIM/microSD socket (with UHS-I support)
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
- CAN Bus transceiver (mcp2562)
|
||||
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
|
||||
- off-board SPI connector (1x chip-select)
|
||||
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5912.dts | 13 +
|
||||
arch/arm/boot/dts/imx6q-gw5912.dts | 13 +
|
||||
arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 489 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 5b059fc..1a32a7d 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -424,6 +424,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
imx6dl-gw5910.dtb \
|
||||
+ imx6dl-gw5912.dtb \
|
||||
imx6dl-gw5913.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
@@ -498,6 +499,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
imx6q-gw5910.dtb \
|
||||
+ imx6q-gw5912.dtb \
|
||||
imx6q-gw5913.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5912.dts b/arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
new file mode 100644
|
||||
index 00000000..5260e01
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5912.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912";
|
||||
+ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5912.dts b/arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
new file mode 100644
|
||||
index 00000000..4dcbd94
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5912.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912";
|
||||
+ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5912.dtsi b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..8c57fd2
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
@@ -0,0 +1,461 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ led2 = &led2;
|
||||
+ nand = &gpmi;
|
||||
+ usb0 = &usbh1;
|
||||
+ usb1 = &usbotg;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ led2: user3 {
|
||||
+ label = "user3";
|
||||
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_usb_vbus: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "usb_vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&can1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ecspi2 {
|
||||
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ accel@19 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_accel>;
|
||||
+ compatible = "st,lis2de12";
|
||||
+ reg = <0x19>;
|
||||
+ st,drdy-int-pin = <1>;
|
||||
+ interrupt-parent = <&gpio7>;
|
||||
+ interrupts = <13 0>;
|
||||
+ interrupt-names = "INT1";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ vbus-supply = <®_usb_vbus>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ vbus-supply = <®_usb_vbus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usdhc3 {
|
||||
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ no-1-8-v; /* firmware will remove if board revision supports */
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&wdog2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_accel: accelmuxgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_ecspi2: escpi2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
|
||||
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
|
||||
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
|
||||
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_flexcan1: flexcan1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm1: pwm1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3: usdhc3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,496 @@
|
||||
From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Jones <rjones@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:21 -0800
|
||||
Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support
|
||||
|
||||
The Gateworks GW5907 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- FEC GbE Phy
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
- Digital IO expander (pca9555)
|
||||
- Joystick 12bit adc (ads1015)
|
||||
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 429 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 1e9e1af..9ee80e2 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -422,6 +422,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw560x.dtb \
|
||||
imx6dl-gw5903.dtb \
|
||||
imx6dl-gw5904.dtb \
|
||||
+ imx6dl-gw5907.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
imx6dl-hummingboard-som-v15.dtb \
|
||||
@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw560x.dtb \
|
||||
imx6q-gw5903.dtb \
|
||||
imx6q-gw5904.dtb \
|
||||
+ imx6q-gw5907.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-hummingboard-emmc-som-v15.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5907.dts b/arch/arm/boot/dts/imx6dl-gw5907.dts
|
||||
new file mode 100644
|
||||
index 00000000..3fa2822
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5907.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5907.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907";
|
||||
+ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5907.dts b/arch/arm/boot/dts/imx6q-gw5907.dts
|
||||
new file mode 100644
|
||||
index 00000000..b25526e
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5907.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5907.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907";
|
||||
+ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..0bdebdd
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
|
||||
@@ -0,0 +1,399 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ nand = &gpmi;
|
||||
+ usb0 = &usbh1;
|
||||
+ usb1 = &usbotg;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5p0v: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "5P0V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "usb_otg_vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ ddc-i2c-bus = <&i2c3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@20 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x20>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ adc@48 {
|
||||
+ compatible = "ti,ads1015";
|
||||
+ reg = <0x48>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ channel@4 {
|
||||
+ reg = <4>;
|
||||
+ ti,gain = <0>;
|
||||
+ ti,datarate = <5>;
|
||||
+ };
|
||||
+
|
||||
+ channel@5 {
|
||||
+ reg = <5>;
|
||||
+ ti,gain = <0>;
|
||||
+ ti,datarate = <5>;
|
||||
+ };
|
||||
+
|
||||
+ channel@6 {
|
||||
+ reg = <6>;
|
||||
+ ti,gain = <0>;
|
||||
+ ti,datarate = <5>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ vbus-supply = <®_usb_otg_vbus>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart3: uart3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,597 @@
|
||||
From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001
|
||||
From: Tim Harvey <tharvey@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:22 -0800
|
||||
Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support
|
||||
|
||||
The Gateworks GW5910 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- FEC GbE RJ45 front-panel
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
|
||||
- 5V to 60V DC input barrel jack
|
||||
- 3axis accelerometer (lis2de12)
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- microSD socket (with UHS-I support)
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
- Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6)
|
||||
- WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6)
|
||||
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
|
||||
- off-board SPI connector (1x chip-select)
|
||||
|
||||
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5910.dts | 14 +
|
||||
arch/arm/boot/dts/imx6q-gw5910.dts | 14 +
|
||||
arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 521 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 9ee80e2..85e53cc 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -423,6 +423,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5903.dtb \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
+ imx6dl-gw5910.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
imx6dl-hummingboard-som-v15.dtb \
|
||||
@@ -495,6 +496,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5903.dtb \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
+ imx6q-gw5910.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-hummingboard-emmc-som-v15.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5910.dts b/arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
new file mode 100644
|
||||
index 00000000..0d5e7e5
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5910.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5910.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910";
|
||||
+ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5910.dts b/arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
new file mode 100644
|
||||
index 00000000..6aafa2f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5910.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5910.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910";
|
||||
+ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..be1af74
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi
|
||||
@@ -0,0 +1,491 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ led2 = &led2;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ led2: user3 {
|
||||
+ label = "user3";
|
||||
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5p0v: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "5P0V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_wl: regulator-wl {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "wl";
|
||||
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <100>;
|
||||
+ enable-active-high;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_bt: regulator-bt {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_reg_bt>;
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "bt";
|
||||
+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <100>;
|
||||
+ enable-active-high;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+
|
||||
+&ecspi3 {
|
||||
+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ accel@19 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_accel>;
|
||||
+ compatible = "st,lis2de12";
|
||||
+ reg = <0x19>;
|
||||
+ st,drdy-int-pin = <1>;
|
||||
+ interrupt-parent = <&gpio7>;
|
||||
+ interrupts = <13 0>;
|
||||
+ interrupt-names = "INT1";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+/* off-board RS232 */
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* serial console */
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* Sterling-LWB Bluetooth */
|
||||
+&uart4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart4>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* GPS */
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ vbus-supply = <®_5p0v>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* Sterling-LWB SDIO WiFi */
|
||||
+&usdhc2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ non-removable;
|
||||
+ bus-width = <4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usdhc3 {
|
||||
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_accel: accelmuxgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_ecspi3: escpi3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
||||
+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_reg_bt: regbtgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_reg_wl: regwlgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart4: uart4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
||||
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc2: usdhc2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3: usdhc3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,449 @@
|
||||
From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Jones <rjones@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:23 -0800
|
||||
Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support
|
||||
|
||||
The Gateworks GW5913 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- FEC GbE RJ45 front-panel
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
|
||||
- 6V to 60V DC input connector
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- nanoSIM socket
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++
|
||||
arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 378 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 85e53cc..5b059fc 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -424,6 +424,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
imx6dl-gw5910.dtb \
|
||||
+ imx6dl-gw5913.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
imx6dl-hummingboard-som-v15.dtb \
|
||||
@@ -497,6 +498,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
imx6q-gw5910.dtb \
|
||||
+ imx6q-gw5913.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-hummingboard-emmc-som-v15.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5913.dts b/arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
new file mode 100644
|
||||
index 00000000..b74e533
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5913.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913";
|
||||
+ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5913.dts b/arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
new file mode 100644
|
||||
index 00000000..6f511f1
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5913.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5913.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913";
|
||||
+ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5913.dtsi b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..635c203
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi
|
||||
@@ -0,0 +1,348 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ nand = &gpmi;
|
||||
+ usb0 = &usbh1;
|
||||
+ usb1 = &usbotg;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x20000000>;
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5p0v: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "5P0V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart3: uart3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
@ -0,0 +1,565 @@
|
||||
From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Jones <rjones@gateworks.com>
|
||||
Date: Wed, 8 Jan 2020 07:44:24 -0800
|
||||
Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support
|
||||
|
||||
The Gateworks GW5912 is an IMX6 SoC based single board computer with:
|
||||
- IMX6Q or IMX6DL
|
||||
- 32bit DDR3 DRAM
|
||||
- GbE RJ45 front-panel
|
||||
- 4x miniPCIe socket with PCI Gen2, USB2
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, mSATA
|
||||
- 1x miniPCIe socket with PCI Gen2, USB2, mezzanine
|
||||
- 10V to 60V DC input barrel jack
|
||||
- 3axis accelerometer (lis2de12)
|
||||
- GPS (ublox ZOE-M8Q)
|
||||
- bi-color front-panel LED
|
||||
- 256MB NAND boot device
|
||||
- nanoSIM/microSD socket (with UHS-I support)
|
||||
- user pushbutton
|
||||
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
|
||||
- CAN Bus transceiver (mcp2562)
|
||||
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
|
||||
- off-board SPI connector (1x chip-select)
|
||||
|
||||
Signed-off-by: Robert Jones <rjones@gateworks.com>
|
||||
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
||||
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 2 +
|
||||
arch/arm/boot/dts/imx6dl-gw5912.dts | 13 +
|
||||
arch/arm/boot/dts/imx6q-gw5912.dts | 13 +
|
||||
arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 489 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 5b059fc..1a32a7d 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -424,6 +424,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-gw5907.dtb \
|
||||
imx6dl-gw5910.dtb \
|
||||
+ imx6dl-gw5912.dtb \
|
||||
imx6dl-gw5913.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-hummingboard-emmc-som-v15.dtb \
|
||||
@@ -498,6 +499,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-gw5907.dtb \
|
||||
imx6q-gw5910.dtb \
|
||||
+ imx6q-gw5912.dtb \
|
||||
imx6q-gw5913.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
diff --git a/arch/arm/boot/dts/imx6dl-gw5912.dts b/arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
new file mode 100644
|
||||
index 00000000..5260e01
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6dl-gw5912.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "imx6dl.dtsi"
|
||||
+#include "imx6qdl-gw5912.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912";
|
||||
+ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6q-gw5912.dts b/arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
new file mode 100644
|
||||
index 00000000..4dcbd94
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6q-gw5912.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "imx6q.dtsi"
|
||||
+#include "imx6qdl-gw5912.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912";
|
||||
+ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/imx6qdl-gw5912.dtsi b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..8c57fd2
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi
|
||||
@@ -0,0 +1,461 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright 2019 Gateworks Corporation
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ /* these are used by bootloader for disabling nodes */
|
||||
+ aliases {
|
||||
+ led0 = &led0;
|
||||
+ led1 = &led1;
|
||||
+ led2 = &led2;
|
||||
+ nand = &gpmi;
|
||||
+ usb0 = &usbh1;
|
||||
+ usb1 = &usbotg;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
+
|
||||
+ led0: user1 {
|
||||
+ label = "user1";
|
||||
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led1: user2 {
|
||||
+ label = "user2";
|
||||
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ led2: user3 {
|
||||
+ label = "user3";
|
||||
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@10000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x10000000 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ pps {
|
||||
+ compatible = "pps-gpio";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pps>;
|
||||
+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3P3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_usb_vbus: regulator-5p0v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "usb_vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&can1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ecspi2 {
|
||||
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&fec {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_enet>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gpio@23 {
|
||||
+ compatible = "nxp,pca9555";
|
||||
+ reg = <0x23>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@50 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x50>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@51 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x51>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@52 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x52>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom@53 {
|
||||
+ compatible = "atmel,24c02";
|
||||
+ reg = <0x53>;
|
||||
+ pagesize = <16>;
|
||||
+ };
|
||||
+
|
||||
+ rtc@68 {
|
||||
+ compatible = "dallas,ds1672";
|
||||
+ reg = <0x68>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ clock-frequency = <100000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_i2c3>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ accel@19 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_accel>;
|
||||
+ compatible = "st,lis2de12";
|
||||
+ reg = <0x19>;
|
||||
+ st,drdy-int-pin = <1>;
|
||||
+ interrupt-parent = <&gpio7>;
|
||||
+ interrupts = <13 0>;
|
||||
+ interrupt-names = "INT1";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pcie>;
|
||||
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm3 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1>;
|
||||
+ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbotg {
|
||||
+ vbus-supply = <®_usb_vbus>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_usbotg>;
|
||||
+ disable-over-current;
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbh1 {
|
||||
+ vbus-supply = <®_usb_vbus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usdhc3 {
|
||||
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ no-1-8-v; /* firmware will remove if board revision supports */
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdog1 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&wdog2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_wdog>;
|
||||
+ fsl,ext-reset-output;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&iomuxc {
|
||||
+ pinctrl_accel: accelmuxgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_enet: enetgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_ecspi2: escpi2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
|
||||
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
|
||||
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
|
||||
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_flexcan1: flexcan1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpio_leds: gpioledsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_gpmi_nand: gpminandgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c1: i2c1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c2: i2c2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_i2c3: i2c3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pcie: pciegrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
||||
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pps: ppsgrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm1: pwm1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm2: pwm2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm3: pwm3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_pwm4: pwm4grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart1: uart1grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart2: uart2grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_uart5: uart5grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usbotg: usbotggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3: usdhc3grp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
+ >;
|
||||
+ };
|
||||
+
|
||||
+ pinctrl_wdog: wdoggrp {
|
||||
+ fsl,pins = <
|
||||
+ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
|
||||
+ >;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.7.4
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user