ramips: make SoC dtsi compatible with upstream mmc-mtk driver

Add all essential MTK SDHC properties to support the new mmc-mtk
driver. Since this driver relies on power regulators, we also
need to enable this feature for MT7620, just like MT762{1,8}.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Co-authored-by: John Thomson <git@johnthomson.fastmail.com.au>
This commit is contained in:
Shiji Yang 2024-07-10 00:16:36 +08:00 committed by Nick Hainke
parent 53f23d1613
commit 338f40b3b4
5 changed files with 153 additions and 20 deletions

View File

@ -32,6 +32,35 @@
compatible = "mti,cpu-interrupt-controller";
};
mmc_clk: mmc-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
clock-accuracy = <100>;
};
mmc_reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "mmc_io";
};
mmc_reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "mmc_power";
};
palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
@ -493,15 +522,34 @@
interrupts = <17>;
};
sdhci: sdhci@10130000 {
compatible = "ralink,mt7620-sdhci";
sdhci: mmc@10130000 {
compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
reg = <0x10130000 0x4000>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
clocks = <&mmc_clk>, <&mmc_clk>;
clock-names = "source", "hclk";
disable-wp;
interrupt-parent = <&intc>;
interrupts = <14>;
pinctrl-names = "default";
max-frequency = <48000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdhci_pins>;
pinctrl-1 = <&sdhci_pins>;
resets = <&sysc 30>;
reset-names = "hrst";
vmmc-supply = <&mmc_reg_3v3>;
vqmmc-supply = <&mmc_reg_1v8>;
status = "disabled";
};

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@ -42,6 +42,28 @@
bootargs = "console=ttyS0,57600";
};
mmc_reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "mmc_io";
};
mmc_reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "mmc_power";
};
palmbus: palmbus@1e000000 {
compatible = "palmbus";
reg = <0x1e000000 0x100000>;
@ -326,17 +348,36 @@
};
};
sdhci: sdhci@1e130000 {
status = "disabled";
compatible = "ralink,mt7620-sdhci";
sdhci: mmc@1e130000 {
compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
reg = <0x1e130000 0x4000>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
clocks = <&sysc MT7621_CLK_SHXC>, <&sysc MT7621_CLK_SHXC>;
clock-names = "source", "hclk";
disable-wp;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
max-frequency = <50000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdhci_pins>;
pinctrl-1 = <&sdhci_pins>;
resets = <&sysc MT7621_RST_SDXC>;
reset-names = "hrst";
vmmc-supply = <&mmc_reg_3v3>;
vqmmc-supply = <&mmc_reg_1v8>;
status = "disabled";
};
xhci: xhci@1e1c0000 {

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@ -30,6 +30,35 @@
compatible = "mti,cpu-interrupt-controller";
};
mmc_clk: mmc-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
clock-accuracy = <100>;
};
mmc_reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "mmc_io";
};
mmc_reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "mmc_power";
};
palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
@ -355,15 +384,34 @@
reset-names = "host", "device";
};
sdhci: sdhci@10130000 {
compatible = "ralink,mt7620-sdhci";
sdhci: mmc@10130000 {
compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
reg = <0x10130000 0x4000>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
clocks = <&mmc_clk>, <&mmc_clk>;
clock-names = "source", "hclk";
disable-wp;
interrupt-parent = <&intc>;
interrupts = <14>;
pinctrl-names = "default";
max-frequency = <48000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdxc_pins>;
pinctrl-1 = <&sdxc_pins>;
resets = <&sysc 30>;
reset-names = "hrst";
vmmc-supply = <&mmc_reg_3v3>;
vqmmc-supply = <&mmc_reg_1v8>;
status = "disabled";
};

View File

@ -55,16 +55,10 @@
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
};
};
sdhci@10130000 {
compatible = "ralink,mt7620-sdhci";
reg = <0x10130000 4000>;
interrupt-parent = <&intc>;
interrupts = <14>;
&sdhci {
status = "okay";
};
};
&state_default {

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@ -186,6 +186,8 @@ CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RESET_CONTROLLER=y
CONFIG_SERIAL_8250_RT288X=y
CONFIG_SERIAL_MCTRL_GPIO=y