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ramips: make SoC dtsi compatible with upstream mmc-mtk driver
Add all essential MTK SDHC properties to support the new mmc-mtk driver. Since this driver relies on power regulators, we also need to enable this feature for MT7620, just like MT762{1,8}. Signed-off-by: Shiji Yang <yangshiji66@qq.com> Co-authored-by: John Thomson <git@johnthomson.fastmail.com.au>
This commit is contained in:
parent
53f23d1613
commit
338f40b3b4
@ -32,6 +32,35 @@
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compatible = "mti,cpu-interrupt-controller";
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compatible = "mti,cpu-interrupt-controller";
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};
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};
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mmc_clk: mmc-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <48000000>;
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clock-accuracy = <100>;
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};
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mmc_reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "mmc_io";
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};
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mmc_reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "mmc_power";
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};
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palmbus: palmbus@10000000 {
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palmbus: palmbus@10000000 {
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compatible = "palmbus";
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compatible = "palmbus";
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reg = <0x10000000 0x200000>;
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reg = <0x10000000 0x200000>;
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@ -493,15 +522,34 @@
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interrupts = <17>;
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interrupts = <17>;
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};
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};
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sdhci: sdhci@10130000 {
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sdhci: mmc@10130000 {
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compatible = "ralink,mt7620-sdhci";
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compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
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reg = <0x10130000 0x4000>;
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reg = <0x10130000 0x4000>;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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clocks = <&mmc_clk>, <&mmc_clk>;
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clock-names = "source", "hclk";
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disable-wp;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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interrupts = <14>;
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pinctrl-names = "default";
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max-frequency = <48000000>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sdhci_pins>;
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pinctrl-0 = <&sdhci_pins>;
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pinctrl-1 = <&sdhci_pins>;
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resets = <&sysc 30>;
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reset-names = "hrst";
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vmmc-supply = <&mmc_reg_3v3>;
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vqmmc-supply = <&mmc_reg_1v8>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -42,6 +42,28 @@
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bootargs = "console=ttyS0,57600";
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bootargs = "console=ttyS0,57600";
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};
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};
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mmc_reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "mmc_io";
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};
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mmc_reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "mmc_power";
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};
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palmbus: palmbus@1e000000 {
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palmbus: palmbus@1e000000 {
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compatible = "palmbus";
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compatible = "palmbus";
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reg = <0x1e000000 0x100000>;
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reg = <0x1e000000 0x100000>;
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@ -326,17 +348,36 @@
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};
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};
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};
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};
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sdhci: sdhci@1e130000 {
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sdhci: mmc@1e130000 {
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status = "disabled";
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compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
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compatible = "ralink,mt7620-sdhci";
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reg = <0x1e130000 0x4000>;
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reg = <0x1e130000 0x4000>;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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clocks = <&sysc MT7621_CLK_SHXC>, <&sysc MT7621_CLK_SHXC>;
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clock-names = "source", "hclk";
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disable-wp;
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interrupt-parent = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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max-frequency = <50000000>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sdhci_pins>;
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pinctrl-0 = <&sdhci_pins>;
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pinctrl-1 = <&sdhci_pins>;
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resets = <&sysc MT7621_RST_SDXC>;
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reset-names = "hrst";
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vmmc-supply = <&mmc_reg_3v3>;
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vqmmc-supply = <&mmc_reg_1v8>;
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status = "disabled";
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};
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};
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xhci: xhci@1e1c0000 {
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xhci: xhci@1e1c0000 {
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@ -30,6 +30,35 @@
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compatible = "mti,cpu-interrupt-controller";
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compatible = "mti,cpu-interrupt-controller";
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};
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};
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mmc_clk: mmc-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <48000000>;
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clock-accuracy = <100>;
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};
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mmc_reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "mmc_io";
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};
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mmc_reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "mmc_power";
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};
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palmbus: palmbus@10000000 {
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palmbus: palmbus@10000000 {
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compatible = "palmbus";
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compatible = "palmbus";
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reg = <0x10000000 0x200000>;
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reg = <0x10000000 0x200000>;
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@ -355,15 +384,34 @@
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reset-names = "host", "device";
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reset-names = "host", "device";
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};
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};
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sdhci: sdhci@10130000 {
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sdhci: mmc@10130000 {
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compatible = "ralink,mt7620-sdhci";
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compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
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reg = <0x10130000 0x4000>;
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reg = <0x10130000 0x4000>;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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clocks = <&mmc_clk>, <&mmc_clk>;
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clock-names = "source", "hclk";
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disable-wp;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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interrupts = <14>;
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pinctrl-names = "default";
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max-frequency = <48000000>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sdxc_pins>;
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pinctrl-0 = <&sdxc_pins>;
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pinctrl-1 = <&sdxc_pins>;
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resets = <&sysc 30>;
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reset-names = "hrst";
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vmmc-supply = <&mmc_reg_3v3>;
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vqmmc-supply = <&mmc_reg_1v8>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -55,16 +55,10 @@
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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};
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};
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};
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};
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};
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sdhci@10130000 {
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&sdhci {
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compatible = "ralink,mt7620-sdhci";
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status = "okay";
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reg = <0x10130000 4000>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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status = "okay";
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};
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};
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};
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&state_default {
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&state_default {
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@ -186,6 +186,8 @@ CONFIG_RANDSTRUCT_NONE=y
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CONFIG_RATIONAL=y
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CONFIG_RATIONAL=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_SERIAL_8250_RT288X=y
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CONFIG_SERIAL_8250_RT288X=y
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CONFIG_SERIAL_MCTRL_GPIO=y
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CONFIG_SERIAL_MCTRL_GPIO=y
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