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mediatek: filogic: Cudy WR3000S v1: fix CRLF line endings
DTS file for this device seems to be using CRLF line endings, so lets
convert them into Unix-style LF.
Fixes: faf4b3e0f7 ("mediatek: filogic: add support for Cudy WR3000S v1")
Link: https://github.com/openwrt/openwrt/pull/17096
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit is contained in:
Petr Štetiar
parent
e44180d45c
commit
30ae0b3f1e
@ -1,283 +1,283 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7981.dtsi"
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#include "mt7981.dtsi"
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/ {
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/ {
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model = "Cudy WR3000S v1";
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model = "Cudy WR3000S v1";
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compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
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compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
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aliases {
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aliases {
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label-mac-device = &gmac0;
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label-mac-device = &gmac0;
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led-boot = &led_status;
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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led-upgrade = &led_status;
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serial0 = &uart0;
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serial0 = &uart0;
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};
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};
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chosen {
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chosen {
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stdout-path = "serial0:115200n8";
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stdout-path = "serial0:115200n8";
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};
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};
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gpio-keys {
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gpio-keys {
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compatible = "gpio-keys";
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compatible = "gpio-keys";
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reset {
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reset {
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label = "reset";
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label = "reset";
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linux,code = <KEY_RESTART>;
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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};
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wps {
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wps {
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label = "wps";
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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};
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};
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};
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leds {
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leds {
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compatible = "gpio-leds";
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compatible = "gpio-leds";
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led_status: led@0 {
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led_status: led@0 {
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function = LED_FUNCTION_STATUS;
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_WHITE>;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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};
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led_internet {
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led_internet {
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function = LED_FUNCTION_WAN_ONLINE;
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function = LED_FUNCTION_WAN_ONLINE;
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color = <LED_COLOR_ID_WHITE>;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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};
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};
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led_wps {
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led_wps {
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function = LED_FUNCTION_WPS;
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_WHITE>;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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};
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led_wlan2g {
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led_wlan2g {
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function = LED_FUNCTION_WLAN_2GHZ;
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function = LED_FUNCTION_WLAN_2GHZ;
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color = <LED_COLOR_ID_WHITE>;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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linux,default-trigger = "phy0tpt";
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};
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};
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led_wlan5g {
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led_wlan5g {
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function = LED_FUNCTION_WLAN_5GHZ;
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function = LED_FUNCTION_WLAN_5GHZ;
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color = <LED_COLOR_ID_WHITE>;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&pio 7 GPIO_ACTIVE_LOW>;
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gpios = <&pio 7 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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linux,default-trigger = "phy1tpt";
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};
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};
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};
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};
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};
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};
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&uart0 {
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&uart0 {
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status = "okay";
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status = "okay";
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};
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};
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&watchdog {
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&watchdog {
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status = "okay";
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status = "okay";
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};
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};
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ð {
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ð {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-0 = <&mdio_pins>;
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status = "okay";
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status = "okay";
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gmac0: mac@0 {
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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compatible = "mediatek,eth-mac";
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reg = <0>;
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reg = <0>;
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phy-mode = "2500base-x";
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_bdinfo_de00 0>;
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nvmem-cells = <&macaddr_bdinfo_de00 0>;
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fixed-link {
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fixed-link {
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speed = <2500>;
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speed = <2500>;
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full-duplex;
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full-duplex;
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pause;
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pause;
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};
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};
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};
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};
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};
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};
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&mdio_bus {
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&mdio_bus {
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switch: switch@1f {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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compatible = "mediatek,mt7531";
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reg = <31>;
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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&spi0 {
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&spi0 {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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status = "okay";
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spi_nand: flash@0 {
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spi_nand: flash@0 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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compatible = "spi-nand";
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reg = <0>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-max-frequency = <52000000>;
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spi-cal-enable;
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spi-cal-enable;
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spi-cal-mode = "read-data";
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spi-cal-mode = "read-data";
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spi-cal-datalen = <7>;
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spi-cal-datalen = <7>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
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spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
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spi-cal-addrlen = <5>;
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spi-cal-addrlen = <5>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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mediatek,nmbm;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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partitions {
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compatible = "fixed-partitions";
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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partition@0 {
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label = "BL2";
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label = "BL2";
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reg = <0x00000 0x0100000>;
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reg = <0x00000 0x0100000>;
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read-only;
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read-only;
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};
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};
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partition@100000 {
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partition@100000 {
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label = "u-boot-env";
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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reg = <0x0100000 0x0080000>;
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read-only;
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read-only;
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};
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};
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factory: partition@180000 {
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factory: partition@180000 {
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label = "Factory";
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label = "Factory";
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reg = <0x180000 0x0200000>;
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reg = <0x180000 0x0200000>;
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read-only;
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read-only;
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nvmem-layout {
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nvmem-layout {
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compatible = "fixed-layout";
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compatible = "fixed-layout";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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reg = <0x0 0x1000>;
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};
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};
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};
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};
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};
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};
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partition@380000 {
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partition@380000 {
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label = "bdinfo";
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label = "bdinfo";
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reg = <0x380000 0x0040000>;
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reg = <0x380000 0x0040000>;
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read-only;
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read-only;
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nvmem-layout {
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nvmem-layout {
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compatible = "fixed-layout";
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compatible = "fixed-layout";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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macaddr_bdinfo_de00: macaddr@de00 {
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macaddr_bdinfo_de00: macaddr@de00 {
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compatible = "mac-base";
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compatible = "mac-base";
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reg = <0xde00 0x6>;
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reg = <0xde00 0x6>;
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#nvmem-cell-cells = <1>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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};
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};
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partition@3C0000 {
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partition@3C0000 {
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label = "FIP";
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label = "FIP";
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reg = <0x3C0000 0x0200000>;
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reg = <0x3C0000 0x0200000>;
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read-only;
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read-only;
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};
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};
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partition@580000 {
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partition@580000 {
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label = "ubi";
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label = "ubi";
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reg = <0x5C0000 0x4000000>;
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reg = <0x5C0000 0x4000000>;
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compatible = "linux,ubi";
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compatible = "linux,ubi";
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};
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};
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};
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};
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};
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};
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};
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};
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&pio {
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&pio {
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spi0_flash_pins: spi0-pins {
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spi0_flash_pins: spi0-pins {
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mux {
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mux {
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function = "spi";
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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groups = "spi0", "spi0_wp_hold";
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};
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};
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conf-pu {
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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conf-pd {
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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};
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};
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};
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&switch {
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&switch {
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ports {
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ports {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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port@0 {
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port@0 {
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reg = <0>;
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reg = <0>;
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label = "wan";
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label = "wan";
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nvmem-cell-names = "mac-address";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_bdinfo_de00 1>;
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nvmem-cells = <&macaddr_bdinfo_de00 1>;
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};
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};
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port@1 {
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port@1 {
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reg = <1>;
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reg = <1>;
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label = "lan1";
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label = "lan1";
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};
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};
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port@2 {
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port@2 {
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reg = <2>;
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reg = <2>;
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label = "lan2";
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label = "lan2";
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};
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};
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port@3 {
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port@3 {
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reg = <3>;
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reg = <3>;
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label = "lan3";
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label = "lan3";
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};
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};
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port@4 {
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port@4 {
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reg = <4>;
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reg = <4>;
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label = "lan4";
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label = "lan4";
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};
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};
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port@6 {
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port@6 {
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reg = <6>;
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reg = <6>;
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label = "cpu";
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label = "cpu";
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ethernet = <&gmac0>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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phy-mode = "2500base-x";
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fixed-link {
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fixed-link {
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speed = <2500>;
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speed = <2500>;
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full-duplex;
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full-duplex;
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pause;
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pause;
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};
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};
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};
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};
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};
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};
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};
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};
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&wifi {
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&wifi {
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status = "okay";
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status = "okay";
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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nvmem-cell-names = "eeprom";
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};
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};
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