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ipq40xx: directly define voltage per opp

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This should align opp table with what it was before converting to OPP v2.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This commit is contained in:
Pavel Kubelun 2019-05-14 16:42:17 +03:00 committed by Christian Lamparter
parent 7193067edb
commit 2ee98e8f6e
22 changed files with 42 additions and 34 deletions

8
target/linux/ipq40xx/patches-4.14/072-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch

@ -10,7 +10,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 34 ++++++++++++++++++++++++++--------
1 file changed, 26 insertions(+), 8 deletions(-)
1 file changed, 30 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@ -54,7 +54,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
};
L2: l2-cache {
@@ -94,6 +90,28 @@
@@ -94,6 +90,32 @@
};
};
@ -65,18 +65,22 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ opp-48000000 {
+ opp-hz = /bits/ 64 <48000000>;
+ clock-latency-ns = <256000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ clock-latency-ns = <256000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ clock-latency-ns = <256000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-716000000 {
+ opp-hz = /bits/ 64 <716000000>;
+ clock-latency-ns = <256000>;
+ opp-microvolt = <1100000>;
+ };
+ };
+

2
target/linux/ipq40xx/patches-4.14/073-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch

@ -22,7 +22,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -262,7 +262,7 @@
@@ -266,7 +266,7 @@
saw0: regulator@b089000 {
compatible = "qcom,saw2";

2
target/linux/ipq40xx/patches-4.14/077-qcom-ipq4019-add-USB-devicetree-nodes.patch

@ -41,7 +41,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -410,5 +410,79 @@
@@ -414,5 +414,79 @@
"legacy";
status = "disabled";
};

20
target/linux/ipq40xx/patches-4.14/078-ARM-dts-ipq4019-Add-a-few-peripheral-nodes.patch

@ -41,7 +41,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
};
cpus {
@@ -132,6 +134,12 @@
@@ -136,6 +138,12 @@
};
};
@ -54,7 +54,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0xf08>,
@@ -177,13 +185,13 @@
@@ -181,13 +189,13 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@ -70,7 +70,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
@@ -191,7 +199,7 @@
@@ -195,7 +203,7 @@
status = "disabled";
};
@ -79,7 +79,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x78b5000 0x600>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
@@ -200,10 +208,26 @@
@@ -204,10 +212,26 @@
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
@ -107,7 +107,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b7000 0x600>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
@@ -212,14 +236,29 @@
@@ -216,14 +240,29 @@
clock-names = "iface", "core";
#address-cells = <1>;
#size-cells = <0>;
@ -138,7 +138,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
@@ -293,7 +332,7 @@
@@ -297,7 +336,7 @@
serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78af000 0x200>;
@ -147,7 +147,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
status = "disabled";
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -305,7 +344,7 @@
@@ -309,7 +348,7 @@
serial@78b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b0000 0x200>;
@ -156,7 +156,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
status = "disabled";
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -327,6 +366,101 @@
@@ -331,6 +370,101 @@
reg = <0x4ab000 0x4>;
};
@ -258,7 +258,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
wifi0: wifi@a000000 {
compatible = "qcom,ipq4019-wifi";
reg = <0xa000000 0x200000>;
@@ -360,7 +494,7 @@
@@ -364,7 +498,7 @@
<GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
@ -267,7 +267,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
interrupt-names = "msi0", "msi1", "msi2", "msi3",
"msi4", "msi5", "msi6", "msi7",
"msi8", "msi9", "msi10", "msi11",
@@ -402,7 +536,7 @@
@@ -406,7 +540,7 @@
<GIC_SPI 61 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 62 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 63 IRQ_TYPE_EDGE_RISING>,

2
target/linux/ipq40xx/patches-4.14/079-ARM-dts-ipq4019-fix-PCI-range.patch

@ -12,7 +12,7 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -381,7 +381,7 @@
@@ -385,7 +385,7 @@
#size-cells = <2>;
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000

2
target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch

@ -61,7 +61,7 @@ Origin: other, https://patchwork.kernel.org/patch/10339127/
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -182,6 +182,7 @@
@@ -186,6 +186,7 @@
compatible = "qcom,ipq4019-pinctrl";
reg = <0x01000000 0x300000>;
gpio-controller;

2
target/linux/ipq40xx/patches-4.14/084-ARM-dts-ipq4019-Add-a-default-chosen-node.patch

@ -34,7 +34,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
status = "ok";
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -346,7 +346,7 @@
@@ -350,7 +350,7 @@
regulator;
};

2
target/linux/ipq40xx/patches-4.14/086-ARM-dts-qcom-ipq4019-enlarge-PCIe-BAR-range.patch

@ -29,7 +29,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -397,8 +397,8 @@
@@ -401,8 +401,8 @@
#address-cells = <3>;
#size-cells = <2>;

2
target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch

@ -21,7 +21,7 @@ Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -400,7 +400,7 @@
@@ -404,7 +404,7 @@
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
<0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;

2
target/linux/ipq40xx/patches-4.14/701-dts-ipq4019-add-mdio-node.patch

@ -15,7 +15,7 @@ so the info might change.
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -562,6 +562,34 @@
@@ -566,6 +566,34 @@
status = "disabled";
};

2
target/linux/ipq40xx/patches-4.14/702-dts-ipq4019-add-PHY-switch-nodes.patch

@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -590,6 +590,29 @@
@@ -594,6 +594,29 @@
};
};

2
target/linux/ipq40xx/patches-4.14/711-dts-ipq4019-add-ethernet-essedma-node.patch

@ -25,7 +25,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
};
cpus {
@@ -613,6 +615,64 @@
@@ -617,6 +619,64 @@
status = "disabled";
};

10
target/linux/ipq40xx/patches-4.19/072-v4.20-ARM-dts-qcom-ipq4019-add-cpu-operating-points-for-cp.patch

@ -10,8 +10,8 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 54 ++++++++++++++---------------
1 file changed, 26 insertions(+), 28 deletions(-)
arch/arm/boot/dts/qcom-ipq4019.dtsi | 58 ++++++++++++++---------------
1 file changed, 30 insertions(+), 28 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@ -79,7 +79,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
};
L2: l2-cache {
@@ -136,6 +112,28 @@
@@ -136,6 +112,32 @@
};
};
@ -89,18 +89,22 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
+
+ opp-48000000 {
+ opp-hz = /bits/ 64 <48000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-716000000 {
+ opp-hz = /bits/ 64 <716000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ };

2
target/linux/ipq40xx/patches-4.19/073-v4.20-ARM-dts-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch

@ -23,7 +23,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -321,7 +321,7 @@
@@ -325,7 +325,7 @@
saw0: regulator@b089000 {
compatible = "qcom,saw2";

2
target/linux/ipq40xx/patches-4.19/077-qcom-ipq4019-add-USB-devicetree-nodes.patch

@ -41,7 +41,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -564,5 +564,79 @@
@@ -568,5 +568,79 @@
"legacy";
status = "disabled";
};

2
target/linux/ipq40xx/patches-4.19/079-v4.20-ARM-dts-qcom-ipq4019-fix-PCI-range.patch

@ -14,7 +14,7 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -401,7 +401,7 @@
@@ -405,7 +405,7 @@
#size-cells = <2>;
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000

2
target/linux/ipq40xx/patches-4.19/080-ARM-dts-qcom-add-gpio-ranges-property.patch

@ -60,7 +60,7 @@ will be executed twice with the same parameters for the same pinctrl.
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -202,6 +202,7 @@
@@ -206,6 +206,7 @@
compatible = "qcom,ipq4019-pinctrl";
reg = <0x01000000 0x300000>;
gpio-controller;

2
target/linux/ipq40xx/patches-4.19/083-ARM-dts-qcom-ipq4019-enlarge-PCIe-BAR-range.patch

@ -29,7 +29,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -401,8 +401,8 @@
@@ -405,8 +405,8 @@
#address-cells = <3>;
#size-cells = <2>;

2
target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch

@ -21,7 +21,7 @@ Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -404,7 +404,7 @@
@@ -408,7 +408,7 @@
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
<0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;

2
target/linux/ipq40xx/patches-4.19/701-dts-ipq4019-add-mdio-node.patch

@ -15,7 +15,7 @@ so the info might change.
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -566,6 +566,34 @@
@@ -570,6 +570,34 @@
status = "disabled";
};

2
target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch

@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -594,6 +594,29 @@
@@ -598,6 +598,29 @@
};
};

2
target/linux/ipq40xx/patches-4.19/711-dts-ipq4019-add-ethernet-essedma-node.patch

@ -25,7 +25,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
};
cpus {
@@ -617,6 +619,64 @@
@@ -621,6 +623,64 @@
status = "disabled";
};