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mvebu: cortexa9: correct cpu subtype

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Armada 370  processors have only 16 double-precision registers. The
change introduced by 8dcc1087602e ("toolchain: ARM: Fix toolchain
compilation for gcc 8.x") switched accidentally the toolchain for mvebu
cortexa9 subtarget to cpu type with 32 double-precision registers. This
stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu
is specified. That change resulted in unusable image, in which kernel
will kill userspace as soon as it causing "Illegal instruction".

Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272
Fixes: 8dcc1087602e ("toolchain: ARM: Fix toolchain compilation for
gcc 8.x")
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
This commit is contained in:
Tomasz Maciej Nowak 2020-03-18 19:04:12 +01:00 committed by Petr Štetiar
parent 43d1d88510
commit 2d61f8821c
1 changed files with 1 additions and 1 deletions
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2
target/linux/mvebu/cortexa9/target.mk
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@ -10,5 +10,5 @@ include $(TOPDIR)/rules.mk
ARCH:=arm
BOARDNAME:=Marvell Armada 37x/38x/XP
CPU_TYPE:=cortex-a9
CPU_SUBTYPE:=vfpv3
CPU_SUBTYPE:=vfpv3-d16
KERNELNAME:=zImage dtbs