From 2cba297ea064df58259f2b4dafbcdd05291d38b5 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sat, 9 Apr 2016 10:26:37 +0000 Subject: [PATCH] ar71xx: fix nondeterministic hangs during bootconsole/console handover Reconfiguring the UART when the FIFO is not empty may cause the boot to hang. This hang is extremely suspectible to timing differences; recompiling the kernel with the same configuration, but different UTS_VERSION timestamps can yield images that hang more or less often. Sometimes images are produced that hang reproducibly. This patch should also make it into one of the next linux-stable releases, but it's better to get this fixed as soon as possible. Fixes #21773, #21857. Signed-off-by: Matthias Schiffer SVN-Revision: 49156 --- ...bootconsole-wait-for-both-THRE-and-T.patch | 54 +++++++++++++++++++ ...bootconsole-wait-for-both-THRE-and-T.patch | 54 +++++++++++++++++++ 2 files changed, 108 insertions(+) create mode 100644 target/linux/ar71xx/patches-4.1/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch create mode 100644 target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch diff --git a/target/linux/ar71xx/patches-4.1/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch b/target/linux/ar71xx/patches-4.1/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch new file mode 100644 index 00000000000..7be14abf945 --- /dev/null +++ b/target/linux/ar71xx/patches-4.1/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch @@ -0,0 +1,54 @@ +From f1ba020af5076172c9d29006a747ccf40027fedc Mon Sep 17 00:00:00 2001 +Message-Id: +From: Matthias Schiffer +Date: Thu, 24 Mar 2016 15:34:05 +0100 +Subject: [PATCH] MIPS: ath79: make bootconsole wait for both THRE and TEMT + +This makes the ath79 bootconsole behave the same way as the generic 8250 +bootconsole. + +Also waiting for TEMT (transmit buffer is empty) instead of just THRE +(transmit buffer is not full) ensures that all characters have been +transmitted before the real serial driver starts reconfiguring the serial +controller (which would sometimes result in garbage being transmitted.) +This change does not cause a visible performance loss. + +In addition, this seems to fix a hang observed in certain configurations on +many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver. + +A more complete follow-up patch will disable 8250 autoconfig for ath79 +altogether (the serial controller is detected as a 16550A, which is not +fully compatible with the ath79 serial, and the autoconfig may lead to +undefined behavior on ath79.) + +Cc: +Signed-off-by: Matthias Schiffer +--- + arch/mips/ath79/early_printk.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c +index b955faf..d1adc59 100644 +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val) + } while (1); + } + ++#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) ++ + static void prom_putchar_ar71xx(unsigned char ch) + { + void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); + +- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); ++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); + __raw_writel(ch, base + UART_TX * 4); +- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); ++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); + } + + static void prom_putchar_ar933x(unsigned char ch) +-- +2.7.4 + diff --git a/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch b/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch new file mode 100644 index 00000000000..7be14abf945 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch @@ -0,0 +1,54 @@ +From f1ba020af5076172c9d29006a747ccf40027fedc Mon Sep 17 00:00:00 2001 +Message-Id: +From: Matthias Schiffer +Date: Thu, 24 Mar 2016 15:34:05 +0100 +Subject: [PATCH] MIPS: ath79: make bootconsole wait for both THRE and TEMT + +This makes the ath79 bootconsole behave the same way as the generic 8250 +bootconsole. + +Also waiting for TEMT (transmit buffer is empty) instead of just THRE +(transmit buffer is not full) ensures that all characters have been +transmitted before the real serial driver starts reconfiguring the serial +controller (which would sometimes result in garbage being transmitted.) +This change does not cause a visible performance loss. + +In addition, this seems to fix a hang observed in certain configurations on +many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver. + +A more complete follow-up patch will disable 8250 autoconfig for ath79 +altogether (the serial controller is detected as a 16550A, which is not +fully compatible with the ath79 serial, and the autoconfig may lead to +undefined behavior on ath79.) + +Cc: +Signed-off-by: Matthias Schiffer +--- + arch/mips/ath79/early_printk.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c +index b955faf..d1adc59 100644 +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val) + } while (1); + } + ++#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) ++ + static void prom_putchar_ar71xx(unsigned char ch) + { + void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); + +- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); ++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); + __raw_writel(ch, base + UART_TX * 4); +- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); ++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); + } + + static void prom_putchar_ar933x(unsigned char ch) +-- +2.7.4 +